SN74LV139ANSRE4 [TI]
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS; 双路2号线至4线解码器/多路解复用器型号: | SN74LV139ANSRE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS |
文件: | 总13页 (文件大小:322K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
2-V to 5.5-V V
Operation
I
Supports Partial-Power-Down Mode
CC
off
Operation
Max t of 7.5 ns at 5 V
pd
Latch-Up Performance Exceeds 250 mA Per
JESD 17
Support Mixed-Mode Voltage Operation on
All Ports
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
Designed Specifically for High-Speed
Memory Decoders and Data-Transmission
Systems
– 1000-V Charged-Device Model (C101)
Incorporate Two Enable Inputs to Simplify
Cascading and/or Data Reception
SN54LV139A . . . J OR W PACKAGE
SN74LV139A . . . D, DB, DGV, NS,
OR PW PACKAGE
SN54LV139A . . . FK PACKAGE
(TOP VIEW)
SN74LV139A . . . RGY PACKAGE
(TOP VIEW)
(TOP VIEW)
1G
1A
V
1
16
3
2
1
20 19
18
1
2
3
4
5
6
7
8
16
15
14
13
CC
2A
2B
NC
1B
1Y0
NC
4
5
6
7
8
2G
2A
2B
1A
1B
1Y0
1Y1
1Y2
1Y3
15
14
13
12
11
10
2
3
4
5
6
7
2G
2A
2B
2Y0
2Y1
2Y2
17
16
1B
1Y0
1Y1
1Y2
1Y3
GND
15 2Y0
14
9 10 11 12 13
1Y1
1Y2
12 2Y0
2Y1
11
10
9
2Y1
2Y2
2Y3
8
9
NC – No internal connection
description/ordering information
The ’LV139A devices are dual 2-line to 4-line decoders/demultiplexers designed for 2-V to 5.5-V V operation.
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QFN – RGY
SOIC – D
Reel of 1000
Tube of 40
SN74LV139ARGYR
SN74LV139AD
LV139A
LV139A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV139ADR
SN74LV139ANSR
SN74LV139ADBR
SN74LV139APW
SN74LV139APWR
SN74LV139APWT
SN74LV139ADGVR
SNJ54LV139AJ
SOP – NS
74LV139A
LV139A
–40°C to 85°C
SSOP – DB
TSSOP – PW
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
LV139A
TVSOP – DGV
CDIP – J
LV139A
SNJ54LV139AJ
SNJ54LV139AW
SNJ54LV139AFK
–55°C to 125°C
CFP – W
Tube of 150
Tube of 55
SNJ54LV139AW
SNJ54LV139AFK
LCCC – FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
description/ordering information(continued)
Thesedevicesaredesignedforhigh-performancememory-decodingordata-routingapplicationsrequiringvery
short propagation delay times. In high-performance memory systems, these decoders can minimize the effects
of system decoding. When employed with high-speed memories utilizing a fast enable circuit, the delay time
of these decoders and the enable time of the memory usually are less than the typical access time of the
memory. This means that the effective system delay introduced by the decoders is negligible.
The ’LV139A devices comprise two individual 2-line to 4-line decoders in a single package. The active-low
enable (G) input can be used as a data line in demultiplexing applications. These decoders/demultiplexers
feature fully buffered inputs, each of which represents only one normalized load to its driving circuit.
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
INPUTS
OUTPUTS
SELECT
G
B
X
L
A
X
L
Y0
H
L
Y1
H
H
L
Y2
H
H
H
L
Y3
H
H
L
L
L
H
L
H
L
H
H
H
H
H
H
L
H
H
H
H
H
L
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
logic diagram (positive logic)
4
1Y0
1
5
1G
1Y1
6
1Y2
2
1A
7
1Y3
3
1B
12
2Y0
15
2G
11
2Y1
10
2Y2
14
2A
9
2Y3
13
2B
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
O
O
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
IK
OK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through V
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
JA
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
recommended operating conditions (see Note 5)
SN54LV139A
SN74LV139A
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
5.5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
1.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
V
V
× 0.7
V
V
V
× 0.7
CC
CC
CC
CC
CC
CC
High-level input voltage
V
V
IH
× 0.7
× 0.7
× 0.7
× 0.7
0.5
0.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
V
V
× 0.3
V
V
V
× 0.3
× 0.3
× 0.3
5.5
CC
CC
CC
CC
CC
CC
V
IL
Low-level input voltage
× 0.3
× 0.3
5.5
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
V
V
CC
O
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
–50
–2
–50
–2
–6
–12
50
2
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
High-level output current
Low-level output current
OH
OL
–6
mA
µA
–12
50
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
2
I
6
6
mA
12
12
200
100
20
85
200
100
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
–55
125
–40
°C
A
NOTE 5: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV139A
SN74LV139A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
MIN
TYP
MAX
I
I
I
I
I
I
I
I
= –50 µA
= –2 mA
= –6 mA
= –12 mA
= 50 µA
= 2 mA
2 V to 5.5 V
2.3 V
V
–0.1
V –0.1
CC
OH
OH
OH
OH
OL
OL
OL
OL
CC
2
2
V
V
V
OH
3 V
2.48
3.8
2.48
3.8
4.5 V
2 V to 5.5 V
2.3 V
0.1
0.4
0.44
0.55
±1
0.1
0.4
0.44
0.55
±1
V
OL
= 6 mA
3 V
= 12 mA
4.5 V
I
I
I
V = 5.5 V or GND
0 to 5.5 V
5.5 V
µA
µA
µA
pF
I
I
V = V
or GND,
I = 0
O
20
20
CC
off
I
CC
V or V = 0 to 5.5 V
0
5
5
I
O
C
V = V
or GND
3.3 V
1.9
1.9
i
I
CC
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV139A SN74LV139A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
TYP
MAX
MIN
1*
1*
1
MAX
21*
MIN
1
MAX
21
A or B
G
Y
Y
Y
Y
7.7* 17.6*
7.4* 15.8*
t
C
C
= 15 pF
= 50 pF
pd
pd
L
L
19*
1
19
A or B
G
10.2
9.9
22.5
20.2
26.5
24
1
26.5
24
t
ns
1
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
5.3*
5.1*
7.3
SN54LV139A SN74LV139A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
11*
MIN
1*
1*
1
MAX
13*
MIN
1
MAX
13
A or B
G
Y
Y
Y
Y
t
t
C
C
= 15 pF
= 50 pF
pd
L
L
9.2*
14.5
12.7
11*
1
11
A or B
G
16.5
14.5
1
16.5
14.5
ns
pd
7
1
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
3.7*
3.5*
5.2
SN54LV139A SN74LV139A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
ns
MIN
MAX
7.2*
6.3*
9.2
MIN
1*
1*
1
MAX
8.5*
7.5*
10.5
9.5
MIN
1
MAX
8.5
A or B
G
Y
Y
Y
Y
t
t
C
C
= 15 pF
= 50 pF
pd
L
L
1
7.5
A or B
G
1
10.5
9.5
ns
pd
4.9
8.3
1
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
V
TYP
17.3
18.2
UNIT
CC
3.3 V
C
Power dissipation capacitance
C
pF
pd
5 V
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54LV139A, SN74LV139A
DUAL 2-LINE TO 4-LINE DECODERS/DEMULTIPLEXERS
SCLS396G – APRIL 1998 – REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
GND
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
Timing Input
CC
0 V
t
w
t
h
t
V
su
CC
V
CC
50% V
50% V
CC
Input
Input
CC
50% V
50% V
CC
Data Input
CC
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
50% V
50% V
50% V
CC
CC
CC
t
CC
0 V
0 V
t
t
t
t
PLH
PHL
PZL
PLZ
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
V
V
+ 0.3 V
S1 at V
(see Note B)
OL
CC
V
OL
OL
t
PHL
PLH
t
t
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
– 0.3 V
OH
50% V
50% V
50% V
CC
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PHL
PHZ
PZH
PLH
.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSOI002B – JANUARY 1995 – REVISED SEPTEMBER 2001
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
1
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相关型号:
SN74LV139APWLE
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