SN74LV157APWTE4 [TI]
QUADRUPLE-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS; 翻两番线路至1线数据选择器/多路复用器
| 型号： | SN74LV157APWTE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUADRUPLE-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS |
| 文件： | 总17页 (文件大小：504K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢂ ꢇ ꢈꢉ ꢀꢁꢇ ꢃꢄꢅ ꢆꢂ ꢇꢈ
ꢊ ꢋꢈꢌ ꢍꢋꢎ ꢄ ꢏ ꢐ ꢑꢄ ꢒꢁꢏ ꢓ ꢔ ꢆ ꢑꢄ ꢒꢁꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒ ꢎꢄ ꢏꢘ ꢏ ꢍꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
SN54LV157A . . . J OR W PACKAGE
SN74LV157A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
2-V to 5.5-V V
Operation
CC
Max t of 7.5 ns at 5 V
pd
Typical V
(Output Ground Bounce)
OLP
<0.8 V at V , T = 25°C
A/B
1A
V
CC
G
1
2
3
4
5
6
7
8
16
15
14
13
CC
A
Typical V
(Output V
Undershoot)
OHV
OH
1B
4A
4B
>2.3 V at V , T = 25°C
CC
A
1Y
I
Supports Partial-Power-Down-Mode
off
2A
12 4Y
Operation
11
10
9
2B
3A
3B
3Y
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
2Y
GND
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
SN54LV157A . . . FK PACKAGE
(TOP VIEW)
− 1000-V Charged-Device Model (C101)
description/ordering information
3
2
1 20 19
18
4A
4B
NC
The ’LV157A devices are quadruple 2-line to
1-line data selectors/multiplexers designed for
1B
1Y
NC
2A
2B
4
5
6
7
8
17
16
2-V to 5.5-V V
operation.
CC
15 4Y
14
9 10 11 12 13
These devices contain inverters and drivers to
supply full data selection to the four output gates.
A separate strobe (G) input is provided. A 4-bit
word is selected from one of two sources and is
routed to the four outputs. The ’LV157A devices
present true data.
3A
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube of 40
SN74LV157AD
SOIC − D
LV157A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV157ADR
SN74LV157ANSR
SN74LV157ADBR
SN74LV157APW
SN74LV157APWR
SN74LV157APWT
SN74LV157ADGVR
SNJ54LV157AJ
SOP − NS
74LV157A
LV157A
SSOP − DB
−40°C to 85°C
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
TSSOP − PW
LV157A
TVSOP − DGV
CDIP − J
LV157A
SNJ54LV157AJ
SNJ54LV157AW
SNJ54LV157AFK
−55°C to 125°C CFP − W
Tube of 150
Tube of 55
SNJ54LV157AW
SNJ54LV157AFK
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2005, Texas Instruments Incorporated
ꢋ ꢁ ꢄꢏꢀꢀ ꢔ ꢓꢙ ꢏꢍꢚ ꢒꢀ ꢏ ꢁ ꢔꢓꢏꢌ ꢛꢜ ꢝꢞ ꢟꢠꢡ ꢢꢣꢤ ꢥꢛ ꢡꢠ ꢥꢛꢦ ꢝꢥꢞ ꢎꢍ ꢔ ꢌ ꢋ ꢕꢓ ꢒꢔ ꢁ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢂ ꢇꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆ ꢂꢇ ꢈ
ꢊꢋ ꢈ ꢌꢍ ꢋ ꢎꢄ ꢏ ꢐ ꢑꢄ ꢒ ꢁꢏ ꢓ ꢔ ꢆ ꢑꢄꢒ ꢁ ꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏꢍꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
description/ordering information (continued)
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
FUNCTION TABLE
INPUTS
OUTPUT
DATA
SELECT
A/B
Y
G
A
X
L
B
X
X
X
L
H
L
L
L
L
X
L
L
L
L
H
X
X
H
L
H
H
H
H
logic diagram (positive logic)
2
1A
4
1Y
3
1B
5
2A
7
9
2Y
3Y
6
2B
11
3A
10
3B
14
4A
12
4Y
13
4B
15
G
1
A/B
Pin numbers shown are for the D, DB, DGV, J, NS, PW, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢂ ꢇ ꢈꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ
ꢊ ꢋꢈꢌ ꢍꢋꢎ ꢄ ꢏ ꢐ ꢑꢄ ꢒꢁꢏ ꢓ ꢔ ꢆ ꢑꢄ ꢒꢁꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏ ꢍ ꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range applied in high or low state, V (see Notes 1 and 2) . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Output voltage range applied in power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
OK
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢂ ꢇꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆ ꢂꢇ ꢈ
ꢊꢋ ꢈ ꢌꢍ ꢋ ꢎꢄ ꢏ ꢐ ꢑꢄ ꢒ ꢁꢏ ꢓ ꢔ ꢆ ꢑꢄꢒ ꢁ ꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏꢍꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
recommended operating conditions (see Note 4)
SN54LV157A
SN74LV157A
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
5.5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
1.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
× 0.7
V
V
V
× 0.7
CC
CC
CC
CC
CC
CC
High-level input voltage
V
V
IH
V
V
× 0.7
× 0.7
× 0.7
× 0.7
0.5
0.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
× 0.3
V
× 0.3
× 0.3
× 0.3
5.5
CC
CC
CC
CC
CC
CC
V
IL
Low-level input voltage
V
V
× 0.3
× 0.3
5.5
V
V
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
V
V
CC
O
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−2
−50
−2
−6
−12
50
2
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
High-level output current
Low-level output current
OH
OL
−6
mA
−12
50
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
2
I
6
6
mA
12
12
200
100
20
85
200
100
20
0
0
0
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
−55
125
−40
°C
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV157A
SN74LV157A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
MIN
TYP
MAX
I
I
I
I
I
I
I
I
= −50 µA
2 V to 5.5 V
2.3 V
V
−0.1
2
V
CC
−0.1
2
OH
OH
OH
OH
OL
OL
OL
OL
CC
= −2 mA
= −6 mA
= −12 mA
= 50 µA
= 2 mA
V
V
V
OH
3 V
2.48
3.8
2.48
3.8
4.5 V
2 V to 5.5 V
2.3 V
0.1
0.4
0.44
0.55
1
0.1
0.4
0.44
0.55
1
V
OL
= 6 mA
3 V
= 12 mA
4.5 V
I
I
I
V = 5.5 V or GND
0 to 5.5 V
5.5 V
µA
µA
µA
pF
I
I
V = V
CC
or GND,
I = 0
O
20
20
CC
off
I
V or V = 0 to 5.5 V
0
5
5
I
O
C
V = V
or GND
3.3 V
1.7
1.7
i
I
CC
ꢎ
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ꢛ
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ꢤ
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4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢂ ꢇ ꢈꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ
ꢊ ꢋꢈꢌ ꢍꢋꢎ ꢄ ꢏ ꢐ ꢑꢄ ꢒꢁꢏ ꢓ ꢔ ꢆ ꢑꢄ ꢒꢁꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏ ꢍ ꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV157A SN74LV157A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
TYP
MAX
MIN
MAX
MIN
1
MAX
19.5
23.5
24
A or B
A/B
G
Y
Y
Y
Y
Y
Y
7.4* 15.9*
7.9* 19.4*
7.8* 19.8*
1* 19.5*
1* 23.5*
1
t
C
C
= 15 pF
= 50 pF
ns
pd
pd
L
L
1*
1
24*
22
1
A or B
A/B
G
9.4
10.8
9.6
18.8
22.3
22.7
1
22
t
1
26
1
26
ns
1
26.5
1
26.5
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
SN54LV157A SN74LV157A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
1
MAX
11.5
15.5
16
A or B
A/B
G
Y
Y
Y
Y
Y
Y
5.2*
9.7*
1* 11.5*
1* 15.5*
5.8* 13.2*
5.5* 13.6*
1
t
C
C
= 15 pF
= 50 pF
ns
pd
pd
L
L
1*
1
16*
15
1
A or B
A/B
G
6.7
7.6
7
13.2
16.7
17.1
1
15
t
1
19
1
19
ns
1
19.5
1
19.5
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
3.6*
4.1*
3.8*
4.8
SN54LV157A SN74LV157A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
UNIT
MIN
MAX
6.4*
8.1*
8.6*
8.4
MIN
1*
1*
1*
1
MAX
7.5*
9.5*
10*
MIN
1
MAX
7.5
9.5
10
A or B
A/B
G
Y
Y
Y
Y
Y
Y
1
t
C
C
= 15 pF
= 50 pF
ns
pd
pd
L
L
1
A or B
A/B
G
9.5
1
9.5
11.5
12
t
5.4
10.1
10.6
1
11.5
12
1
ns
5
1
1
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
noise characteristics, V
= 3.3 V, C = 50 pF, T = 25°C (see Note 5)
CC
L
A
SN74LV157A
PARAMETER
UNIT
MIN
TYP
0.3
MAX
V
V
V
V
V
Quiet output, maximum dynamic V
0.8
V
V
V
V
V
OL(P)
OL(V)
OH(V)
IH(D)
IL(D)
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
−0.1
3.2
−0.8
OL
OH
2.31
0.99
NOTE 5: Characteristics are for surface-mount packages only.
ꢎ
ꢍ
ꢔ
ꢌ
ꢋ
ꢕ
ꢓ
ꢎ
ꢍ
ꢏ
ꢅ
ꢒ
ꢏ
ꢚ
ꢝ
ꢥ
ꢧ
ꢠ
ꢨ
ꢣ
ꢦ
ꢛ
ꢝ
ꢠ
ꢥ
ꢡ
ꢠ
ꢥ
ꢡ
ꢤ
ꢨ
ꢥ
ꢞ
ꢩ
ꢨ
ꢠ
ꢟ
ꢢ
ꢟꢤ ꢞ ꢝ ꢰꢥ ꢩꢜ ꢦ ꢞ ꢤ ꢠꢧ ꢟꢤ ꢱ ꢤ ꢫꢠ ꢩꢣꢤ ꢥꢛꢬ ꢕ ꢜꢦ ꢨꢦ ꢡꢛ ꢤꢨ ꢝꢞ ꢛꢝ ꢡ ꢟꢦ ꢛꢦ ꢦꢥ ꢟ ꢠꢛ ꢜꢤꢨ
ꢡ
ꢛ
ꢞ
ꢝ
ꢥ
ꢛ
ꢜ
ꢤ
ꢧ
ꢠ
ꢨ
ꢣ
ꢦ
ꢛ
ꢝ
ꢱ
ꢤ
ꢠ
ꢨ
ꢞ
ꢩ
ꢤ
ꢡ
ꢝ
ꢧ
ꢝ
ꢡ
ꢦ
ꢛ
ꢝ
ꢠ
ꢥ
ꢞ
ꢦ
ꢨ
ꢤ
ꢟ
ꢤ
ꢞ
ꢝ
ꢰ
ꢥ
ꢰ
ꢠ
ꢦ
ꢫ
ꢞ
ꢬ
ꢓ
ꢤ
ꢭ
ꢦ
ꢞ
ꢒ
ꢥ
ꢞ
ꢛ
ꢨ
ꢢ
ꢣ
ꢤ
ꢥ
ꢡ ꢜꢦ ꢥ ꢰꢤ ꢠꢨ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢩꢨ ꢠꢟ ꢢꢡꢛ ꢞ ꢮ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢬ
ꢛ
ꢞ
ꢨ
ꢤ
ꢞ
ꢤ
ꢨ
ꢱ
ꢤꢞ
ꢛ
ꢜ
ꢤ
ꢨ
ꢝ
ꢰ
ꢜ
ꢛ
ꢛ
ꢠ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢂ ꢇꢈ ꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆ ꢂꢇ ꢈ
ꢊꢋ ꢈ ꢌꢍ ꢋ ꢎꢄ ꢏ ꢐ ꢑꢄ ꢒ ꢁꢏ ꢓ ꢔ ꢆ ꢑꢄꢒ ꢁ ꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏꢍꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
V
TYP
12.1
13.1
UNIT
CC
3.3 V
5 V
C
Power dissipation capacitance
C
pF
pd
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢂ ꢇ ꢈꢉ ꢀꢁ ꢇꢃ ꢄꢅ ꢆꢂ ꢇꢈ
ꢊ ꢋꢈꢌ ꢍꢋꢎ ꢄ ꢏ ꢐ ꢑꢄ ꢒꢁꢏ ꢓ ꢔ ꢆ ꢑꢄ ꢒꢁꢏ ꢌꢈꢓꢈ ꢀꢏ ꢄꢏ ꢕꢓꢔ ꢍꢀꢖ ꢗꢋ ꢄꢓ ꢒꢎ ꢄꢏ ꢘꢏ ꢍ ꢀ
SCLS397F − APRIL 1998 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
S1
R
= 1 kΩ
L
TEST
S1
From Output
Under Test
Test
Point
From Output
Under Test
GND
t
t
/t
Open
PLH PHL
/t
C
C
L
t
V
CC
L
PLZ PZL
/t
(see Note A)
(see Note A)
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
V
CC
su
V
CC
50% V
CC
50% V
CC
Input
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
50% V
CC
50% V
t
CC
CC
0 V
0 V
t
t
t
t
PZL
PLH
PHL
PLZ
+ 0.3 V
OL
Output
Waveform 1
V
OH
≈V
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
V
S1 at V
(see Note B)
CC
V
OL
OL
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
V
OH
OH
Out-of-Phase
Output
V
OH
− 0.3 V
50% V
CC
50% V
50% V
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PLH
are the same as t
.
dis
PLZ
PZL
PHL
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
SN74LV157AD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV157ADBR
SN74LV157ADBRE4
SN74LV157ADBRG4
SN74LV157ADE4
SSOP
SSOP
SSOP
SOIC
DB
DB
DB
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV157ADG4
SN74LV157ADGVR
SN74LV157ADGVRE4
SN74LV157ADGVRG4
SN74LV157ADR
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV157ADRE4
SN74LV157ADRG4
SN74LV157ANSR
SN74LV157ANSRE4
SN74LV157ANSRG4
SN74LV157APW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
NS
NS
PW
PW
PW
PW
PW
PW
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV157APWE4
SN74LV157APWG4
SN74LV157APWR
SN74LV157APWRE4
SN74LV157APWRG4
SN74LV157APWT
SN74LV157APWTE4
SN74LV157APWTG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
(mm)
16
SN74LV157ADBR
SN74LV157ADGVR
SN74LV157ADR
DB
DGV
D
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
8.2
6.8
6.5
8.2
7.0
6.6
4.0
2.5
1.6
2.1
2.5
1.6
12
8
16
16
16
16
12
Q1
Q1
Q1
Q1
Q1
12
16
10.3
10.5
5.6
8
SN74LV157ANSR
SN74LV157APWR
NS
16
12
8
PW
12
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74LV157ADBR
SN74LV157ADGVR
SN74LV157ADR
DB
DGV
D
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
346.0
346.0
342.9
346.0
346.0
346.0
346.0
336.6
346.0
346.0
33.0
29.0
28.58
33.0
29.0
SN74LV157ANSR
SN74LV157APWR
NS
PW
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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