SN74LV221ADGVRE4 [TI]
DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS; 施密特触发器输入双单稳态触发器
| 型号： | SN74LV221ADGVRE4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL MONOSTABLE MULTIVIBRATORS WITH SCHMITT-TRIGGER INPUTS |
| 文件： | 总22页 (文件大小：578K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁꢊ ꢃꢄꢅ ꢆꢆ ꢇꢈ
ꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
ꢋ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
D
D
D
D
2-V to 5.5-V V
Operation
D
D
D
I
Supports Partial-Power-Down Mode
CC
off
Operation
Max t of 11 ns at 5 V
pd
Support Mixed-Mode Voltage Operation on
All Ports
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
Schmitt-Trigger Circuitry on A, B, and CLR
Inputs for Slow Input Transition Rates
D
Overriding Clear Terminates Output Pulse
Glitch-Free Power-Up Reset on Outputs
− 1000-V Charged-Device Model (C101)
D
SN54LV221A . . . FK PACKAGE
(TOP VIEW)
SN54LV221A . . . J OR W PACKAGE
SN74LV221A . . . D, DB, DGV, NS, OR PW PACKAGE
(TOP VIEW)
1A
1B
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
1R /C
ext ext
1CLR
1Q
1C
1Q
ext
3
2
1 20 19
18
1C
1Q
1CLR
1Q
4
5
6
7
8
ext
2Q
12 2Q
17
16
11
10
9
2C
2CLR
2B
ext
NC
NC
2R /C
ext ext
GND
15 2Q
14
9 10 11 12 13
2Q
2A
2CLR
2C
ext
NC − No internal connection
description/ordering information
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube of 40
SN74LV221AD
SOIC − D
LV221A
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 90
SN74LV221ADR
SN74LV221ANSR
SN74LV221ADBR
SN74LV221APW
SN74LV221APWR
SN74LV221APWT
SN74LV221ADGVR
SNJ54LV221AJ
SOP − NS
74LV221A
LV221A
SSOP − DB
−40°C to 85°C
Reel of 2000
Reel of 250
Reel of 2000
Tube of 25
TSSOP − PW
LV221A
TVSOP − DGV
CDIP − J
LV221A
SNJ54LV221AJ
SNJ54LV221AW
SNJ54LV221AFK
CFP − W
Tube of 150
Tube of 55
SNJ54LV221AW
SNJ54LV221AFK
−55°C to 125°C
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2005, Texas Instruments Incorporated
ꢌ ꢁ ꢄꢑꢀꢀ ꢎ ꢏꢕ ꢑꢓꢔ ꢒꢀ ꢑ ꢁ ꢎꢏꢑꢋ ꢚꢛ ꢜꢝ ꢞꢟꢠ ꢡꢢꢣ ꢤꢚ ꢠꢟ ꢤꢚꢥ ꢜꢤꢝ ꢙꢓ ꢎ ꢋ ꢌ ꢖꢏ ꢒꢎ ꢁ
ꢚ
ꢋ
ꢈ
ꢏ
ꢈ
ꢜ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢠ
ꢡ
ꢧ
ꢧ
ꢣ
ꢤ
ꢚ
ꢥ
ꢝ
ꢟ
ꢦ
ꢨ
ꢡ
ꢩ
ꢪ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢞ
ꢥ
ꢣ
ꢫ
ꢙ
ꢧ
ꢟ
ꢞ
ꢡ
ꢠ
ꢚ
ꢝ
ꢠ
ꢟ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢚ
ꢟ
ꢝ
ꢨ
ꢣ
ꢠ
ꢜ
ꢦ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢝ
ꢨ
ꢣ
ꢧ
ꢚ
ꢛ
ꢣ
ꢚ
ꢣ
ꢧ
ꢢ
ꢝ
ꢟ
ꢦ
ꢏ
ꢣ
ꢬ
ꢥ
ꢝ
ꢒ
ꢤ
ꢝ
ꢚ
ꢧ
ꢡ
ꢢ
ꢣ
ꢤ
ꢚ
ꢝ
ꢝ
ꢚ
ꢥ
ꢤ
ꢞ
ꢥ
ꢧ
ꢞ
ꢭ
ꢥ
ꢧ
ꢧ
ꢥ
ꢤ
ꢚ
ꢮ
ꢫ
ꢙ
ꢧ
ꢟ
ꢞ
ꢡ
ꢠ
ꢚ
ꢜ
ꢟ
ꢤ
ꢨꢥ ꢧ ꢥ ꢢ ꢣ ꢚ ꢣ ꢧ ꢝ ꢫ
ꢨ
ꢧ
ꢟ
ꢠ
ꢣ
ꢝ
ꢝ
ꢜ
ꢤ
ꢯ
ꢞ
ꢟ
ꢣ
ꢝ
ꢤ
ꢟ
ꢚ
ꢤ
ꢣ
ꢠꢣ
ꢝ
ꢝ
ꢥ
ꢧ
ꢜ
ꢪ
ꢮ
ꢜ
ꢤ
ꢠ
ꢪ
ꢡ
ꢞ
ꢣ
ꢚ
ꢣ
ꢝ
ꢚ
ꢜ
ꢤ
ꢯ
ꢟ
ꢦ
ꢥ
ꢪ
ꢪ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
description/ordering information (continued)
The ’LV221A devices are dual multivibrators designed for 2-V to 5.5-V V
operation. Each multivibrator has
CC
a negative-transition-triggered (A) input and a positive-transition-triggered (B) input, either of which can be used
as an inhibit input.
These edge-triggered multivibrators feature output pulse-duration control by three methods. In the first method,
the A input is low and the B input goes high. In the second method, the B input is high and the A input goes low.
In the third method, the A input is low, the B input is high, and the clear (CLR) input goes high.
The output pulse duration is programmable by selecting external resistance and capacitance values. The
external timing capacitor must be connected between C
and R /C (positive) and an external resistor
ext
ext ext
connected between R /C and V . To obtain variable pulse durations, connect an external variable resistor
ext ext
CC
between R /C and V . The output pulse duration also can be reduced by taking CLR low.
ext ext
CC
Pulse triggering occurs at a particular voltage level and is not related directly to the transition time of the input
pulse. The A, B, and CLR inputs have Schmitt triggers with sufficient hysteresis to handle slow input transition
rates with jitter-free triggering at the outputs.
Once triggered, the outputs are independent of further transitions of the A and B inputs and are a function of
the timing components, or the output pulses can be terminated by the overriding clear. Input pulses can be of
any duration relative to the output pulse. Output pulse duration can be varied by choosing the appropriate timing
components. Output rise and fall times are TTL compatible and independent of pulse duration. Typical triggering
and clearing sequences are illustrated in the input/output timing diagram.
The variance in output pulse duration from device to device typically is less than 0.5% for given external timing
components. An example of this distribution for the ’LV221A is shown in Figure 8. Variations in output pulse
duration versus supply voltage and temperature are shown in Figure 5.
During power up, Q outputs are in the low state, and Q outputs are in the high state. The outputs are glitch free,
without applying a reset pulse.
These devices are fully specified for partial-power-down applications using I . The I circuitry disables the
off
off
outputs, preventing damaging current backflow through the devices when they are powered down.
Pin assignments are identical to those of the ’AHC123A and ’AHCT123A devices, so the ’LV221A can be
substituted for those devices not using the retrigger feature.
For additional application information on multivibrators, see the application report Designing With The
SN74AHC123A and SN74AHCT123A, literature number SCLA014.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢆ ꢇꢈ
ꢋꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
FUNCTION TABLE
(each multivibrator)
INPUTS
OUTPUTS
FUNCTION
CLR
L
A
X
H
X
L
B
X
X
L
Q
L
L
L
Q
H
H
H
Reset
Inhibit
Inhibit
H
H
H
↑
Outputs enabled
Outputs enabled
Outputs enabled
H
↓
L
H
H
†
↑
†
This condition is true only if the output of the latch formed by the
NAND gate has been conditioned to the logic 1 state prior to CLR
going high. This latch is conditioned by taking either A high or B
low while CLR is inactive (high).
logic diagram, each multivibrator (positive logic)
R
C
/C
ext ext
A
B
ext
Q
Q
CLR
R
input/output timing diagram
A
B
CLR
R
/C
ext ext
Q
Q
t
t
t
w
w
w
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range in high or low state, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Output voltage range in power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
OK
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 108°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢆ ꢇꢈ
ꢋꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
recommended operating conditions (see Note 4)
SN54LV221A
SN74LV221A
UNIT
MIN
2
MAX
MIN
2
MAX
V
V
Supply voltage
5.5
5.5
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
1.5
1.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
V
× 0.7
V
V
V
× 0.7
CC
CC
CC
CC
CC
CC
High-level input voltage
V
V
IH
V
V
× 0.7
× 0.7
× 0.7
× 0.7
0.5
0.5
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
V
V
V
× 0.3
× 0.3
× 0.3
5.5
V
V
V
× 0.3
× 0.3
× 0.3
5.5
CC
CC
CC
CC
CC
CC
V
IL
Low-level input voltage
V
V
Input voltage
0
0
0
0
V
V
I
Output voltage
V
V
CC
O
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
−50
−2
−6
−12
50
2
−50
−2
−6
−12
50
2
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
High-level output current
OH
OL
mA
µA
= 2.3 V to 2.7 V
= 3 V to 3.6 V
= 4.5 V to 5.5 V
= 2 V
I
Low-level output current
External timing resistance
6
6
mA
12
12
5k
1k
5k
1k
R
C
Ω
ext
ext
≥ 3 V
External timing capacitance
Power-up ramp rate
No restriction
1
No restriction
1
pF
ms/V
°C
∆t/∆V
CC
T
Operating free-air temperature
−55
125
−40
85
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
ꢙ
ꢓ
ꢎ
ꢋ
ꢌ
ꢖ
ꢏ
ꢙ
ꢓ
ꢑ
ꢅ
ꢒ
ꢑ
ꢔ
ꢜ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢠ
ꢟ
ꢤ
ꢠ
ꢣ
ꢧ
ꢤ
ꢝ
ꢨ
ꢧ
ꢟ
ꢞ
ꢡ
ꢞꢣ ꢝ ꢜ ꢯꢤ ꢨꢛ ꢥ ꢝ ꢣ ꢟꢦ ꢞꢣ ꢰ ꢣ ꢪꢟ ꢨꢢꢣ ꢤꢚꢫ ꢖ ꢛꢥ ꢧꢥ ꢠꢚ ꢣꢧ ꢜꢝ ꢚꢜ ꢠ ꢞꢥ ꢚꢥ ꢥꢤ ꢞ ꢟꢚ ꢛꢣꢧ
ꢠ
ꢚ
ꢝ
ꢜ
ꢤ
ꢚ
ꢛ
ꢣ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢰ
ꢣ
ꢟ
ꢧ
ꢝ
ꢨ
ꢣ
ꢠ
ꢜ
ꢦ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢝ
ꢥ
ꢧ
ꢣ
ꢞ
ꢣ
ꢝ
ꢜ
ꢯ
ꢤ
ꢯ
ꢟ
ꢥ
ꢪ
ꢝ
ꢫ
ꢏ
ꢣ
ꢬ
ꢥ
ꢝ
ꢒ
ꢤ
ꢝ
ꢚ
ꢧ
ꢡ
ꢢ
ꢣ
ꢤ
ꢠ ꢛꢥ ꢤ ꢯꢣ ꢟꢧ ꢞꢜ ꢝ ꢠ ꢟꢤ ꢚꢜ ꢤꢡꢣ ꢚ ꢛꢣ ꢝ ꢣ ꢨꢧ ꢟꢞ ꢡꢠꢚ ꢝ ꢭ ꢜꢚꢛ ꢟꢡꢚ ꢤꢟꢚ ꢜꢠꢣ ꢫ
ꢚ
ꢝ
ꢧ
ꢣ
ꢝ
ꢣ
ꢧ
ꢰ
ꢣ
ꢝ
ꢚ
ꢛ
ꢣ
ꢧ
ꢜ
ꢯ
ꢛ
ꢚ
ꢚ
ꢟ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LV221A
SN74LV221A
PARAMETER
TEST CONDITIONS
UNIT
V
CC
MIN
TYP
MAX
MIN
−0.1
2
TYP
MAX
I
I
I
I
I
I
I
I
= −50 µA
= −2 mA
= −6 mA
= −12 mA
= 50 µA
= 2 mA
2 V to 5.5 V
2.3 V
3 V
V
CC
−0.1
2
V
CC
OH
OH
OH
OH
OL
OL
OL
OL
V
V
OH
2.48
3.8
2.48
3.8
4.5 V
2 V to 5.5 V
2.3 V
3 V
0.1
0.4
0.44
0.55
2.5
1
0.1
0.4
0.44
0.55
2.5
1
V
V
OL
= 6 mA
= 12 mA
4.5 V
2 V to 5.5 V
0
†
V = 5.5 V or GND
I
R
/C
ext ext
I
I
µA
µA
I
V = 5.5 V or GND
I
A, B, and CLR
Quiescent
0 to 5.5 V
5.5 V
2.3 V
3 V
1
1
V = V
or GND,
I = 0
O
20
20
CC
I
CC
220
280
650
975
220
280
650
975
5
Active state
(per circuit)
V = V
/C
ext ext
or GND,
= 0.5 V
I
CC
I
µA
CC
off
R
4.5 V
5.5 V
0
CC
I
V or V = 0 to 5.5 V
µA
I
O
3.3 V
5 V
1.9
1.9
1.9
1.9
C
V = V
or GND
pF
i
I
CC
†
This test is performed with the terminal in the off-state condition.
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 2.5 V 0.2 V
CC
T
= 25°C
SN54LV221A SN74LV221A
A
UNIT
MIN
6
MAX
MIN
6.5
MAX
MIN
6.5
MAX
CLR
t
w
Pulse duration
ns
A or B trigger
6
6.5
6.5
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 3.3 V 0.3 V
CC
T
= 25°C
SN54LV221A SN74LV221A
A
UNIT
MIN
5
MAX
MIN
5
MAX
MIN
5
MAX
CLR
t
w
Pulse duration
ns
A or B trigger
5
5
5
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 5 V 0.5 V
CC
T
= 25°C
SN54LV221A SN74LV221A
A
UNIT
MIN
5
MAX
MIN
5
MAX
MIN
5
MAX
CLR
t
w
Pulse duration
ns
A or B trigger
5
5
5
ꢙ
ꢓ
ꢎ
ꢋ
ꢌ
ꢖ
ꢏ
ꢙ
ꢓ
ꢑ
ꢅ
ꢒ
ꢑ
ꢔ
ꢜ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢠ
ꢟ
ꢤ
ꢠ
ꢣ
ꢧ
ꢤ
ꢝ
ꢨ
ꢧ
ꢟ
ꢞ
ꢡ
ꢠ
ꢚ
ꢝ
ꢜ
ꢤ
ꢚ
ꢛ
ꢣ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢰ
ꢣ
ꢟ
ꢧ
ꢞ
ꢣ
ꢝ
ꢣ
ꢥ
ꢜ
ꢠ
ꢤ
ꢯ
ꢤ
ꢨ
ꢛ
ꢤ
ꢞ
ꢥ
ꢝ
ꢝ
ꢠ
ꢣ
ꢥ
ꢟ
ꢟ
ꢦ
ꢞ
ꢣ
ꢤ
ꢰ
ꢣ
ꢯ
ꢝ
ꢪ
ꢟ
ꢟ
ꢥ
ꢣ
ꢨ
ꢪ
ꢨ
ꢢ
ꢣ
ꢏ
ꢞ
ꢤ
ꢣ
ꢡ
ꢚ
ꢫ
ꢬ
ꢠ
ꢖ
ꢛ
ꢤ
ꢜ
ꢥ
ꢝ
ꢚ
ꢧ
ꢚ
ꢛ
ꢥ
ꢠ
ꢚ
ꢢ
ꢣ
ꢧ
ꢣ
ꢤ
ꢜ
ꢤ
ꢝ
ꢚ
ꢟ
ꢚ
ꢝ
ꢚ
ꢜ
ꢠ
ꢧ
ꢠ
ꢞ
ꢥ
ꢧ
ꢚ
ꢰ
ꢥ
ꢣ
ꢥ
ꢤ
ꢣ
ꢞ
ꢟ
ꢚ
ꢛ
ꢚ
ꢣ
ꢧ
ꢝ
ꢨ
ꢜ
ꢦ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢧ
ꢣ
ꢞ
ꢣ
ꢡ
ꢝ
ꢜ
ꢯ
ꢝ
ꢫ
ꢥ
ꢚ
ꢝ
ꢒ
ꢧ
ꢡ
ꢣ
ꢝ
ꢣ
ꢝ
ꢚ
ꢛ
ꢧ
ꢜ
ꢯ
ꢛ
ꢚ
ꢟ
ꢠ
ꢛ
ꢯ
ꢣ
ꢟ
ꢧ
ꢜ
ꢝ
ꢤ
ꢚ
ꢜ
ꢤ
ꢣ
ꢚ
ꢛ
ꢣ
ꢧ
ꢟ
ꢝ
ꢭ
ꢟ
ꢡ
ꢚ
ꢜ
ꢣ
ꢫ
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢆ ꢇꢈ
ꢋꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
V
= 2.5 V 0.2 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV221A SN74LV221A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
UNIT
MIN
TYP
MAX
MIN
MAX
MIN
MAX
14.6* 31.4*
13.2* 25*
15.2* 33.4*
1*
37*
1
37
A or B
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
1* 29.5*
1
1
1
1
1
29.5
39
t
C
C
= 15 pF
ns
CLR
CLR trigger
A or B
pd
L
1*
1
39*
42
16.7
15
36
32.8
38
42
1
34.5
44
34.5
44
t
pd
= 50 pF
= 50 pF,
= 28 pF,
= 2 kΩ
ns
CLR
L
17.4
1
CLR trigger
C
L
C
R
203
100
260
110
1.1
320
110
1.1
320
110
1.1
ns
ext
ext
C
= 50 pF,
= 0.01 µF,
= 10 kΩ
L
†
t
C
90
90
90
ms
Q or Q
ext
w
R
ext
C
= 50 pF,
= 0.1 µF,
= 10 kΩ
L
C
R
0.9
1
1
0.9
0.9
ms
%
ext
ext
‡
∆t
C
= 50 pF
L
w
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†
‡
t
= Pulse duration at Q and Q outputs
w
∆t = Output pulse-duration variation (Q and Q) between circuits in same package
w
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
SN54LV221A
SN74LV221A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
UNIT
MIN
TYP
MAX
MIN
MAX
MIN
MAX
10.2* 20.6*
9.3* 15.8*
10.6* 22.4*
1*
24*
1
24
A or B
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
1* 18.5*
1
1
1
1
1
18.5
26
t
C
C
= 15 pF
ns
CLR
CLR trigger
A or B
pd
L
1*
1
26*
27.5
22
11.8
10.6
12.3
24.1
19.3
25.9
27.5
22
1
t
pd
= 50 pF
= 50 pF,
= 28 pF,
= 2 kΩ
ns
CLR
L
1
29.5
29.5
CLR trigger
C
L
C
R
186
100
240
110
1.1
300
110
1.1
300
110
1.1
ns
ext
ext
C
= 50 pF,
= 0.01 µF,
= 10 kΩ
L
†
t
C
90
90
90
ms
Q or Q
ext
w
R
ext
C
= 50 pF,
= 0.1 µF,
= 10 kΩ
L
C
R
0.9
1
1
0.9
0.9
ms
%
ext
ext
‡
∆t
C
= 50 pF
L
w
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†
‡
t
= Pulse duration at Q and Q outputs
w
∆t = Output pulse-duration variation (Q and Q) between circuits in same package
w
ꢙ
ꢓ
ꢎ
ꢋ
ꢌ
ꢖ
ꢏ
ꢙ
ꢓ
ꢑ
ꢅ
ꢒ
ꢑ
ꢔ
ꢜ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢠ
ꢟ
ꢤ
ꢠ
ꢣ
ꢧ
ꢤ
ꢝ
ꢨ
ꢧ
ꢟ
ꢞ
ꢡ
ꢞꢣ ꢝ ꢜ ꢯꢤ ꢨꢛ ꢥ ꢝ ꢣ ꢟꢦ ꢞꢣ ꢰ ꢣ ꢪꢟ ꢨꢢꢣ ꢤꢚꢫ ꢖ ꢛꢥ ꢧꢥ ꢠꢚ ꢣꢧ ꢜꢝ ꢚꢜ ꢠ ꢞꢥ ꢚꢥ ꢥꢤ ꢞ ꢟꢚ ꢛꢣꢧ
ꢠ
ꢚ
ꢝ
ꢜ
ꢤ
ꢚ
ꢛ
ꢣ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢰ
ꢣ
ꢟ
ꢧ
ꢝ
ꢨ
ꢣ
ꢠ
ꢜ
ꢦ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢝ
ꢥ
ꢧ
ꢣ
ꢞ
ꢣ
ꢝ
ꢜ
ꢯ
ꢤ
ꢯ
ꢟ
ꢥ
ꢪ
ꢝ
ꢫ
ꢏ
ꢣ
ꢬ
ꢥ
ꢝ
ꢒ
ꢤ
ꢝ
ꢚ
ꢧ
ꢡ
ꢢ
ꢣ
ꢤ
ꢠ ꢛꢥ ꢤ ꢯꢣ ꢟꢧ ꢞꢜ ꢝ ꢠ ꢟꢤ ꢚꢜ ꢤꢡꢣ ꢚ ꢛꢣ ꢝ ꢣ ꢨꢧ ꢟꢞ ꢡꢠꢚ ꢝ ꢭ ꢜꢚꢛ ꢟꢡꢚ ꢤꢟꢚ ꢜꢠꢣ ꢫ
ꢚ
ꢝ
ꢧ
ꢣ
ꢝ
ꢣ
ꢧ
ꢰ
ꢣ
ꢝ
ꢚ
ꢛ
ꢣ
ꢧ
ꢜ
ꢯ
ꢛ
ꢚ
ꢚ
ꢟ
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T
A
= 25°C
TYP
SN54LV221A SN74LV221A
FROM
(INPUT)
TO
(OUTPUT)
TEST
CONDITIONS
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
7.1*
12*
1*
14*
1
14
A or B
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
Q or Q
6.5*
9.4*
1*
1*
1
11*
15*
16
1
1
1
1
1
11
15
16
13
17
t
pd
C
C
= 15 pF
ns
CLR
CLR trigger
A or B
L
7.3* 12.9*
8.2
7.4
8.6
14
11.4
14.9
1
13
t
pd
= 50 pF
= 50 pF,
= 28 pF,
= 2 kΩ
ns
CLR
L
1
17
CLR trigger
C
L
C
R
171
100
200
110
1.1
240
110
1.1
240
110
1.1
ns
ext
ext
C
= 50 pF,
= 0.01 µF,
= 10 kΩ
L
†
t
C
90
90
90
ms
Q or Q
ext
w
R
ext
C
= 50 pF,
= 0.1 µF,
= 10 kΩ
L
C
R
0.9
1
1
0.9
0.9
ms
%
ext
ext
‡
∆t
w
C
= 50 pF
L
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
†
‡
t
= Pulse duration at Q and Q outputs
w
∆t = Output pulse-duration variation (Q and Q) between circuits in same package
w
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
V
TYP
50
UNIT
CC
3.3 V
C
Power dissipation capacitance
C
pF
pd
5 V
51
ꢙ
ꢓ
ꢎ
ꢋ
ꢌ
ꢖ
ꢏ
ꢙ
ꢓ
ꢑ
ꢅ
ꢒ
ꢑ
ꢔ
ꢜ
ꢤ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢠ
ꢟ
ꢤ
ꢠ
ꢣ
ꢧ
ꢤ
ꢝ
ꢨ
ꢧ
ꢟ
ꢞ
ꢡ
ꢠ
ꢞ ꢣ ꢝ ꢜ ꢯ ꢤ ꢨꢛ ꢥ ꢝ ꢣ ꢟꢦ ꢞꢣ ꢰ ꢣ ꢪ ꢟꢨ ꢢꢣ ꢤ ꢚꢫ ꢖ ꢛꢥ ꢧꢥ ꢠꢚ ꢣꢧ ꢜꢝ ꢚꢜ ꢠ ꢞꢥ ꢚꢥ ꢥꢤ ꢞ ꢟꢚ ꢛꢣꢧ
ꢚ
ꢝ
ꢜ
ꢤ
ꢚ
ꢛ
ꢣ
ꢦ
ꢟ
ꢧ
ꢢ
ꢥ
ꢚ
ꢜ
ꢰ
ꢣ
ꢟ
ꢧ
ꢝ
ꢨ
ꢣ
ꢠ
ꢜ
ꢦ
ꢜ
ꢠ
ꢥ
ꢚ
ꢜ
ꢟ
ꢤ
ꢝ
ꢥ
ꢧ
ꢣ
ꢞ
ꢣ
ꢝ
ꢜ
ꢯ
ꢤ
ꢯ
ꢟ
ꢥ
ꢪ
ꢝ
ꢫ
ꢏ
ꢣ
ꢬ
ꢥ
ꢝ
ꢒ
ꢤ
ꢝ
ꢚ
ꢧ
ꢡ
ꢢ
ꢣ
ꢤ
ꢠ ꢛ ꢥ ꢤ ꢯꢣ ꢟꢧ ꢞꢜ ꢝ ꢠ ꢟꢤ ꢚꢜ ꢤꢡ ꢣ ꢚ ꢛꢣ ꢝ ꢣ ꢨꢧ ꢟ ꢞꢡꢠ ꢚꢝ ꢭ ꢜꢚꢛ ꢟꢡꢚ ꢤꢟꢚ ꢜꢠꢣ ꢫ
ꢚ
ꢝ
ꢧ
ꢣ
ꢝ
ꢣ
ꢧ
ꢰ
ꢣ
ꢝ
ꢚ
ꢛ
ꢣ
ꢧ
ꢜ
ꢯ
ꢛ
ꢚ
ꢚ
ꢟ
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢆ ꢇꢈ
ꢋꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
Test
Point
t
w
V
CC
C
L
Inputs or
Outputs
(see Note A)
50% V
50% V
CC
CC
0 V
LOAD CIRCUIT
VOLTAGE WAVEFORMS
PULSE DURATION
V
CC
Input A
(see Note B)
50% V
CC
0 V
V
V
CC
Input CLR
(see Note B)
50% V
CC
50% V
CC
CC
Input B
0 V
50% V
(see Note B)
CC
t
t
t
0 V
PLH
PHL
t
t
V
PLH
OH
In-Phase
Output
V
V
OH
50% V
50% V
CC
CC
V
In-Phase
Output
50% V
CC
OL
OL
t
PHL
PLH
PHL
V
V
V
OH
OH
Out-of-Phase
Output
Out-of-Phase
Output
50% V
50% V
50% V
CC
CC
CC
V
OL
OL
VOLTAGE WAVEFORMS
DELAY TIMES
VOLTAGE WAVEFORMS
DELAY TIMES
NOTES: A.
C includes probe and jig capacitance.
L
B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t + 3 ns, t + 3 ns.
O
r
f
C. The outputs are measured one at a time, with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
APPLICATION INFORMATION
caution in use
To prevent malfunctions due to noise, connect a high-frequency capacitor between V
and GND, and keep
CC
the wiring between the external components and C and R /C terminals as short as possible.
ext
ext ext
power-down considerations
Large values of C can cause problems when powering down the ’LV221A because of the amount of energy
ext
stored in the capacitor. When a system containing this device is powered down, the capacitor can discharge
from V
through the protection diodes at pin 2 or pin 14. Current through the input protection diodes must be
CC
limited to 30 mA; therefore, the turn-off time of the V
power supply must not be faster than
CC
t = V
× C /30 mA. For example, if V
= 5 V and C = 15 pF, the V
supply must turn off no faster than
CC
ext
CC
ext
CC
t = (5 V) × (15 pF)/30 mA = 2.5 ns. Usually, this is not a problem because power supplies are heavily filtered
and cannot discharge at this rate. When a more rapid decrease of V
damage. To avoid this possibility, use external clamping diodes.
to zero occurs, the ’LV221A can sustain
CC
output pulse duration
The output pulse duration, t , is determined primarily by the values of the external capacitance (C ) and timing
w
T
resistance (R ). The timing components are connected as shown in Figure 2.
T
V
CC
R
T
C
T
To R /C
ext ext
Terminal
To C
ext
Terminal
Figure 2. Timing-Component Connections
The pulse duration is given by:
tw + K RT CT
(1)
if C is ≥ 1000 pF, K = 1.0
T
or
if C is < 1000 pF, K can be determined from Figure 7
T
where:
t
= pulse duration in ns
w
R
C
K
= external timing resistance in kΩ
= external capacitance in pF
= multiplier factor
T
T
Equation 1 and Figure 3 or 4 can be used to determine values for pulse duration, external resistance, and
external capacitance.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅꢆ ꢆ ꢇ ꢈꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆꢆ ꢇꢈ
ꢋꢌꢈ ꢄ ꢍ ꢎꢁ ꢎꢀ ꢏꢈꢐꢄ ꢑ ꢍ ꢌꢄꢏ ꢒꢅ ꢒ ꢐꢓ ꢈꢏꢎ ꢓꢀ
ꢔ ꢒꢏ ꢕ ꢀꢖꢕ ꢍꢒ ꢏꢏꢗꢏ ꢓꢒꢘ ꢘ ꢑꢓ ꢒ ꢁꢙ ꢌ ꢏꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
†
APPLICATION INFORMATION
OUTPUT PULSE DURATION
OUTPUT PULSE DURATION
vs
vs
EXTERNAL TIMING CAPACITANCE
EXTERNAL TIMING CAPACITANCE
1.00E+07
1.00E+06
1.00E+07
1.00E+06
V
T
A
= 3 V
V
= 4.5 V
CC
= 25°C
CC
T = 25°C
A
R
= 1 MΩ
R
= 1 MΩ
T
T
1.00E+05
1.00E+04
1.00E+05
1.00E+04
R
= 100 kΩ
R
= 100 kΩ
T
T
T
T
R
= 10 kΩ
= 1 kΩ
R
= 10 kΩ
= 1 kΩ
1.00E+03
1.00E+02
1.00E+03
1.00E+02
R
R
T
T
1
2
10
3
10
4
10
5
10
1
2
10
3
10
4
10
5
10
10
10
C
− External Timing Capacitance − pF
C
− External Timing Capacitance − pF
T
T
Figure 3
Figure 4
VARIATION IN OUTPUT PULSE DURATION
vs
TEMPERATURE
14%
12%
10%
t
= 866 ns at:
= 5 V
= 10 kΩ
= 50 pF
= 25°C
w
CC
T
T
A
V
R
C
V
= 2.5 V
CC
V
CC
V
CC
V
CC
= 3 V
T
= 3.5 V
= 4 V
8%
6%
4%
2%
V
CC
V
CC
V
CC
= 5 V
= 6 V
= 7 V
0%
−2%
−4%
−6%
−60 −40
−20
0
20
40
60
80
100
120
140
160
180
Temperature − °C
Figure 5
†
Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢆ ꢇꢈ ꢉ ꢀꢁ ꢊꢃ ꢄꢅ ꢆ ꢆꢇ ꢈ
ꢋ ꢌꢈꢄ ꢍ ꢎꢁꢎ ꢀꢏꢈꢐ ꢄꢑ ꢍꢌ ꢄꢏꢒ ꢅ ꢒ ꢐ ꢓꢈꢏꢎ ꢓꢀ
ꢔꢒ ꢏ ꢕ ꢀꢖ ꢕ ꢍꢒ ꢏ ꢏꢗꢏ ꢓꢒ ꢘ ꢘꢑ ꢓ ꢒ ꢁꢙ ꢌꢏ ꢀ
SCLS450G − DECEMBER 1999 − REVISED APRIL 2005
†
APPLICATION INFORMATION
OUTPUT PULSE DURATION CONSTANT
EXTERNAL CAPACITANCE
vs
vs
SUPPLY VOLTAGE
MULTIPLIER FACTOR
0.001
1.20
1.15
For Capacitor Values of
0.001 µF or Greater, K = 1.0
(K is Independent of R)
R
= 10 kΩ
= 25°C
T
T
A
w
t
= K × C × R
T T
1.10
1.05
1.00
0.95
0.90
C
= 1000 pF
T
0.0001
C
= 0.01 µF
= 0.1 µF
T
C
T
T
V
= 25°C
A
0.00001
= 5 V
CC
1.5
2
2.5
V
3
3.5
4
4.5
5
5.5
6
1.00 1.50 2.00 2.50 3.00 3.50 4.00 4.50
Multiplier Factor − K
− Supply Voltage − V
CC
Figure 6
Figure 7
DISTRIBUTION OF UNITS
vs
OUTPUT PULSE DURATION
V
= 5 V
CC
T
= 25°C
= 50 pF
= 10 kΩ
A
C
R
T
T
Mean = 856 ns
Median = 856 ns
Std. Dev. = 3.5 ns
−3 Std. Dev.
99% of Data Units
+3 Std. Dev.
Median
t
− Output Pulse Duration
w
Figure 8
†
Operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
SN74LV221AD
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV221ADBR
SN74LV221ADBRE4
SN74LV221ADBRG4
SN74LV221ADE4
SSOP
SSOP
SSOP
SOIC
DB
DB
DB
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV221ADG4
SN74LV221ADGVR
SN74LV221ADGVRE4
SN74LV221ADGVRG4
SN74LV221ADR
SOIC
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV221ADRE4
SN74LV221ADRG4
SN74LV221ANSR
SN74LV221ANSRE4
SN74LV221ANSRG4
SN74LV221APW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
NS
NS
PW
PW
PW
PW
PW
PW
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV221APWE4
SN74LV221APWG4
SN74LV221APWR
SN74LV221APWRE4
SN74LV221APWRG4
SN74LV221APWT
SN74LV221APWTE4
SN74LV221APWTG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
(mm)
16
SN74LV221ADBR
SN74LV221ADGVR
SN74LV221ADR
DB
DGV
D
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
8.2
6.8
6.5
8.2
7.0
6.6
4.0
2.5
1.6
2.1
2.5
1.6
12
8
16
16
16
16
12
Q1
Q1
Q1
Q1
Q1
12
16
10.3
10.5
5.6
8
SN74LV221ANSR
SN74LV221APWR
NS
16
12
8
PW
12
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74LV221ADBR
SN74LV221ADGVR
SN74LV221ADR
DB
DGV
D
16
16
16
16
16
SITE 41
SITE 41
SITE 27
SITE 41
SITE 41
346.0
346.0
342.9
346.0
346.0
346.0
346.0
336.6
346.0
346.0
33.0
29.0
28.58
33.0
29.0
SN74LV221ANSR
SN74LV221APWR
NS
PW
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements,
improvements, and other changes to its products and services at any time and to discontinue any product or service without notice.
Customers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s
standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this
warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily
performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should
provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask
work right, or other TI intellectual property right relating to any combination, machine, or process in which TI products or services
are used. Information published by TI regarding third-party products or services does not constitute a license from TI to use such
products or services or a warranty or endorsement thereof. Use of such information may require a license from a third party under
the patents or other intellectual property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is
accompanied by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an
unfair and deceptive business practice. TI is not responsible or liable for such altered documentation. Information of third parties
may be subject to additional restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service
voids all express and any implied warranties for the associated TI product or service and is an unfair and deceptive business
practice. TI is not responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would
reasonably be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement
specifically governing such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications
of their applications, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related
requirements concerning their products and any use of TI products in such safety-critical applications, notwithstanding any
applications-related information or support that may be provided by TI. Further, Buyers must fully indemnify TI and its
representatives against any damages arising out of the use of TI products in such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is
solely at the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in
connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products
are designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any
non-designated products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Data Converters
DSP
Applications
Audio
amplifier.ti.com
dataconverter.ti.com
dsp.ti.com
www.ti.com/audio
Automotive
Broadband
Digital Control
Military
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
interface.ti.com
logic.ti.com
Logic
Power Mgmt
Microcontrollers
RFID
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/lpw
Telephony
Low Power
Wireless
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2007, Texas Instruments Incorporated
相关型号：
©2020 ICPDF网 联系我们和版权申明