SN74LV8154_15 [TI]
Dual 16-Bit Binary Counters With 3-State Output Registers;型号: | SN74LV8154_15 |
厂家: | TEXAS INSTRUMENTS |
描述: | Dual 16-Bit Binary Counters With 3-State Output Registers |
文件: | 总15页 (文件大小:434K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢉꢊꢋ ꢄ ꢇ ꢌ ꢍꢎꢏ ꢐ ꢎꢏ ꢁꢋꢑꢒ ꢓ ꢔꢊ ꢁ ꢐꢕ ꢑ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ
ꢏ
ꢐ
ꢗ
ꢘ
ꢍ
ꢀ
ꢐ
ꢋ
ꢐ
ꢕ
ꢔ
ꢊ
ꢐ
ꢙ
ꢊ
ꢐ
ꢑ
ꢕ
ꢚ
ꢏ
ꢀ
ꢐ
ꢕ
ꢑ
SCLS589 − AUGUST 2004
N OR PW PACKAGE
(TOP VIEW)
D
Can Be Used as Two 16-Bit Counters or a
Single 32-Bit Counter
D
D
D
D
D
D
D
2-V to 5.5-V V
Operation
CC
CLKA
CLKB
GAL
GAU
GBL
1
2
3
4
5
6
7
8
9
10
20
V
CC
Max t of 25 ns at 5 V (RCLK to Y)
19 Y0
18 Y1
17 Y2
pd
Typical V
<0.7 V at V
(Output Ground Bounce)
OLP
CC
= 5 V, T = 25°C
A
16
Y3
Typical V
>4.4 V at V
(Output V
Undershoot)
OHV
CC
OH
GBU
RCLK
RCOA
CLKBEN
GND
15 Y4
= 5 V, T = 25°C
A
14
13
12
11
Y5
Y6
Y7
CCLR
I
Supports Partial-Power-Down Mode
off
Operation
Latch-Up Performance Exceeds 250 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
description/ordering information
The SN74LV8154 is a dual 16-bit binary counter with 3-state output registers, designed for 2-V to 5.5-V V
operation.
CC
This 16-bit counter (A or B) feeds a 16-bit storage register, and each storage register is further divided into an
upper byte and lower byte. The GAL, GAU, GBL, GBU inputs are used to select the byte that needs to be output
at Y0−Y7. CLKA is the clock for A counter, and CLKB is the clock for B counter. RCLK is the clock for the A and
B storage registers. All three clock signals are positive-edge triggered.
A 32-bit counter can be realized by connecting CLKA and CLKB together and by connecting RCOA to CLKBEN.
To ensure the high-impedance state during power up or power down, GAL, GAU, GBL, and GBU should be tied
to V through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability
CC
of the driver.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
Tube
SN74LV8154N
SN74LV8154N
−40°C to 85°C
Tube
SN74LV8154PW
SN74LV8154PWR
TSSOP − PW
LV8154
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
ꢙ
ꢙ
ꢑ
ꢔ
ꢪ
ꢉ
ꢥ
ꢊ
ꢓ
ꢣ
ꢐ
ꢤ
ꢏ
ꢞ
ꢔ
ꢜ
ꢁ
ꢝ
ꢉ
ꢋ
ꢐ
ꢋ
ꢛ
ꢜ
ꢦ
ꢝ
ꢞ
ꢤ
ꢟ
ꢠ
ꢡ
ꢡ
ꢢ
ꢢ
ꢛ
ꢛ
ꢞ
ꢞ
ꢜ
ꢜ
ꢛ
ꢣ
ꢣ
ꢧ
ꢤ
ꢥ
ꢟ
ꢟ
ꢦ
ꢦ
ꢜ
ꢢ
ꢡ
ꢠ
ꢣ
ꢣ
ꢞ
ꢝ
ꢧ
ꢐꢦ
ꢥ
ꢨ
ꢣ
ꢩ
ꢛ
ꢤ
ꢡ
ꢣ
ꢢ
ꢛ
ꢢ
ꢞ
ꢟ
ꢜ
ꢥ
ꢪ
ꢡ
ꢜ
ꢢ
ꢢ
ꢦ
ꢣ
ꢫ
Copyright 2004, Texas Instruments Incorporated
ꢟ
ꢞ
ꢤ
ꢢ
ꢞ
ꢟ
ꢠ
ꢢ
ꢞ
ꢣ
ꢧ
ꢛ
ꢝ
ꢛ
ꢤ
ꢦ
ꢟ
ꢢ
ꢬ
ꢢ
ꢦ
ꢟ
ꢞ
ꢝ
ꢭ
ꢡ
ꢏ
ꢜ
ꢠ
ꢦ
ꢣ
ꢢ
ꢡ
ꢜ
ꢪ
ꢡ
ꢟ
ꢪ
ꢮ
ꢡ
ꢢ ꢦ ꢣ ꢢꢛ ꢜꢰ ꢞꢝ ꢡ ꢩꢩ ꢧꢡ ꢟ ꢡ ꢠ ꢦ ꢢ ꢦ ꢟ ꢣ ꢫ
ꢟ
ꢟ
ꢡ
ꢜ
ꢢ
ꢯ
ꢫ
ꢙ
ꢟ
ꢞ
ꢪ
ꢥ
ꢤ
ꢢ
ꢛ
ꢞ
ꢜ
ꢧ
ꢟ
ꢞ
ꢤ
ꢦ
ꢣ
ꢣ
ꢛ
ꢜ
ꢰ
ꢪ
ꢞ
ꢦ
ꢣ
ꢜ
ꢞ
ꢢ
ꢜ
ꢦ
ꢤꢦ
ꢣ
ꢣ
ꢡ
ꢟ
ꢛ
ꢩ
ꢯ
ꢛ
ꢜ
ꢤ
ꢩ
ꢥ
ꢪ
ꢦ
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢃ
ꢉ ꢊꢋꢄ ꢇ ꢌꢍ ꢎꢏ ꢐ ꢎ ꢏꢁ ꢋꢑꢒ ꢓꢔ ꢊꢁ ꢐꢕ ꢑꢀ
ꢖꢏ ꢐ ꢗ ꢘ ꢍꢀꢐꢋꢐ ꢕ ꢔꢊꢐ ꢙ ꢊꢐ ꢑꢕ ꢚ ꢏꢀ ꢐꢕ ꢑꢀ
SCLS589 − AUGUST 2004
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Yn
GAL
L
GAU
H
GBL
H
GBU
H
Lower byte in A register
Upper byte in A register
Lower byte in B register
Upper byte in B register
Z
H
L
H
H
H
H
L
H
H
H
H
L
H
H
H
H
Combinations of GAL, GAU, GBL, GBU, other than those shown above, are
prohibited. If more than one input is L at the same time, the output data (Y0−Y7) may
be invalid.
timing diagram
CCKBEN
CCLR
CCKA
CCKB
RCLK
A
0000 0001 0002 0003 0004
0000 0001 0002 0003 0004
0100 0101 0102 0103
FFFD FFFE FFFF 0000 0001
FFFD FFFE FFFF 0000 0001
Counter
B
0100
0101 0102
Counter
GAL
GAU
GBL
GBU
Output
00
01
FF
Don’t Care
00
01
02
03
RCOA
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢉꢊꢋ ꢄ ꢇ ꢌ ꢍꢎꢏ ꢐ ꢎꢏ ꢁꢋꢑꢒ ꢓ ꢔꢊ ꢁ ꢐꢕ ꢑ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ
ꢏ
ꢐ
ꢗ
ꢘ
ꢍ
ꢀ
ꢐ
ꢋ
ꢐ
ꢕ
ꢔ
ꢊ
ꢐ
ꢙ
ꢊ
ꢐ
ꢑ
ꢕ
ꢚ
ꢏ
ꢀ
ꢐ
ꢕ
ꢑ
SCLS589 − AUGUST 2004
block diagram
Y0
4 to 1 Dec
4 to 1 Dec
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
Y1
CCKB
CCKBEN
16-Bit Counter B
Y2
Y3
Y4
4 to 1 Dec
4 to 1 Dec
4 to 1 Dec
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
R
RCLK
Y5
Y6
Y7
4 to 1 Dec
CCKA
CCLR
16-Bit Counter A
4 to 1 Dec
4 to 1 Dec
GAL
GAU
GBL
GBU
RCOA
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
O
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA
Package thermal impedance, θ (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W
JA
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
Storage temperature range, T
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢃ
ꢉ ꢊꢋꢄ ꢇ ꢌꢍ ꢎꢏ ꢐ ꢎ ꢏꢁ ꢋꢑꢒ ꢓꢔ ꢊꢁ ꢐꢕ ꢑꢀ
ꢖꢏ ꢐ ꢗ ꢘ ꢍꢀꢐꢋꢐ ꢕ ꢔꢊꢐ ꢙ ꢊꢐ ꢑꢕ ꢚ ꢏꢀ ꢐꢕ ꢑꢀ
SCLS589 − AUGUST 2004
recommended operating conditions (see Note 4)
V
CC
MIN
MAX
UNIT
V
Supply voltage
2
5.5
V
CC
IH
2 V
1.5
3 V to 3.6 V
4.5 V to 5.5 V
2 V
V
V
× 0.7
× 0.7
V
High-level input voltage
V
CC
CC
0.5
3 V to 3.6 V
4.5 V to 5.5 V
V
V
× 0.3
V
Low-level input voltage
V
V
CC
IL
× 0.3
CC
V
V
Input voltage
0
0
0
5.5
I
High or low state
3-state
V
CC
5.5
Output voltage
V
O
2 V
−50
−6
−12
−50
−6
−12
50
µA
3 V to 3.6 V
4.5 V to 5.5 V
2 V
Yn outputs
RCOA
mA
I
OH
High-level output current
µA
3 V to 3.6 V
4.5 V to 5.5 V
2 V
mA
µA
3 V to 3.6 V
4.5 V to 5.5 V
2 V
6
Yn outputs
RCOA
mA
12
I
OL
Low-level output current
50
µA
3 V to 3.6 V
4.5 V to 5.5 V
3 V to 3.6 V
4.5 V to 5.5 V
6
mA
12
100
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
ns/V
T
A
−40
85
°C
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢉꢊꢋ ꢄ ꢇ ꢌ ꢍꢎꢏ ꢐ ꢎꢏ ꢁꢋꢑꢒ ꢓ ꢔꢊ ꢁ ꢐꢕ ꢑ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ
ꢏ
ꢐ
ꢗ
ꢘ
ꢍ
ꢀ
ꢐ
ꢋ
ꢐ
ꢕ
ꢔ
ꢊ
ꢐ
ꢙ
ꢊ
ꢐ
ꢑ
ꢕ
ꢚ
ꢏ
ꢀ
ꢐ
ꢕ
ꢑ
SCLS589 − AUGUST 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
1.9
TYP
MAX
UNIT
V
CC
2 V
3 V
I
I
I
I
I
I
I
I
I
I
I
I
= −50 µA
= −6 mA
= −12 mA
= −50 µA
= −6 mA
= −12 mA
= 50 µA
= 6 mA
OH
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
2.48
3.8
Yn
RCOA
Yn
4.5 V
2 V
V
OH
V
1.9
3 V
2.48
3.8
4.5 V
2 V
0.1
0.44
0.55
0.1
0.44
0.55
1
3 V
= 12 mA
= 50 µA
= 6 mA
4.5 V
2 V
V
OL
V
3 V
RCOA
= 12 mA
4.5 V
0 to 5.5 V
5.5 V
5.5 V
0
I
I
I
I
V = 5.5 V or GND
µA
µA
µA
µA
pF
pF
I
I
V
= V
O CC
or GND
or GND, I = 0
5
OZ
CC
off
V = V
CC
20
I
O
V or V = 0 to 5.5 V
5
I
O
C
C
V = V
or GND
5 V
3
5
i
I
CC
V
= V
O CC
or GND
5 V
o
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 3.3 V 0.3 V
CC
MIN
10
MAX
UNIT
CLKA, CLKB, RCLK high or low
t
w
Pulse duration
ns
CCLR low
22
CLKBEN low before CLKB↑
13
CCLR high (inactive) before CLKA↑
or CLKB↑
13
13
13
CLKA↑ or CLKB↑ before RCLK↑
t
su
ns
Setup time
RCLK↑ before GAL or GAU or GBL or
GBU low
GAL or GAU or GBL or GBU high
(inactive) before RCLK↑
13
CLKBEN low after CLKB↑
0
0
t
t
ns
ns
Hold time
Z-period
h
CLKA or CLKB after RCLK
GAL, GAU, GBL, GBU all high before
one of them switches low
†
z
200
†
t
z
condition: C = 50 pF, R = 1 kΩ
L L
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢃ
ꢉ ꢊꢋꢄ ꢇ ꢌꢍ ꢎꢏ ꢐ ꢎ ꢏꢁ ꢋꢑꢒ ꢓꢔ ꢊꢁ ꢐꢕ ꢑꢀ
ꢖꢏ ꢐ ꢗ ꢘ ꢍꢀꢐꢋꢐ ꢕ ꢔꢊꢐ ꢙ ꢊꢐ ꢑꢕ ꢚ ꢏꢀ ꢐꢕ ꢑꢀ
SCLS589 − AUGUST 2004
timing requirements over recommended operating free-air temperature range, V
(unless otherwise noted) (see Figure 1)
= 5 V 0.5 V
CC
MIN
10
MAX
UNIT
CLKA, CLKB, RCLK high or low
CCLR low
t
w
Pulse duration
ns
20
CLKBEN low before CLKB↑
10
CCLR high (inactive) before CLKA↑
or CLKB↑
10
10
10
CLKA↑ or CLKB↑ before RCLK↑
t
su
ns
Setup time
RCLK↑ before GAL or GAU or GBL or
GBU low
GAL or GAU or GBL or GBU high
(inactive) before RCLK↑
10
CLKBEN low after CLKB↑
0
0
t
t
ns
ns
Hold time
Z-period
h
CLKA or CLKB after RCLK
GAL, GAU, GBL, GBU all high before
one of them switches low
†
z
200
†
t condition: C = 50 pF, R = 1 kΩ
z
L
L
switching characteristics over recommended operating free-air temperature range,
V
= 3.3 V 0.3 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
MHz
ns
MIN
TYP
MAX
C
C
= 15 pF
= 50 pF
40
25
1
L
L
f
MAX
RCLK
CLKA
CCLR
Y
22
26
18
38
44
32
t
pd
RCOA
RCOA
1
t
1
ns
ns
ns
PLH
C
C
= 15 pF
L
L
t
en
GAL, GAU, GBL, GBU
GAL, GAU, GBL, GBU
Y
Y
27
12
1
1
46
21
t
dis
RCLK
CLKA
CCLR
Y
25
28
20
1
1
1
42
46
35
t
pd
ns
RCOA
RCOA
t
ns
ns
ns
PLH
= 50 pF
t
en
GAL, GAU, GBL, GBU
GAL, GAU, GBL, GBU
Y
Y
30
14
1
1
50
24
t
dis
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢉꢊꢋ ꢄ ꢇ ꢌ ꢍꢎꢏ ꢐ ꢎꢏ ꢁꢋꢑꢒ ꢓ ꢔꢊ ꢁ ꢐꢕ ꢑ
ꢇ
ꢈ
ꢃ
ꢀ
ꢀ
ꢖ
ꢏ
ꢐ
ꢗ
ꢘ
ꢍ
ꢀ
ꢐ
ꢋ
ꢐ
ꢕ
ꢔ
ꢊ
ꢐ
ꢙ
ꢊ
ꢐ
ꢑ
ꢕ
ꢚ
ꢏ
ꢀ
ꢐ
ꢕ
ꢑ
SCLS589 − AUGUST 2004
switching characteristics over recommended operating free-air temperature range,
V
= 5 V 0.5 V (unless otherwise noted) (see Figure 1)
CC
T = 25°C
A
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
PARAMETER
MIN
MAX
UNIT
MHz
ns
MIN
TYP
MAX
C
C
= 15 pF
= 50 pF
40
25
1
L
L
f
MAX
RCLK
CLKA
CCLR
Y
14
16
12
25
27
20
t
pd
RCOA
RCOA
1
t
1
ns
ns
ns
PLH
C
C
= 15 pF
L
L
t
en
GAL, GAU, GBL, GBU
GAL, GAU, GBL, GBU
Y
Y
16
8
1
1
28
15
t
dis
RCLK
CLKA
CCLR
Y
16
17
13
1
1
1
27
28
21
t
pd
ns
RCOA
RCOA
t
ns
ns
ns
PLH
= 50 pF
t
en
GAL, GAU, GBL, GBU
GAL, GAU, GBL, GBU
Y
Y
18
9
1
1
30
16
t
dis
noise characteristics, V
= 5 V, C = 50 pF
L
CC
T
A
= 25°C
TYP
0.7
PARAMETER
UNIT
MIN
MAX
V
V
V
Quiet output, maximum dynamic V
V
V
V
OL(P)
OL(V)
OH(V)
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
−0.75
4.4
OL
OH
operating characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= No load, CCLK = 10 MHz, RCLK = 1 MHz
L
TYP
UNIT
C
Power dissipation capacitance
C
56
pF
pd
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈꢃ
ꢉ ꢊꢋꢄ ꢇ ꢌꢍ ꢎꢏ ꢐ ꢎ ꢏꢁ ꢋꢑꢒ ꢓꢔ ꢊꢁ ꢐꢕ ꢑꢀ
ꢖꢏ ꢐ ꢗ ꢘ ꢍꢀꢐꢋꢐ ꢕ ꢔꢊꢐ ꢙ ꢊꢐ ꢑꢕ ꢚ ꢏꢀ ꢐꢕ ꢑꢀ
SCLS589 − AUGUST 2004
PARAMETER MEASUREMENT INFORMATION
V
CC
Open
S1
R
= 1 kΩ
L
From Output
Under Test
Test
Point
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
C
C
PLH PHL
/t
L
L
t
V
CC
(see Note A)
(see Note A)
PLZ PZL
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
V
CC
50% V
CC
Timing Input
0 V
t
w
t
h
t
V
CC
su
V
CC
50% V
CC
50% V
CC
Input
Input
50% V
CC
50% V
CC
Data Input
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
V
CC
CC
Output
Control
50% V
CC
50% V
50% V
CC
50% V
CC
CC
0 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
CC
50% V
CC
CC
V
V
V
+ 0.3 V
S1 at V
(see Note B)
OL
CC
V
OL
OL
t
PHL
PLH
t
t
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
− 0.3 V
OH
50% V
CC
50% V
50% V
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time, with one input transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PLH
are the same as t
.
dis
PLZ
PZL
PHL
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN74LV8154N
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
N
20
20
20
20
20
20
20
20
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74LV8154NE4
SN74LV8154PW
PDIP
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LV8154PWE4
SN74LV8154PWG4
SN74LV8154PWR
SN74LV8154PWRE4
SN74LV8154PWRG4
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LV8154 :
Enhanced Product: SN74LV8154-EP
•
NOTE: Qualified Version Definitions:
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Sep-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LV8154PWR
TSSOP
PW
20
2000
330.0
16.4
6.95
7.1
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Sep-2009
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 20
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
SN74LV8154PWR
2000
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where
mandated by government requirements, testing of all parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual
property of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional
restrictions.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not
responsible or liable for any such statements.
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Amplifiers
Applications
Audio
Automotive
Broadband
Digital Control
Medical
Military
Optical Networking
Security
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
DSP
Clocks and Timers
Interface
www.ti.com/automotive
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/medical
www.ti.com/military
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
dsp.ti.com
www.ti.com/clocks
interface.ti.com
logic.ti.com
power.ti.com
microcontroller.ti.com
www.ti-rfid.com
Logic
Power Mgmt
Microcontrollers
RFID
Telephony
Video & Imaging
Wireless
RF/IF and ZigBee® Solutions www.ti.com/lprf
www.ti.com/wireless
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2009, Texas Instruments Incorporated
相关型号:
©2020 ICPDF网 联系我们和版权申明