SN74LVC162244DGG [TI]
16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS; 16位缓冲器/驱动器，具有三态输出
| 型号： | SN74LVC162244DGG |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总7页 (文件大小：96K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
DGG OR DL PACKAGE
(TOP VIEW)
Member of the Texas Instruments
Widebus Family
EPIC (Enhanced-Performance Implanted
CMOS) Submicron Process
1OE
1Y1
1Y2
GND
1Y3
1Y4
1
2
3
4
5
6
7
8
9
48 2OE
47 1A1
46 1A2
45 GND
44 1A3
43 1A4
Output Ports Have Equivalent 26-Ω Series
Resistors, So No External Resistors Are
Required
Typical V
< 0.8 V at V
(Output Ground Bounce)
OLP
= 3.3 V, T = 25°C
CC
A
V
42
V
CC
CC
Typical V
> 2 V at V
(Output V
Undershoot)
2Y1
2Y2
41 2A1
40 2A2
39 GND
38 2A3
37 2A4
36 3A1
35 3A2
34 GND
33 3A3
32 3A4
OHV
CC
OH
= 3.3 V, T = 25°C
A
GND 10
2Y3 11
2Y4 12
3Y1 13
3Y2 14
GND 15
3Y3 16
3Y4 17
ESD Protection Exceeds 2000 V Per
MIL-STD-883C, Method 3015; Exceeds
200 V Using Machine Model
(C = 200 pF, R = 0)
Latch-Up Performance Exceeds 250 mA Per
JEDEC Standard JESD-17
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
V
18
31
V
CC
CC
4Y1 19
4Y2 20
GND 21
4Y3 22
30 4A1
29 4A2
28 GND
27 4A3
Package Options Include Plastic 300-mil
Shrink Small-Outline (DL) and Thin Shrink
Small-Outline (DGG) Packages
23
24
26
25
4Y4
4OE
4A4
3OE
description
This 16-bit buffer/driver is designed for 2.7-V to
3.6-V V operation.
CC
The SN74LVC162244 is designed specifically to improve both the performance and density of 3-state memory
address drivers, clock drivers, and bus-oriented receivers and transmitters. The device can be used as four 4-bit
buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable
(OE) inputs. The outputs, which are designed to sink up to 12 mA, include 26-Ω resistors to reduce overshoot
and undershoot.
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup
CC
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN74LVC162244 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 4-bit buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC and Widebus are trademarks of Texas Instruments Incorporated.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
†
logic symbol
logic diagram (positive logic)
1
1
1OE
1OE
2OE
3OE
EN1
EN2
EN3
EN4
48
25
24
47
2
3
5
6
1Y1
1Y2
1Y3
1Y4
1A1
4OE
46
1A2
47
46
44
43
41
40
38
37
36
35
33
32
30
29
27
26
2
3
1
1
1
1
1
2
3
4
1A1
1A2
1A3
1A4
2A1
2A2
2A3
2A4
3A1
3A2
3A3
3A4
4A1
4A2
4A3
4A4
1Y1
1Y2
1Y3
1Y4
2Y1
2Y2
2Y3
2Y4
3Y1
3Y2
3Y3
3Y4
4Y1
4Y2
4Y3
4Y4
44
1A3
5
43
6
1A4
8
9
48
2OE
11
12
13
14
16
17
19
20
22
23
41
8
9
2Y1
2Y2
2Y3
2Y4
2A1
40
2A2
38
11
12
2A3
37
2A4
25
3OE
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC Publication 617-12.
36
13
14
16
17
3Y1
3Y2
3Y3
3Y4
3A1
35
3A2
33
3A3
32
3A4
24
4OE
30
19
20
22
23
4Y1
4Y2
4Y3
4Y4
4A1
29
4A2
27
4A3
26
4A4
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 4.6 V
I
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V
+ 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
IK
I
Output clamp current, I
(V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Continuous current through V
Maximum power dissipation at T = 55°C (in still air) (see Note 3): DGG package . . . . . . . . . . . . . . . . . . 1 W
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA
A
DL package . . . . . . . . . . . . . . . . . . 1.4 W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This value is limited to 4.6 V maximum.
3. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
Formoreinformation,refertothePackageThermalConsiderationsapplicationnoteinthe1994ABTAdvancedBiCMOSTechnology
Data Book, literature number SCBD002B.
recommended operating conditions (see Note 4)
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
V
V
V
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
V
V
= 2.7 V to 3.6 V
= 2.7 V to 3.6 V
CC
0.8
CC
0
0
V
V
CC
Output voltage
O
CC
–8
V
CC
V
CC
V
CC
V
CC
= 2.7 V
= 3 V
I
High-level output current
Low-level output current
mA
mA
OH
OL
–12
8
= 2.7 V
= 3 V
I
12
10
85
∆t/∆V
Input transition rise or fall rate
Operating free-air temperature
0
ns/V
T
A
–40
°C
NOTE 4: Unused control inputs must be held high or low to prevent them from floating.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
‡
PARAMETER
TEST CONDITIONS
V
CC
MIN TYP
–0.2
MAX
UNIT
I
I
I
I
I
I
I
I
= –100 µA
= –6 mA,
= –8 mA,
= –12 mA,
= 100 µA
= 6 mA,
MIN to MAX
V
OH
OH
OH
OH
OL
OL
OL
OL
CC
2.4
V
IH
V
IH
V
IH
= 2 V
= 2 V
= 2 V
3
V
V
V
OH
2.7
2
2
3
MIN to MAX
0.2
0.55
0.6
OL
V
IL
V
IL
V
IL
= 0.8 V
= 0.8 V
= 0.8 V
3
V
= 8 mA,
2.7
= 12 mA,
3
0.8
I
I
V = V
or GND
3.6
±5
µA
µA
I
I
CC
V = 0.8 V
I
3
75
V = 2 V
I
3
–75
I(hold)
V = 0 to 3.6 V
3.6
± 500
±10
20
I
I
I
V
= V
or GND
3.6
µA
µA
µA
pF
pF
OZ
O
CC
or GND,
V = V
I
I = 0
O
3.6
2.7 V to 3.6 V
3.3
CC
CC
I
i
One input at V
– 0.6 V,
Other inputs at V
CC
or GND
500
CC
CC
or GND
C
C
Control inputs V = V
2.5
3.5
I
CC
= V or GND
CC
A or B ports
V
O
3.3
o
†
‡
For conditions shown as MIN or MAX, use the appropriate values under recommended operating conditions.
All typical values are at V = 3.3 V, T = 25°C.
CC
A
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, C = 50 pF (unless otherwise noted) (see Figure 1)
L
V
CC
= 3.3 V ± 0.3 V
V = 2.7 V
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1.5
1.5
1.5
MAX
MIN
1.5
1.5
1.5
MAX
8
t
t
t
A
Y
Y
Y
7
9
7
ns
ns
ns
pd
en
dis
10
8
OE
OE
operating characteristics, V
= 3.3 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
= 50 pF, f = 10 MHz
L
TYP
20
2
UNIT
Outputs enabled
Outputs disabled
C
Power dissipation capacitance per buffer/driver
C
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN74LVC162244
16-BIT BUFFER/DRIVER
WITH 3-STATE OUTPUTS
SCAS545 – OCTOBER 1995
PARAMETER MEASUREMENT INFORMATION
6 V
TEST
S1
S1
Open
GND
500 Ω
From Output
Under Test
t
Open
6 V
pd
/t
t
PLZ PZL
t
/t
GND
PHZ PZH
C
= 50 pF
L
500 Ω
(see Note A)
2.7 V
0 V
LOAD CIRCUIT FOR OUTPUTS
1.5 V
Timing Input
Data Input
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
1.5 V
1.5 V
Input
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
0 V
Output
Control
1.5 V
1.5 V
Input
1.5 V
1.5 V
t
PZL
t
t
t
PHL
PLH
PHL
t
PLZ
Output
Waveform 1
S1 at 6 V
V
V
3 V
OH
1.5 V
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
– 0.3 V
OL
V
OL
OL
(see Note B)
t
PHZ
t
PLH
t
PZH
Output
Waveform 2
S1 at GND
V
V
V
OH
OH
OH
1.5 V
1.5 V
Output
0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
are the same as t
are the same as t
.
dis
en
.
pd
PLZ
PZL
PLH
PHZ
PZH
PHL
.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
6
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
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Copyright 1999, Texas Instruments Incorporated
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