SN74LVC16T245_15 [TI]
16-bit Dual-Supply Bus Transceiver;![SN74LVC16T245_15](http://pdffile.icpdf.com/pdf1/p00099/img/icpdf/SN74LVC16T245_530211_icpdf.jpg)
型号: | SN74LVC16T245_15 |
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描述: | 16-bit Dual-Supply Bus Transceiver |
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SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
FEATURES
DGG OR DGV PACKAGE
•
Control Inputs VIH/VIL Levels Are Referenced
(TOP VIEW)
to VCCA Voltage
1
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
•
VCC Isolation Feature – If Either VCC Input Is at
GND, Both Ports Are in the High-Impedance
State
1DIR
1B1
1B2
GND
1B3
1B4
1OE
1A1
1A2
GND
1A3
1A4
2
3
4
•
•
Overvoltage-Tolerant Inputs/Outputs Allow
Mixed-Voltage-Mode Data Communications
5
6
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
7
V
CCB
V
CCA
8
1B5
1B6
GND
1B7
1B8
2B1
2B2
GND
2B3
2B4
1A5
1A6
GND
1A7
1A8
2A1
2A2
GND
2A3
2A4
9
•
•
•
Ioff Supports Partial-Power-Down Mode
Operation
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
V
CCB
V
CCA
2B5
2B6
GND
2B7
2B8
2DIR
2A5
2A6
GND
2A7
2A8
2OE
DESCRIPTION/ORDERING INFORMATION
This 16-bit noninverting bus transceiver uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.65 V to 5.5 V. The B port is designed
to track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.8-V,
2.5-V, 3.3-V, and 5-V voltage nodes.
The SN74LVC16T245 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ
.
The SN74LVC16T245 is designed so that the control pins (1DIR, 2DIR, 1OE, and 2OE) are supplied by VCCA
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
SN74LVC16T245DGGR
SN74LVC16T245DGVR
SN74LVC16T245GQLR
SN74LVC16T245ZQLR
TOP-SIDE MARKING
LVC16T245
TSSOP – DGG
TVSOP – DGV
VFBGA – GQL
Tape and reel
Tape and reel
Tape and reel
Tape and reel
LDT245
LDT245
PREVIEW
–40°C to 85°C
VFBGA – ZQL (Pb-free)
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The VCC isolation feature ensures that if either VCC input is at GND, then both ports are in the high-impedance
state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
GQL OR ZQL PACKAGE
(TOP VIEW)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
J
K
TERMINAL ASSIGNMENTS(1)
1
2
3
4
5
6
A
B
C
D
E
F
1DIR
1B2
1B4
1B6
1B8
2B1
2B3
2B5
2B7
2DIR
NC
NC
NC
NC
1OE
1A2
1A4
1A6
1A8
2A1
2A3
2A5
2A7
2OE
1B1
1B3
1B5
1B7
2B2
2B4
2B6
2B8
NC
GND
VCCB
GND
GND
VCCA
GND
1A1
1A3
1A5
1A7
2A2
2A4
2A6
2A8
NC
G
H
J
GND
VCCB
GND
NC
GND
VCCA
GND
NC
K
(1) NC – No internal connection
FUNCTION TABLE(1)
(EACH 16-BIT SECTION)
CONTROL INPUTS
OUTPUT CIRCUITS
OPERATION
OE
L
DIR
L
A PORT
Enabled
Hi-Z
B PORT
Hi-Z
B data to A bus
A data to B bus
Isolation
L
H
Enabled
Hi-Z
H
X
Hi-Z
(1) Input circuits of the data I/Os always are active.
2
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
24
1
2DIR
1DIR
48
25
13
1OE
1B1
2OE
2B1
36
47
1A1
2A1
2
To Seven Other Channels
To Seven Other Channels
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCA
Supply voltage range
VCCB
–0.5
6.5
V
I/O ports (A port)
I/O ports (B port)
Control inputs
A port
–0.5
–0.5
–0.5
–0.5
–0.5
6.5
6.5
6.5
6.5
6.5
VI
Input voltage range(2)
V
Voltage range applied to any output
VO
VO
V
V
in the high-impedance or power-off state(2)
B port
A port
–0.5 VCCA + 0.5
Voltage range applied to any output in the high or low state(2)(3)
B port
–0.5 VCCB + 0.5
IIK
IOK
IO
Input clamp current
VI < 0
–50
–50
±50
±100
70
mA
mA
mA
mA
Output clamp current
VO < 0
Continuous output current
Continuous current through each VCCA, VCCB, and GND
DGG package
θJA
Package thermal impedance(4)
DGV package
58
°C/W
GQL/ZQL package
28
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
3
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
Recommended Operating Conditions(1)(2)(3)(4)
VCCI
VCCO
MIN
1.65
MAX UNIT
VCCA
VCCB
5.5
V
Supply voltage
1.65
5.5
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
V
CCI × 0.65
1.7
High-level
input voltage
VIH
VIL
VIH
Data inputs(5)
Data inputs(5)
V
2
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.7
V
CCI × 0.35
0.7
0.8
Low-level
input voltage
V
V
V
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
V
CCI × 0.3
VCCA × 0.65
1.7
2
High-level
input voltage
Control inputs
(referenced to VCCA
(6)
(6)
)
)
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
V
CCA × 0.7
VCCA × 0.35
0.7
Low-level
input voltage
Control inputs
(referenced to VCCA
VIL
VI
0.8
4.5 V to 5.5 V
V
CCA × 0.3
5.5
VCCO
5.5
–4
Input voltage
Control inputs
Active state
3-State
0
0
0
V
V
VI/O Input/output voltage
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
–8
IOH
High-level output current
Low-level output current
mA
mA
–24
–32
4
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
8
IOL
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
20
20
Input transition
rise or fall rate
∆t/∆v
Data inputs
ns/V
10
4.5 V to 5.5 V
5
TA
Operating free-air temperature
–40
85
°C
(1) VCCI is the VCC associated with the data input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure
proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature
number SCBA004.
(4) All unused data inputs of the device must be held at VCCA or GND to ensure proper device operation.
(5) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
(6) For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
4
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
Electrical Characteristics(1)(2)
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
MIN TYP
–40°C to 85°C
PARAMETER
TEST CONDITIONS
VCCA
VCCB
UNIT
MAX
MIN
VCCO – 0.1
1.2
MAX
IOH = –100 µA, VI = VIH
1.65 V to 4.5 V 1.65 V to 4.5 V
IOH = –4 mA,
IOH = –8 mA,
IOH = –24 mA,
IOH = –32 mA,
IOL = 100 µA,
IOL = 4 mA,
VI = VIH
VI = VIH
VI = VIH
VI = VIH
VI = VIL
VI = VIL
VI = VIL
VI = VIL
VI = VIL
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
VOH
1.9
V
2.4
4.5 V
4.5 V
3.8
1.65 V to 4.5 V 1.65 V to 4.5 V
0.1
0.45
0.3
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
VOL
IOL = 8 mA,
V
IOL = 24 mA,
IOL = 32 mA,
0.55
0.55
4.5 V
4.5 V
Control
inputs
II
VI = VCCA or GND
1.65 V to 5.5 V 1.65 V to 5.5 V
±1
±2
µA
µA
µA
0 V
0 to 5.5 V
0 V
±1
±1
±2
±2
A or B
port
Ioff
IOZ
VI or VO = 0 to 5.5 V
0 to 5.5 V
A or B
port
VO = VCCO or GND,
OE = VIH
1.65 V to 5.5 V 1.65 V to 5.5 V
1.65 V to 5.5 V 1.65 V to 5.5 V
±1
±2
20
20
–2
20
–2
20
VI = VCCI or GND,
IO = 0
ICCA
5 V
0 V
0 V
5 V
µA
1.65 V to 5.5 V 1.65 V to 5.5 V
VI = VCCI or GND,
IO = 0
ICCB
5 V
0 V
0 V
5 V
µA
µA
VI = VCCI or GND,
IO = 0
ICCA + ICCB
A port
1.65 V to 5.5 V 1.65 V to 5.5 V
30
50
One A port at VCCA – 0.6 V,
DIR at VCCA, B port = open
∆ICCA
3 V to 5.5 V
3 V to 5.5 V
µA
DIR at VCCA – 0.6 V,
B port = open,
DIR
50
A port at VCCA or GND
One B port at VCCB – 0.6 V,
DIR at GND, A port = open
∆ICCB
Ci
B port
3 V to 5.5 V
3.3 V
3 V to 5.5 V
3.3 V
50
5
µA
pF
pF
Control
inputs
VI = VCCA or GND
4
A or B
port
Cio
VO = VCCA/B or GND
3.3 V
3.3 V
8.5
10
(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.
5
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.2 V
± 0.3 V
PARAMETER
UNIT
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.7
21.9
1.3
9.2
23.6
29.4
13.1
23.8
16
1
7.4
0.8
7.1
23.4
29.2
10.3
23.7
10.8
ns
ns
ns
ns
ns
ns
B
0.9
1.6
2.4
0.4
1.8
23.8
29.6
32.2
24
0.8
1.5
1.9
0.4
1.6
0.7
1.5
1.7
0.4
1.2
23.4
29.3
12
0.7
1.4
1.3
0.4
0.9
OE
OE
OE
OE
23.7
12.6
32
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
VCCB = 3.3 V
VCCB = 5 V
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.2 V
± 0.3 V
PARAMETER
UNIT
MIN MAX MIN
MAX MIN
MAX MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.6 21.4
1.2
1
9
9.1
9
0.8
1
6.2
8.9
9
0.6
0.9
1.4
0.9
1
4.8
8.8
9
ns
ns
ns
ns
ns
ns
B
1.2
1.4
9.3
9
OE
OE
OE
OE
1.4
1.8
1
1.4
1.7
1
2.3 29.6
11
9.3
10.9
9.4
6.9
10.9
6.9
1
10.9
10.9
12.9
1.7 28.2
1.6
1.2
1
6
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V VCCB = 2.5 V
± 0.15 V ± 0.2 V
VCCB = 3.3 V
VCCB = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
± 0.3 V
PARAMETER
UNIT
MIN MAX MIN MAX
MIN
MAX MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5
0.9
1.6
2.1
0.8
1.6
21.2
7.2
8.2
29
1.1
0.8
1.6
1.7
0.8
1.4
8.8
6.2
0.8
6.1
6.1
6.2
8.6
7.8
8.5
0.5
0.6
1.6
0.8
0.8
0.9
4.4
6
ns
ns
ns
ns
ns
ns
B
0.7
1.6
1.5
0.8
1.1
OE
OE
OE
OE
8.2
8.2
6.3
7.8
8.4
10.3
7.8
7.8
27.7
12.4
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN
MAX
MIN
MAX MIN
MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.6 21.4
1
8.8
4.8
0.7
6
4.5
5.4
8
0.4
0.3
0.3
0.7
0.7
0.9
4.2
4.3
6.4
5.7
5.5
6
ns
ns
ns
ns
ns
ns
B
0.7
0.3
2
6.8
5.4
0.4
0.3
1.6
0.7
1.3
0.3
0.3
1.4
0.7
1
OE
OE
OE
OE
5.4
28.7
5.5
9.7
0.7
5.5
5.5
8.1
1.6 27.6
11.4
Operating Characteristics
TA = 25°C
VCCA
VCCB = 1.8 V
=
VCCA
VCCB = 2.5 V
=
VCCA
VCCB = 3.3 V
=
VCCA =
VCCB = 5 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
2
TYP
2
TYP
2
TYP
3
A-port input, B-port output
(1)
CpdA
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B-port input, A-port output
A-port input, B-port output
18
18
2
19
19
2
19
20
2
22
22
2
pF
(1)
CpdB
B-port input, A-port output
(1) Power dissipation capacitance per transceiver
7
SN74LVC16T245
16-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
www.ti.com
SCES636A–AUGUST 2005–REVISED AUGUST 2005
PARAMETER MEASUREMENT INFORMATION
2 × V
CCO
TEST
S1
S1
R
L
Open
GND
t
Open
pd
From Output
Under Test
t
t
/t
/t
2 × V
CCO
GND
PLZ PZL
PHZ PZH
C
L
R
L
(see Note A)
t
w
LOAD CIRCUIT
V
CCI
V
CCI
/2
V
CCI
/2
Input
C
L
V
TP
R
L
V
CCO
0 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
15 pF
15 pF
15 pF
15 pF
VOLTAGE WAVEFORMS
PULSE DURATION
0.3 V
V
CCA
Output
Control
(low-level
enabling)
V /2
CCA
V
CCA
/2
t
0 V
t
PZL
PLZ
V
V
CCO
Output
Waveform 1
V
CCI
V
/2
/2
CCO
Input
V
CCI
/2
V
CCI
/2
V
+ V
OL
TP
S1 at 2 × V
CCO
OL
0 V
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
OH
− V
TP
V
CCO
Output
V /2
CCO
V
CCO
/2
(see Note B)
0 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
H.
I.
t
t
t
V
V
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
pd
PHL
is the V associated with the input port.
CC
CCI
is the V associated with the output port.
CCO
CC
J. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
PACKAGING INFORMATION
Orderable Device
74LVC16T245DGGRE4
74LVC16T245DGGRG4
74LVC16T245DGVRG4
74LVC16T245DLRG4
SN74LVC16T245DGGR
SN74LVC16T245DGVR
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
DGG
48
48
48
48
48
48
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
SSOP
DGG
DGV
DL
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TVSOP
DGG
DGV
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC16T245DGVRG
SN74LVC16T245DL
ACTIVE
ACTIVE
TVSOP
SSOP
DGV
DL
48
48
TBD
Call TI
Call TI
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC16T245DLG4
SN74LVC16T245DLR
SN74LVC16T245GQLR
ACTIVE
ACTIVE
NRND
SSOP
SSOP
DL
DL
48
48
56
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
1000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
GQL
1000
TBD
SNPB
Level-1-240C-UNLIM
SN74LVC16T245ZQLR
ACTIVE
BGA MI
CROSTA
R JUNI
OR
ZQL
56
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
27-Sep-2007
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Jan-2008
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
330
330
330
330
(mm)
24
SN74LVC16T245DGGR
SN74LVC16T245DGVR
SN74LVC16T245DLR
SN74LVC16T245GQLR
SN74LVC16T245ZQLR
DGG
DGV
DL
48
48
48
56
56
SITE 41
SITE 41
SITE 41
SITE 60
SITE 60
8.6
6.8
15.8
10.1
16.2
7.3
1.8
1.6
3.1
1.5
1.5
12
12
16
8
24
24
32
16
16
Q1
Q1
Q1
Q1
Q1
24
32
11.35
4.8
GQL
ZQL
16
16
4.8
7.3
8
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
12-Jan-2008
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74LVC16T245DGGR
SN74LVC16T245DGVR
SN74LVC16T245DLR
SN74LVC16T245GQLR
SN74LVC16T245ZQLR
DGG
DGV
DL
48
48
48
56
56
SITE 41
SITE 41
SITE 41
SITE 60
SITE 60
346.0
346.0
346.0
342.9
342.9
346.0
346.0
346.0
345.9
345.9
41.0
41.0
49.0
GQL
ZQL
28.58
28.58
Pack Materials-Page 2
MECHANICAL DATA
MTSS003D – JANUARY 1995 – REVISED JANUARY 1998
DGG (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
48 PINS SHOWN
0,27
0,17
M
0,08
0,50
48
25
6,20
6,00
8,30
7,90
0,15 NOM
Gage Plane
0,25
1
24
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
48
56
64
DIM
A MAX
12,60
12,40
14,10
13,90
17,10
16,90
A MIN
4040078/F 12/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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