SN74LVC1G04QDBVRQ1 [TI]
汽车单路 1.65V 至 5.5V 反相器 | DBV | 5 | -40 to 125;
| 型号： | SN74LVC1G04QDBVRQ1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 汽车单路 1.65V 至 5.5V 反相器 | DBV | 5 | -40 to 125 栅 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总12页 (文件大小：362K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVC1G04-Q1
www.ti.com ...................................................................................................................................................... SCES482C–AUGUST 2003–REVISED APRIL 2008
SINGLE INVERTER GATE
1
FEATURES
•
Qualified for Automotive Applications
•
•
•
Low Power Consumption, 10-µA Max ICC
•
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
±24-mA Output Drive at 3.3 V
Ioff Supports Partial-Power-Down Mode
Operation
•
•
•
Supports 5-V VCC Operation
Inputs Accept Voltages to 5.5 V
Max tpd of 3.3 ns at 3.3 V
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
VCC
NC
A
1
2
3
5
NC
A
1
2
3
5
VCC
4
Y
GND
4
Y
GND
See mechanical drawings for dimensions.
NC - No internal connection
DESCRIPTION/ORDERING INFORMATION
This single inverter gate is designed for 1.65-V to 5.5-V VCC operation.
The SN74LVC1G04 performs the Boolean function Y = A.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
SN74LVC1G04QDBVRQ1
SN74LVC1G04QDCKRQ1
SN74LVC1G04IDCKRQ1
TOP-SIDE MARKING(3)
SOT (SOT-23) – DBV
Reel of 3000
Reel of 3000
Reel of 3000
C04_
CC_
CC_
–40°C to 125°C
–40°C to 85°C
SOT (SC-70) – DCK
SOT (SC-70) – DCK
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
web site at www.ti.com.
(2) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(3) DBV/DCK: The actual top-side marking has one additional character that designates the wafer fab/assembly site.
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
L
H
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2003–2008, Texas Instruments Incorporated
SN74LVC1G04-Q1
SCES482C–AUGUST 2003–REVISED APRIL 2008 ...................................................................................................................................................... www.ti.com
LOGIC DIAGRAM (POSITIVE LOGIC)
2
4
A
Y
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
6.5
UNIT
V
VCC Supply voltage range
VI
Input voltage range(2)
6.5
V
VO
VO
IIK
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high or low state(2)(3)
6.5
V
VCC + 0.5
–50
V
Input clamp current
VI < 0
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
±50
±100
206
DBV package
θJA
Package thermal impedance(4)
Storage temperature range
°C/W
°C
DCK package
252
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
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Copyright © 2003–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC1G04-Q1
SN74LVC1G04-Q1
www.ti.com ...................................................................................................................................................... SCES482C–AUGUST 2003–REVISED APRIL 2008
Recommended Operating Conditions(1)
MIN
1.65
MAX UNIT
Operating
5.5
V
VCC
Supply voltage
Data retention only
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
1.5
0.65 × VCC
1.7
VIH
High-level input voltage
V
2
0.7 × VCC
0.35 × VCC
0.7
VIL
Low-level input voltage
V
0.8
0.3 × VCC
5.5
VCC
–4
VI
Input voltage
0
0
V
V
VO
Output voltage
VCC = 1.65 V
VCC = 2.3 V
–8
IOH
High-level output current
Low-level output current
–16
–24
–32
4
mA
mA
VCC = 3 V
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
8
IOL
16
VCC = 3 V
24
VCC = 4.5 V
32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
Q-suffix device
20
Δt/Δv Input transition rise or fall rate
10
ns/V
5
–40
–40
125
85
TA
Operating free-air temperature
°C
I-suffix device
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Copyright © 2003–2008, Texas Instruments Incorporated
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SN74LVC1G04-Q1
SCES482C–AUGUST 2003–REVISED APRIL 2008 ...................................................................................................................................................... www.ti.com
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
1.65 V to 5.5 V
1.65 V
MIN TYP(1)
VCC – 0.1
MAX UNIT
IOH = –100 µA
IOH = –4 mA
1.2
1.9
2.4
2.3
3.8
IOH = –8 mA
2.3 V
VOH
V
IOH = –16 mA
IOH = –24 mA
IOH = –32 mA
IOL = 100 µA
3 V
4.5 V
1.65 V to 5.5 V
1.65 V
0.1
IOL = 4 mA
0.45
IOL = 8 mA
2.3 V
0.3
V
VOL
IOL = 16 mA
0.4
3 V
IOL = 24 mA
0.55
0.55
IOL = 32 mA
4.5 V
0 to 5.5 V
0
II
A input VI = 5.5 V or GND
VI or VO = 5.5 V
VI = 5.5 V or GND,
±5
±10
10
µA
µA
µA
µA
pF
Ioff
ICC
ΔICC
Ci
IO = 0
1.65 V to 5.5 V
3 V to 5.5 V
3.3 V
One input at VCC – 0.6 V,
VI = VCC or GND
Other inputs at VCC or GND
500
3.5
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
Switching Characteristics
over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1)
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V
± 0.15 V ± 0.2 V ± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
6.4 4.2 0.7 3.3 0.7 3.1
tpd
A
Y
2
1
ns
Switching Characteristics
over recommended operating free-air temperature range, CL = 30 pF or 50 pF (unless otherwise noted) (see Figure 2)
VCC = 1.8 V VCC = 2.5 V VCC = 3.3 V
± 0.15 V ± 0.2 V ± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX MIN MAX MIN MAX MIN MAX
tpd
A
Y
3
7.5
1.4
5.2
1
4.2
1
3.7
ns
Operating Characteristics
TA = 25°C
VCC = 1.8 V
TYP
VCC = 2.5 V
TYP
VCC = 3.3 V
TYP
VCC = 5 V
TYP
PARAMETER
TEST CONDITIONS
UNIT
Cpd
Power dissipation capacitance
f = 10 MHz
16
18
18
20
pF
4
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Copyright © 2003–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC1G04-Q1
SN74LVC1G04-Q1
www.ti.com ...................................................................................................................................................... SCES482C–AUGUST 2003–REVISED APRIL 2008
PARAMETER MEASUREMENT INFORMATION
VLOAD
Open
GND
S1
RL
From Output
Under Test
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
CL
(see Note A)
RL
LOAD CIRCUIT
INPUTS
VCC
VM
VLOAD
CL
RL
V
D
VI
tr/tf
VCC
VCC
3 V
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
£2 ns
£2 ns
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6 V
15 pF
15 pF
15 pF
15 pF
1 MW
0.15 V
0.15 V
0.3 V
1 MW
1 MW
1 MW
£2.5 ns
£2.5 ns
2 × VCC
0.3 V
VI
Timing Input
Data Input
VM
0 V
tW
tsu
th
VI
VI
Input
VM
VM
VM
VM
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VI
Output
Control
VM
VM
Input
VM
VM
0 V
0 V
tPZL
tPLZ
tPLH
tPHL
VM
Output
Waveform 1
S1 at VLOAD
VOH
VOL
VLOAD/2
VOL
VM
VM
Output
Output
VOL + V
D
(see Note B)
tPHL
tPLH
tPZH
tPHZ
VOH
VOL
Output
Waveform 2
S1 at GND
VOH
VOH – V
D
VM
VM
VM
»0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
Copyright © 2003–2008, Texas Instruments Incorporated
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Product Folder Link(s): SN74LVC1G04-Q1
SN74LVC1G04-Q1
SCES482C–AUGUST 2003–REVISED APRIL 2008 ...................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION
VLOAD
Open
GND
S1
RL
From Output
Under Test
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
CL
(see Note A)
RL
LOAD CIRCUIT
INPUTS
VCC
VM
VLOAD
CL
RL
V
D
VI
tr/tf
VCC
VCC
3 V
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
£2 ns
£2 ns
VCC/2
VCC/2
1.5 V
VCC/2
2 × VCC
2 × VCC
6 V
30 pF
30 pF
50 pF
50 pF
1 kW
0.15 V
0.15 V
0.3 V
500 W
500 W
500 W
£2.5 ns
£2.5 ns
2 × VCC
0.3 V
VI
Timing Input
Data Input
VM
0 V
tW
tsu
th
VI
VI
Input
VM
VM
VM
VM
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VI
VI
Output
Control
VM
VM
Input
VM
VM
0 V
0 V
tPZL
tPLZ
tPLH
tPHL
VM
Output
Waveform 1
S1 at VLOAD
VOH
VOL
VLOAD/2
VOL
VM
VM
Output
Output
VOL + V
D
(see Note B)
tPHL
tPLH
tPZH
tPHZ
VOH
VOL
Output
Waveform 2
S1 at GND
VOH
VOH – V
D
VM
VM
VM
»0 V
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR £ 10 MHz, ZO = 50 W.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
6
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Copyright © 2003–2008, Texas Instruments Incorporated
Product Folder Link(s): SN74LVC1G04-Q1
PACKAGE OPTION ADDENDUM
www.ti.com
3-Dec-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74LVC1G04QDBVRQ1
SN74LVC1G04QDCKRQ1
SOT-23
DBV
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
DCK
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC1G04-Q1 :
Catalog: SN74LVC1G04
Enhanced Product: SN74LVC1G04-EP
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
•
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