SN74LVC1G07DRY2 [TI]

具有漏极开路输出的单路 1.65V 至 5.5V 缓冲器 | DRY | 6 | -40 to 125;
SN74LVC1G07DRY2
型号: SN74LVC1G07DRY2
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

具有漏极开路输出的单路 1.65V 至 5.5V 缓冲器 | DRY | 6 | -40 to 125

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SN74LVC1G07  
www.ti.com  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
SINGLE BUFFER/DRIVER WITH OPEN-DRAIN OUTPUT  
Check for Samples: SN74LVC1G07  
1
FEATURES  
2
Available in the Texas Instruments  
Ioff Supports Partial-Power-Down Mode  
Operation  
Latch-Up Performance Exceeds 100 mA Per  
JESD 78, Class II  
ESD Protection Exceeds JESD 22  
NanoFreePackage  
Supports 5-V VCC Operation  
Input and Open-Drain Output Accept  
Voltages up to 5.5 V  
Max tpd of 4.2 ns at 3.3 V  
Low Power Consumption, 10-μA Max ICC  
±24-mA Output Drive at 3.3 V  
2000-V Human-Body Model (A114-A)  
200-V Machine Model (A115-A)  
1000-V Charged-Device Model (C101)  
DBV PACKAGE  
(TOP VIEW)  
DCK PACKAGE  
(TOP VIEW)  
DRL PACKAGE  
(TOP VIEW)  
1
2
3
5
4
N.C.  
A
VCC  
1
2
3
5
N.C.  
A
VCC  
1
2
3
N.C.  
A
5
4
VCC  
GND  
Y
4
GND  
Y
GND  
Y
DRY PACKAGE  
(TOP VIEW)  
DSF PACKAGE  
(TOP VIEW)  
1
2
3
6
5
4
VCC  
N.C.  
1
2
3
6
5
4
N.C.  
A
VCC  
A
N.C.  
Y
N.C.  
Y
GND  
N.C. – No internal connection  
See mechanical drawings for dimensions.  
GND  
YZP PACKAGE  
(TOP VIEW)  
Table 1. YZP PACKAGE TERMINAL  
ASSIGNMENTS  
A1  
B1  
C1  
A2  
B2  
C2  
DNU  
A
VCC  
1
2
VCC  
No ball  
Y
A
B
C
DNU  
A
GND  
Y
GND  
DNU – Do not use  
YZV PACKAGE  
(TOP VIEW)  
Table 2. YZV PACKAGE TERMINAL  
ASSIGNMENTS  
A1  
B1  
A2  
B2  
A
VCC  
Y
1
A
2
VCC  
Y
GND  
A
B
GND  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
NanoFree is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 20002011, Texas Instruments Incorporated  
 
SN74LVC1G07  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
www.ti.com  
DESCRIPTION/ORDERING INFORMATION  
This single buffer/driver is designed for 1.65-V to 5.5-V VCC operation.  
NanoFreepackage technology is a major breakthrough in IC packaging concepts, using the die as the  
package.  
The output of the SN74LVC1G07 device is open drain and can be connected to other open-drain outputs to  
implement active-low wired-OR or active-high wired-AND functions. The maximum sink current is 32 mA.  
This device is fully specified for partial-power-down applications using Ioff.The Ioff circuitry disables the outputs,  
preventing damaging current backflow through the device when it is powered down.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
TA  
PACKAGE(1) (2)  
MARKING(3)  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump YZP (Pb-free)  
Reel of 3000  
Reel of 3000  
SN74LVC1G07YZPR  
SN74LVC1G07YZVR  
_ _ _CV_  
NanoFree™ – WCSP (DSBGA)  
0.23-mm Large Bump YZV (Pb-free)  
_ _ _ _  
CV  
SN74LVC1G07DRYR  
SN74LVC1G07DRYRG4  
SN74LVC1G07DBVR  
SN74LVC1G07DBVT  
SN74LVC1G07DCKR  
SN74LVC1G07DCKT  
SN74LVC1G07DRLR  
SN74LVC1G07DSFR  
QFN DRY  
Reel of 5000  
CV  
40°C to 85°C  
Reel of 3000  
Reel of 250  
Reel of 3000  
Reel of 250  
Reel of 4000  
Reel  
SOT (SOT-23) DBV  
SOT (SC-70) DCK  
C07_  
CV_  
SOT (SOT-553) DRL  
µQFN DSF  
CV_  
CV  
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.  
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
website at www.ti.com.  
(3) DBV/DCK/DRL/DRY/DSF: The actual top-side marking has one additional character that designates the assembly/test site.  
YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following  
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2  
has two characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb, = Pb-free).  
2
Copyright © 20002011, Texas Instruments Incorporated  
SN74LVC1G07  
www.ti.com  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
Table 3. FUNCTION TABLE  
INPUT  
A
OUTPUT  
Y
L
L
Z
H
LOGIC DIAGRAM (POSITIVE LOGIC)  
(DBV, DCK, DRL, DSF, DRY, and YZP Package)  
2
4
A
Y
LOGIC DIAGRAM (POSITIVE LOGIC)  
(YZV Package)  
1
3
A
Y
ABSOLUTE MAXIMUM RATINGS(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
0.5  
0.5  
0.5  
0.5  
MAX  
6.5  
UNIT  
V
VCC Supply voltage range  
VI  
Input voltage range(2)  
6.5  
V
VO  
VO  
IIK  
Voltage range applied to any output in the high-impedance or power-off state(2)  
Voltage range applied to any output in the high or low state(2) (3)  
6.5  
V
6.5  
V
Input clamp current  
VI < 0  
VO < 0  
50  
50  
±50  
±100  
206  
252  
142  
234  
300  
132  
116  
150  
mA  
mA  
mA  
mA  
IOK  
IO  
Output clamp current  
Continuous output current  
Continuous current through VCC or GND  
DBV package  
DCK package  
DRL package  
DRY package  
DSF package  
YZP package  
YZV package  
θJA  
Package thermal impedance(4)  
°C/W  
°C  
Tstg  
Storage temperature range  
65  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The value of VCC is provided in the recommended operating conditions table.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
Copyright © 20002011, Texas Instruments Incorporated  
3
SN74LVC1G07  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
www.ti.com  
RECOMMENDED OPERATING CONDITIONS(1)  
MIN  
1.65  
MAX UNIT  
Operating  
5.5  
V
VCC  
Supply voltage  
Data retention only  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 3 V to 3.6 V  
VCC = 4.5 V to 5.5 V  
1.5  
0.65 × VCC  
1.7  
VIH  
High-level input voltage  
V
2
0.7 × VCC  
0.35 × VCC  
0.7  
VIL  
Low-level input voltage  
V
0.8  
0.3 × VCC  
VI  
Input voltage  
0
0
5.5  
5.5  
4
V
V
VO  
Output voltage  
VCC = 1.65 V  
VCC = 2.3 V  
8
IOL  
Low-level output current  
16  
24  
32  
20  
10  
5
mA  
VCC = 3 V  
VCC = 4.5 V  
VCC = 1.8 V ±0.15 V, 2.5 V ± 0.2 V  
VCC = 3.3 V ± 0.3 V  
VCC = 5 V ± 0.5 V  
Δt/Δv Input transition rise or fall rate  
ns/V  
TA  
Operating free-air temperature  
40  
85  
°C  
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
ELECTRICAL CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
VCC  
1.65 V to 5.5 V  
1.65 V  
MIN TYP(1) MAX  
UNIT  
IOL = 100 μA  
IOL = 4 mA  
0.1  
0.45  
0.3  
IOL = 8 mA  
2.3 V  
VOL  
V
IOL = 16 mA  
0.4  
3 V  
IOL = 24 mA  
0.55  
0.55  
±5  
IOL = 32 mA  
4.5 V  
0 to 5.5 V  
0
II  
A input  
VI = 5.5 V or GND  
VI or VO = 5.5 V  
VI = 5.5 V or GND,  
μA  
μA  
μA  
μA  
pF  
pF  
Ioff  
ICC  
ΔICC  
Ci  
±10  
10  
IO = 0  
1.65 V to 5.5 V  
3 V to 5.5 V  
3.3 V  
One input at VCC 0.6 V,  
VI = VCC or GND  
Other inputs at VCC or GND  
500  
4
Co  
VO = VCC or GND  
3.3 V  
5
(1) All typical values are at VCC = 3.3 V, TA = 25°C.  
4
Copyright © 20002011, Texas Instruments Incorporated  
SN74LVC1G07  
www.ti.com  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
SWITCHING CHARACTERISTICS  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
VCC = 1.8 V  
± 0.15 V  
VCC = 2.5 V  
± 0.2 V  
VCC = 3.3 V  
± 0.3 V  
VCC = 5 V  
± 0.5 V  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
MIN  
MAX MIN  
8.3  
MAX MIN  
5.5 1.5  
MAX MIN MAX  
4.2 3.5  
tpd  
A
Y
2.4  
1
1
ns  
OPERATING CHARACTERISTICS  
TA = 25°C  
VCC = 1.8 V  
VCC = 2.5 V VCC = 3.3 V VCC = 5 V  
PARAMETER  
TEST CONDITIONS  
UNIT  
TYP  
TYP  
TYP  
TYP  
Cpd Power dissipation capacitance  
f = 10 MHz  
3
3
4
6
pF  
Copyright © 20002011, Texas Instruments Incorporated  
5
SN74LVC1G07  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
(OPEN DRAIN)  
V
LOAD  
S1  
Open  
R
L
TEST  
S1  
From Output  
Under Test  
GND  
t
(see Notes E and F)  
(see Notes E and G)  
V
V
V
PZL  
LOAD  
LOAD  
LOAD  
R
L
C
L
t
PLZ  
(see Note A)  
t
/t  
PHZ PZH  
LOAD CIRCUIT  
INPUT  
V
M
V
LOAD  
C
L
V
R
L
V
CC  
V
I
t /t  
r f  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
3.3 V ± 0.3 V  
5 V ± 0.5 V  
V
2 ns  
2 ns  
2.5 ns  
2.5 ns  
V
/2  
/2  
2 × V  
2 × V  
6 V  
1 kΩ  
500 Ω  
500 Ω  
500 Ω  
0.15 V  
0.15 V  
0.3 V  
30 pF  
30 pF  
50 pF  
50 pF  
CC  
CC  
CC  
V
CC  
V
CC  
CC  
3 V  
1.5 V  
/2  
V
CC  
V
CC  
2 × V  
CC  
0.3 V  
V
I
Timing Input  
Data Input  
V
M
0 V  
t
w
t
t
h
su  
V
I
V
I
V
M
V
M
Input  
V
M
V
M
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
V
I
I
Output  
Control  
V
M
V
M
V
M
V
M
Input  
0 V  
0 V  
t
t
t
PLZ  
t
t
PHL  
PZL  
PLH  
Output  
Waveform 1  
V
V
/2  
/2  
LOAD  
V
V
OH  
V
V
V
V
V
M
M
M
Output  
V
V
+ V  
OL  
S1 at V  
LOAD  
OL  
OL  
(see Note B)  
t
t
t
PHL  
PLH  
PZH  
PHZ  
Output  
Waveform 2  
V
LOAD  
V
V
OH  
− V  
LOAD/2  
M
V
M
M
Output  
S1 at V  
LOAD  
0 V  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 .  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E. Since this device has open-drain outputs, t  
and t are the same as t .  
PZL pd  
PLZ  
F.  
G.  
t
t
is measured at V .  
M
is measured at V + V .  
OL  
PZL  
PLZ  
H. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
6
Copyright © 20002011, Texas Instruments Incorporated  
SN74LVC1G07  
www.ti.com  
SCES296Y FEBRUARY 2000REVISED JUNE 2011  
REVISION HISTORY  
Changes from Revision W (June 2008) to Revision X  
Page  
Added DSF Package to datasheet ....................................................................................................................................... 1  
Copyright © 20002011, Texas Instruments Incorporated  
7
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Mar-2012  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN74LVC1G07DBVR  
SN74LVC1G07DBVRE4  
SN74LVC1G07DBVRG4  
SN74LVC1G07DBVT  
SN74LVC1G07DBVTE4  
SN74LVC1G07DBVTG4  
SN74LVC1G07DCKJ  
SN74LVC1G07DCKR  
SN74LVC1G07DCKRE4  
SN74LVC1G07DCKRG4  
SN74LVC1G07DCKT  
SN74LVC1G07DCKTE4  
SN74LVC1G07DCKTG4  
SN74LVC1G07DRLR  
SN74LVC1G07DRLRG4  
SN74LVC1G07DRYR  
SN74LVC1G07DRYRG4  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SC70  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DCK  
DCK  
DCK  
DCK  
DCK  
DCK  
DCK  
DRL  
DRL  
DRY  
DRY  
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
3000  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
250  
Green (RoHS  
& no Sb/Br)  
10000  
3000  
3000  
3000  
250  
Green (RoHS  
& no Sb/Br)  
SC70  
Green (RoHS  
& no Sb/Br)  
SC70  
Green (RoHS  
& no Sb/Br)  
SC70  
Green (RoHS  
& no Sb/Br)  
SC70  
Green (RoHS  
& no Sb/Br)  
SC70  
250  
Green (RoHS  
& no Sb/Br)  
SC70  
250  
Green (RoHS  
& no Sb/Br)  
SOT  
4000  
4000  
5000  
5000  
Green (RoHS  
& no Sb/Br)  
SOT  
Green (RoHS  
& no Sb/Br)  
SON  
Green (RoHS  
& no Sb/Br)  
SON  
Green (RoHS  
& no Sb/Br)  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Mar-2012  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN74LVC1G07DSFR  
SN74LVC1G07YZPR  
SN74LVC1G07YZVR  
SON  
DSF  
YZP  
YZV  
6
5
4
5000  
3000  
3000  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
DSBGA  
DSBGA  
Green (RoHS  
& no Sb/Br)  
SNAGCU Level-1-260C-UNLIM  
SNAGCU Level-1-260C-UNLIM  
Green (RoHS  
& no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN74LVC1G07 :  
Automotive: SN74LVC1G07-Q1  
Enhanced Product: SN74LVC1G07-EP  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Mar-2012  
NOTE: Qualified Version Definitions:  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Enhanced Product - Supports Defense, Aerospace and Medical Applications  
Addendum-Page 3  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
22-Mar-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74LVC1G07DBVR  
SN74LVC1G07DBVR  
SN74LVC1G07DBVR  
SN74LVC1G07DBVT  
SN74LVC1G07DBVT  
SN74LVC1G07DBVT  
SN74LVC1G07DCKJ  
SN74LVC1G07DCKR  
SN74LVC1G07DCKR  
SN74LVC1G07DCKT  
SN74LVC1G07DCKT  
SN74LVC1G07DCKT  
SN74LVC1G07DRLR  
SN74LVC1G07DRYR  
SN74LVC1G07DRYR  
SN74LVC1G07DSFR  
SN74LVC1G07YZPR  
SN74LVC1G07YZVR  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SC70  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DCK  
DCK  
DCK  
DCK  
DCK  
DCK  
DRL  
DRY  
DRY  
DSF  
YZP  
YZV  
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
5
4
3000  
3000  
3000  
250  
178.0  
178.0  
180.0  
180.0  
178.0  
178.0  
330.0  
180.0  
178.0  
178.0  
178.0  
180.0  
180.0  
179.0  
180.0  
180.0  
180.0  
180.0  
9.2  
9.0  
9.2  
9.2  
9.0  
9.2  
8.4  
9.2  
9.2  
9.0  
9.2  
9.2  
8.4  
8.4  
9.5  
9.5  
8.4  
8.4  
3.3  
3.23  
3.17  
3.17  
3.23  
3.3  
3.2  
3.17  
3.23  
3.23  
3.17  
3.2  
1.55  
1.37  
1.37  
1.37  
1.37  
1.55  
1.22  
1.2  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
4.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q3  
Q1  
Q1  
Q2  
Q1  
Q1  
250  
250  
10000  
3000  
3000  
250  
2.4  
2.4  
SC70  
2.3  
2.55  
2.4  
SC70  
2.4  
1.22  
1.2  
SC70  
2.4  
2.5  
SC70  
250  
2.4  
2.4  
1.22  
1.2  
SC70  
250  
2.3  
2.55  
1.78  
1.65  
1.6  
SOT  
4000  
5000  
5000  
5000  
3000  
3000  
1.98  
1.2  
0.69  
0.7  
SON  
SON  
1.15  
1.16  
1.02  
1.02  
0.75  
0.5  
SON  
1.16  
1.52  
1.02  
DSBGA  
DSBGA  
0.63  
0.63  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
22-Mar-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74LVC1G07DBVR  
SN74LVC1G07DBVR  
SN74LVC1G07DBVR  
SN74LVC1G07DBVT  
SN74LVC1G07DBVT  
SN74LVC1G07DBVT  
SN74LVC1G07DCKJ  
SN74LVC1G07DCKR  
SN74LVC1G07DCKR  
SN74LVC1G07DCKT  
SN74LVC1G07DCKT  
SN74LVC1G07DCKT  
SN74LVC1G07DRLR  
SN74LVC1G07DRYR  
SN74LVC1G07DRYR  
SN74LVC1G07DSFR  
SN74LVC1G07YZPR  
SN74LVC1G07YZVR  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SOT-23  
SC70  
DBV  
DBV  
DBV  
DBV  
DBV  
DBV  
DCK  
DCK  
DCK  
DCK  
DCK  
DCK  
DRL  
DRY  
DRY  
DSF  
YZP  
YZV  
5
5
5
5
5
5
5
5
5
5
5
5
5
6
6
6
5
4
3000  
3000  
3000  
250  
180.0  
180.0  
205.0  
205.0  
180.0  
180.0  
338.0  
205.0  
180.0  
180.0  
180.0  
205.0  
202.0  
203.0  
180.0  
180.0  
220.0  
220.0  
180.0  
180.0  
200.0  
200.0  
180.0  
180.0  
343.0  
200.0  
180.0  
180.0  
180.0  
200.0  
201.0  
203.0  
180.0  
180.0  
220.0  
220.0  
18.0  
18.0  
33.0  
33.0  
18.0  
18.0  
30.0  
33.0  
18.0  
18.0  
18.0  
33.0  
28.0  
35.0  
30.0  
30.0  
34.0  
34.0  
250  
250  
10000  
3000  
3000  
250  
SC70  
SC70  
SC70  
SC70  
250  
SC70  
250  
SOT  
4000  
5000  
5000  
5000  
3000  
3000  
SON  
SON  
SON  
DSBGA  
DSBGA  
Pack Materials-Page 2  
X: Max = 1.43 mm, Min = 1.37 mm  
Y: Max = 0.93 mm, Min = 0.87 mm  
X: Max = 1.43 mm, Min = 1.37 mm  
Y: Max = 0.93 mm, Min = 0.87 mm  
IMPORTANT NOTICE  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TIs standard  
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