SN74LVC1G17DPWR
更新时间:2024-09-19 05:35:59
品牌:TI
描述:具有施密特触发输入的 1.65V 至 5.5V 单路缓冲器 | DPW | 5 | -40 to 125
SN74LVC1G17DPWR 概述
具有施密特触发输入的 1.65V 至 5.5V 单路缓冲器 | DPW | 5 | -40 to 125
SN74LVC1G17DPWR 数据手册
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
D
Available in the Texas Instruments
NanoStar and NanoFree Packages
D
D
D
D
24-mA Output Drive at 3.3 V
I
Supports Partial-Power-Down Mode
off
D
D
D
D
Supports 5-V V
Operation
Operation
CC
Inputs Accept Voltages to 5.5 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
Max t of 4.6 ns at 3.3 V
pd
Low Power Consumption, 10-µA Max I
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
CC
− 1000-V Charged-Device Model (C101)
DBV PACKAGE
(TOP VIEW)
DCK PACKAGE
(TOP VIEW)
DRL PACKAGE
(TOP VIEW)
NC
A
V
Y
1
2
3
5
1
2
3
5
NC
A
V
Y
CC
CC
1
2
3
5
NC
A
V
Y
CC
4
GND
4
GND
4
GND
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
YZV PACKAGE
(BOTTOM VIEW)
3
4
2
3
Y
Y
V
GND
A
GND
A
2
1
1
4
CC
5
V
DNU
CC
DNU − Do not use
See mechanical drawings for dimensions.
description/ordering information
This single Schmitt-trigger buffer is designed for 1.65-V to 5.5-V V
operation.
CC
The SN74LVC1G17 contains one buffer and performs the Boolean function Y = A. The device functions as an
independent buffer, but because of Schmitt action, it may have different input threshold levels for positive-going
(V ) and negative-going (V ) signals.
T+
T−
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
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Copyright 2005, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
ORDERING INFORMATION
†
‡
T
A
PACKAGE
ORDERABLE PART NUMBER
TOP-SIDE MARKING
NanoStar − WCSP (DSBGA)
0.17-mm Small Bump − YEA
SN74LVC1G17YEAR
NanoFree − WCSP (DSBGA)
0.17-mm Small Bump − YZA (Pb-free)
SN74LVC1G17YZAR
SN74LVC1G17YEPR
SN74LVC1G17YZPR
SN74LVC1G17YZVR
Reel of 3000
Reel of 3000
_ _ _C7_
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
−40°C to 85°C
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZV (Pb-free)
_ _ _ _
C7
Reel of 3000
Reel of 250
Reel of 3000
Reel of 250
SN74LVC1G17DBVR
SN74LVC1G17DBVT
SN74LVC1G17DCKR
SN74LVC1G17DCKT
SOT (SOT-23) − DBV
C17_
SOT (SC-70) − DCK
C7_
C7_
SOT (SOT-553) − DRL
Reel of 4000
SN74LVC1G17DRLR
†
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YEP, YZA/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following
character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
YZV: The actual top-side marking is on two lines. Line 1 has four characters to denote year, month, day, and assembly/test site. Line 2 has two
characters which show the family and function code. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUT
A
OUTPUT
Y
H
L
H
L
logic diagram (positive logic)
(DBV, DCK, DRL, YEA, YEP, YZA, and YZP Package)
2
4
A
Y
logic diagram (positive logic)
(YZV Package)
1
3
A
Y
2
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
I
Voltage range applied to any output in the high-impedance or power-off state, V
O
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 6.5 V
Voltage range applied to any output in the high or low state, V
O
(see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
IK
I
Output clamp current, I
OK
O
O
Continuous current through V
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 mA
CC
Package thermal impedance, θ (see Note 3): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
JA
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W
YEA/YZA package . . . . . . . . . . . . . . . . . . . . . . . . . . . 154°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 132°C/W
YZV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
2. The value of V is provided in the recommended operating conditions table.
CC
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
MIN
1.65
1.5
0
MAX
UNIT
Operating
5.5
V
Supply voltage
V
CC
Data retention only
V
V
Input voltage
5.5
V
V
I
Output voltage
0
V
CC
−4
O
V
V
= 1.65 V
= 2.3 V
CC
−8
CC
−16
−24
−32
4
I
High-level output current
mA
OH
OL
V
= 3 V
CC
V
CC
V
CC
V
CC
= 4.5 V
= 1.65 V
= 2.3 V
8
16
24
32
85
I
Low-level output current
mA
V
= 3 V
CC
CC
V
= 4.5 V
T
Operating free-air temperature
−40
°C
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
MIN
0.76
1.08
1.48
2.19
2.65
0.35
0.56
0.89
1.51
1.88
0.36
0.45
0.51
0.58
0.69
MAX
1.13
1.56
1.92
2.74
3.33
0.59
0.88
1.2
UNIT
V
CC
1.65 V
2.3 V
V
T+
3 V
Positive-going input
threshold voltage
V
4.5 V
5.5 V
1.65 V
2.3 V
V
T−
3 V
Negative-going input
threshold voltage
V
V
4.5 V
1.97
2.4
5.5 V
1.65 V
2.3 V
0.64
0.78
0.83
0.93
1.04
∆V
T
3 V
Hysteresis
(V − V
)
T+ T−
4.5 V
5.5 V
I
I
I
I
I
I
I
I
I
I
I
I
= −100 µA
= −4 mA
= −8 mA
= −16 mA
= −24 mA
= −32 mA
= 100 µA
= 4 mA
1.65 V to 4.5 V
1.65 V
2.3 V
V
CC
− 0.1
OH
OH
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
1.2
1.9
2.4
2.3
3.8
V
OH
V
3 V
4.5 V
1.65 V to 4.5 V
1.65 V
0.1
0.45
0.3
0.4
0.55
0.55
5
= 8 mA
2.3 V
V
OL
V
= 16 mA
= 24 mA
= 32 mA
3 V
4.5 V
0 to 5.5 V
0
I
I
I
A input V = 5.5 V or GND
µA
µA
µA
mA
pF
I
I
V or V = 5.5 V
10
off
I
O
V = 5.5 V or GND,
I = 0
O
1.65 V to 5.5 V
3 V to 5.5 V
3.3 V
10
CC
I
∆I
CC
One input at V
CC
− 0.6 V, Other inputs at V
CC
or GND
500
C
V = V
or GND
= 3.3 V, T = 25°C.
4.5
i
I
CC
†
All typical values are at V
CC
A
switching characteristics over recommended operating free-air temperature range, C = 15 pF
L
(unless otherwise noted) (see Figure 1)
V
= 1.8 V
V
= 2.5 V
0.2 V
V
= 3.3 V
0.3 V
V
= 5 V
CC
0.15 V
CC
CC
CC
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
2.8 9.9
MIN MAX
1.6 5.5
MIN MAX
1.5 4.6
MIN MAX
0.9 4.4
t
pd
A
ns
Y
4
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
switching characteristics over recommended operating free-air temperature range, C = 30 pF or
L
50 pF (unless otherwise noted) (see Figure 2)
V
= 1.8 V
V
= 2.5 V
0.2 V
V
= 3.3 V
0.3 V
V
= 5 V
CC
0.15 V
CC
CC
CC
0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN MAX
MIN MAX
MIN MAX
1.2
t
pd
A
3.8
11
2
6.5
1.8
5.5
5
ns
Y
operating characteristics, T = 25°C
A
V
CC
= 1.8 V
V
CC
= 2.5 V
V
CC
= 3.3 V
V
= 5 V
CC
TYP
26
PARAMETER
TEST CONDITIONS
UNIT
TYP
20
TYP
TYP
22
C
Power dissipation capacitance
f = 10 MHz
21
pF
pd
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
PARAMETER MEASUREMENT INFORMATION
V
LOAD
Open
S1
R
L
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
PLH PHL
/t
C
L
t
V
R
PLZ PZL
LOAD
GND
L
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
C
R
L
V
LOAD
L
∆
V
I
t /t
r f
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
5 V 0.5 V
V
V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
V
V
/2
/2
2 × V
2 × V
6 V
2 × V
CC
15 pF
15 pF
15 pF
15 pF
1 MΩ
1 MΩ
1 MΩ
1 MΩ
0.15 V
0.15 V
0.3 V
CC
CC
CC
CC
CC
CC
3 V
1.5 V
/2
V
CC
V
CC
0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
su
h
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
V
0 V
t
t
t
t
t
PHL
PZL
PLZ
+ V
PLH
PHL
Output
Waveform 1
V
/2
OH
LOAD
V
V
V
M
Output
M
V
V
M
S1 at V
(see Note B)
V
LOAD
OL
∆
V
OL
V
OL
t
PLH
t
t
PZH
PHZ
− V
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
V
M
OH
∆
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
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SCES351N − JUNE 2001 − REVISED OCTOBER 2005
PARAMETER MEASUREMENT INFORMATION
V
LOAD
Open
S1
R
L
From Output
Under Test
TEST
S1
GND
t
t
/t
Open
PLH PHL
/t
C
L
t
V
R
PLZ PZL
LOAD
GND
L
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
C
R
L
V
LOAD
L
∆
V
I
t /t
r f
1.8 V 0.15 V
2.5 V 0.2 V
3.3 V 0.3 V
5 V 0.5 V
V
V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
V
V
/2
/2
2 × V
2 × V
6 V
2 × V
CC
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
CC
CC
CC
CC
CC
CC
3 V
1.5 V
/2
V
CC
V
CC
0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
su
h
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
V
0 V
t
t
t
t
t
PHL
PZL
PLZ
+ V
PLH
PHL
Output
Waveform 1
V
/2
OH
LOAD
V
V
V
M
Output
M
V
V
M
S1 at V
(see Note B)
V
LOAD
OL
∆
V
OL
V
OL
t
PLH
t
t
PZH
PHZ
− V
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
V
M
OH
∆
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
PHL
are the same as t
.
dis
PLZ
PZL
PLH
PHZ
PZH
are the same as t
.
en
are the same as t .
pd
H. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-Oct-2005
PACKAGING INFORMATION
Orderable Device
SN74LVC1G17DBVR
SN74LVC1G17DBVRE4
SN74LVC1G17DBVRG4
SN74LVC1G17DBVT
SN74LVC1G17DBVTE4
SN74LVC1G17DCKR
SN74LVC1G17DCKRE4
SN74LVC1G17DCKRG4
SN74LVC1G17DCKT
SN74LVC1G17DCKTE4
SN74LVC1G17DRLR
SN74LVC1G17DRLRG4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOT-23
DBV
5
5
5
5
5
5
5
5
5
5
5
5
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOT-23
SOT-23
SOT-23
SOT-23
SC70
DBV
DBV
DBV
DBV
DCK
DCK
DCK
DCK
DCK
DRL
DRL
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SC70
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOP
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOP
4000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC1G17YEAR
SN74LVC1G17YEPR
SN74LVC1G17YZAR
ACTIVE
ACTIVE
ACTIVE
WCSP
WCSP
WCSP
YEA
YEP
YZA
5
5
5
3000
3000
3000
TBD
TBD
SNPB
SNPB
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Pb-Free
(RoHS)
SNAGCU
SN74LVC1G17YZPR
ACTIVE
WCSP
YZP
5
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Oct-2005
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
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TI assumes no liability for applications assistance or customer product design. Customers are responsible for
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Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
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Applications
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Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
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dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
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Security
www.ti.com/opticalnetwork
www.ti.com/security
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microcontroller.ti.com
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Wireless
www.ti.com/wireless
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Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
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