SN74LVC244ARWPR [TI]
具有三态输出的 8 通道、1.65V 至 3.6V 缓冲器 | RWP | 20 | -40 to 125;
| 型号： | SN74LVC244ARWPR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有三态输出的 8 通道、1.65V 至 3.6V 缓冲器 | RWP | 20 | -40 to 125 驱动 逻辑集成电路 总线驱动器 总线收发器 |
| 文件： | 总19页 (文件大小：587K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
FEATURES
DB, DGV, DW, N, NS, OR PW PACKAGE
(TOP VIEW)
•
•
•
Operates From 1.65 V to 3.6 V
Inputs Accept Voltages to 5.5 V
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
1
2
3
4
5
6
7
8
9
10
20
V
CC
Specified From –40°C to 85°C and –40°C to
125°C
19 2OE
18
17
16
15
14
13
12
11
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
•
•
Max tpd of 5.9 ns at 3.3 V
Typical VOLP (Output Ground Bounce) < 0.8 V
at VCC = 3.3 V, TA = 25°C
•
•
Typical VOHV (Output VOH Undershoot) > 2 V
at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V VCC
)
•
•
•
Ioff Supports Partial-Power-Down Mode
Operation
RGY PACKAGE
(TOP VIEW)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
1
20
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
19
18
17
16
15
2
3
4
5
6
7
8
9
2OE
1Y1
2A4
1Y2
2A3
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
14 1Y3
13
2A2
This octal buffer/line driver is operational at 1.5-V to
3.6-V VCC, but is designed specifically for 1.65-V to
3.6-V VCC operation.
12 1Y4
10
11
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
SN74LVC244ARGYR
SN74LVC244AGQNR
SN74LVC244AZQNR
SN74LVC244AN
TOP-SIDE MARKING
QFN – RGY
Reel of 1000
LC244A
–40°C to 85°C
VFBGA – GQN
VFBGA – ZQN (Pb-Free)
PDIP – N
Reel of 1000
LC244A
Tube of 20
SN74LVC244AN
LVC244A
Tube of 25
SN74LVC244ADW
SOIC – DW
Reel of 2000
Reel of 2000
Reel of 2000
Tube of 70
SN74LVC244ADWR
SN74LVC244ANSR
SN74LVC244ADBR
SN74LVC244APW
SOP – NS
LVC244A
LC244A
–40°C to 125°C
SSOP – DB
TSSOP – PW
TVSOP – DGV
Reel of 2000
Reel of 250
Reel of 2000
SN74LVC244APWR
SN74LVC244APWT
SN74LVC244ADGVR
LC244A
LC244A
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1992–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74LVC244A is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is
low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the
high-impedance state.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
GQN OR ZQN PACKAGE
(TOP VIEW)
1
2
3
4
A
B
C
D
E
TERMINAL ASSIGNMENTS
1
2
3
4
A
B
C
D
E
1A1
1A2
1A3
1A4
GND
1OE
2A4
2Y3
2A2
2Y1
VCC
2Y4
2A3
2Y2
2A1
2OE
1Y1
1Y2
1Y3
1Y4
FUNCTION TABLE
(EACH BUFFER)
INPUTS
OUTPUT
Y
OE
L
A
H
L
H
L
L
H
X
Z
2
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
1
2
19
1OE
1A1
2OE
18
16
14
12
11
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2A1
2Y1
2Y2
2Y3
2Y4
4
6
8
13
15
17
1A2
1A3
1A4
2A2
2A3
2A4
Pin numbers shown are for the DB, DGV, DW, N, NS, PW, and RGY packages.
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC Supply voltage range
6.5
6.5
6.5
V
V
VI
Input voltage range(2)
VO
VO
IIK
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high or low state(2)(3)
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
±50
±100
70
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
DB package(4)
DGV package(4)
DW package(4)
GQN/ZQN package(4)
N package(4)
92
58
78
θJA
Package thermal impedance
°C/W
69
NS package(4)
PW package(4)
RGY package(5)
60
83
37
Tstg
Ptot
Storage temperature range
Power dissipation
–65
150
500
°C
TA = –40°C to 125°C(6)(7)
mW
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
(5) The package thermal impedance is calculated in accordance with JESD 51-5.
(6) For the DW package: above 70°C the value of Ptot derates linearly with 8 mW/K.
(7) For the DB, DGV, N, NS, and PW packages: above 60°C the value of Ptot derates linearly with 5.5 mW/K.
3
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
Recommended Operating Conditions(1)
TA = 25°C
MIN
–40 TO 85°C
–40 TO 125°C
UNIT
MAX
MIN
1.65
1.5
MAX
MIN
MAX
Operating
VCC Supply voltage
1.65
3.6
3.6
1.65
3.6
V
V
Data retention only
1.5
1.5
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V to 3.6 V
0.65 × VCC
0.65 × VCC
0.65 × VCC
High-level
input voltage
VIH
1.7
2
1.7
2
1.7
2
0.35 × VCC
0.35 × VCC
0.35 × VCC
Low-level
input voltage
VIL
VI
0.7
0.8
5.5
VCC
–4
0.7
0.8
5.5
VCC
–4
0.7
0.8
5.5
VCC
–4
V
Input voltage
0
0
0
0
0
0
V
V
VO Output voltage
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
–8
–8
–8
High-level
IOH
mA
mA
output current
–12
–24
4
–12
–24
4
–12
–24
4
VCC = 1.65 V
VCC = 2.3 V
VCC = 2.7 V
VCC = 3 V
8
8
8
Low-level
IOL
output current
12
12
12
24
24
24
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
TA = 25°C
–40 TO 85°C
MIN MAX
–40 TO 125°C
PARAMETER
TEST CONDITIONS
IOH = –100 µA
VCC
UNIT
MIN
TYP MAX
MIN
MAX
VCC
–
0.2
VCC
–
VCC
–
1.65 V to 3.6 V
0.2
0.3
IOH = –4 mA
IOH = –8 mA
1.65 V
2.3 V
2.7 V
3 V
1.29
1.9
2.2
2.4
2.3
1.2
1.7
2.2
2.4
2.2
1.05
1.55
2.05
2.25
2
VOH
V
IOH = –12 mA
IOH = –24 mA
IOL = 100 µA
3 V
1.65 V to 3.6 V
1.65 V
2.3 V
2.7 V
3 V
0.1
0.24
0.3
0.4
0.55
±1
0.2
0.45
0.7
0.3
0.6
IOL = 4 mA
VOL
IOL = 8 mA
0.75
0.6
V
IOL = 12 mA
0.4
IOL = 24 mA
0.55
±5
0.8
II
VI = 5.5 V or GND
VI or VO = 5.5 V
VO = 0 to 5.5 V
VI = VCC or GND
3.6 V ≤ VI ≤ 5.5 V(1)
3.6 V
0
±20
±20
±20
40
µA
µA
µA
Ioff
IOZ
±1
±10
±10
10
3.6 V
±1
1
ICC
IO = 0
3.6 V
µA
µA
1
10
40
One input at VCC – 0.6 V,
Other inputs at VCC or GND
∆ICC
2.7 V to 3.6 V
500
500
5000
Ci
VI = VCC or GND
VO = VCC or GND
3.3 V
3.3 V
4
pF
pF
Co
5.5
(1) This applies in the disabled state only.
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
TA = 25°C
TYP
7
–40 TO 85°C –40 TO 125°C
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
VCC
UNIT
MIN
1
MAX
14.4
10.4
7.4
MIN
1
MAX
14.9
10.9
7.9
MIN
1
MAX
16.4
12.4
10
1.5 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
1
5.9
4.2
4.2
3.9
8.3
6.4
4.6
5
1
1
tpd
A
Y
Y
Y
1
1
1
ns
ns
1
6.7
1
6.9
1
8.2
3.3 V ± 0.3 V
1.5 V
1.5
1
5.7
1.5
1
5.9
1.5
1
7.2
17.8
12.1
9.1
18.3
12.6
9.6
19.8
14.1
11.7
10.3
9.4
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
1
1
1
ten
OE
OE
1
1
1
1
8.4
1
8.6
1
3.3 V ± 0.3 V
1.5 V
1.5
1
4.5
7.2
5.8
3.7
3.8
3.8
7.4
1.5
1
7.6
1.5
1
15.6
11.6
7.3
16.1
12.1
7.8
17.6
13.6
9.9
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
1
1
1
tdis
1
1
1
ns
ns
1
6.6
1
6.8
1
8.6
3.3 V ± 0.3 V
3.3 V ± 0.3 V
1.5
6.3
1.5
6.5
1.5
8
tsk(o)
1
1.5
5
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
Operating Characteristics
TA = 25°C
PARAMETER
TEST CONDITIONS
VCC
TYP
43
43
44
1
UNIT
1.8 V
2.5 V
3.3 V
1.8 V
2.5 V
3.3 V
Outputs enabled
Outputs disabled
f = 10 MHz
Cpd
Power dissipation capacitance per buffer/driver
pF
f = 10 MHz
1
2
6
SN74LVC244A
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS414X–NOVEMBER 1992–REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
V
LOAD
S1
Open
R
L
From Output
Under Test
TEST
/t
S1
GND
t
t
Open
PLH PHL
C
L
t
/t
V
R
L
PLZ PZL
LOAD
GND
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
LOAD
C
L
R
L
V
∆
V
I
t /t
r f
1.5 V
V
V
V
≤2 ns
≤2 ns
≤2 ns
V
/2
/2
/2
2 × V
2 × V
2 × V
15 pF
30 pF
30 pF
50 pF
50 pF
2 kΩ
1 kΩ
500 Ω
500 Ω
500 Ω
0.1 V
0.15 V
0.15 V
0.3 V
CC
CC
CC
CC
CC
CC
CC
CC
CC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
2.7 V
V
V
2.7 V
2.7 V
≤2.5 ns
≤2.5 ns
1.5 V
1.5 V
6 V
6 V
3.3 V ± 0.3 V
0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
h
su
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
0 V
t
t
t
t
t
PHL
PZL
PLZ
PLH
Output
Waveform 1
V
V
OH
V
V
/2
LOAD
V
V
V
M
M
Output
V
V
M
S1 at V
LOAD
V
OL
+ V
∆
OL
(see Note B)
OL
t
PHL
PLH
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
− V
∆
V
M
OH
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
SSOP
SSOP
Drawing
SN74LVC244ADBLE
SN74LVC244ADBR
OBSOLETE
ACTIVE
DB
20
20
TBD
Call TI
Call TI
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC244ADBRE4
SN74LVC244ADBRG4
SN74LVC244ADGVR
SN74LVC244ADGVRE4
SN74LVC244ADW
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
TVSOP
TVSOP
SOIC
DB
DB
20
20
20
20
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DGV
DGV
DW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC244ADWE4
SN74LVC244ADWR
SN74LVC244ADWRE4
SN74LVC244AGQNR
SOIC
DW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
DW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
GQN
1000
TBD
SNPB
Level-1-240C-UNLIM
SN74LVC244AN
SN74LVC244ANE4
SN74LVC244ANSR
SN74LVC244ANSRE4
SN74LVC244APW
SN74LVC244APWE4
SN74LVC244APWG4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
N
20
20
20
20
20
20
20
20
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
PDIP
N
Pb-Free
(RoHS)
SO
NS
NS
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
70 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC244APWLE
SN74LVC244APWR
OBSOLETE TSSOP
PW
PW
20
20
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
QFN
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC244APWRE4
SN74LVC244APWRG4
SN74LVC244APWT
PW
PW
20
20
20
20
20
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC244APWTE4
SN74LVC244ARGYR
PW
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
RGY
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Orderable Device
SN74LVC244ARGYRG4
SN74LVC244AZQNR
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
QFN
RGY
20
1000 Green (RoHS & CU NIPDAU Level-2-260C-1YEAR
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
ZQN
20
1000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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