SN74LVC258ADBLE [TI]

LVC/LCX/Z SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16, SSOP-16;
SN74LVC258ADBLE
型号: SN74LVC258ADBLE
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LVC/LCX/Z SERIES, QUAD 2 LINE TO 1 LINE MULTIPLEXER, INVERTED OUTPUT, PDSO16, SSOP-16

光电二极管 输出元件 复用器 解复用器
文件: 总8页 (文件大小:115K)
中文:  中文翻译
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SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
D, DB, OR PW PACKAGE  
EPIC (Enhanced-Performance Implanted  
CMOS) Submicron Process  
Typical V (Output Ground Bounce)  
(TOP VIEW)  
OLP  
A/B  
1A  
V
CC  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
< 0.8 V at V  
= 3.3 V, T = 25°C  
CC  
A
OE  
4A  
4B  
Typical V  
> 2 V at V  
(Output V  
Undershoot)  
OHV  
CC  
OH  
1B  
= 3.3 V, T = 25°C  
A
1Y  
Inputs Accept Voltages to 5.5 V  
2A  
12 4Y  
11  
10  
9
2B  
3A  
3B  
3Y  
Package Options Include Plastic  
Small-Outline (D), Shrink Small-Outline  
(DB), and Thin Shrink Small-Outline (PW)  
Packages  
2Y  
GND  
description  
This quadruple 2-line to 1-line data selector/multiplexer is designed for 1.65-V to 3.6-V V  
operation.  
CC  
The SN74LVC258A is designed to multiplex signals from 4-bit data sources to 4-output data lines in  
bus-organized systems. The 3-state outputs do not load the data lines when the output-enable (OE) input is at  
a high logic level.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
To ensure the high-impedance state during power up or power down, OE should be tied to V through a pullup  
CC  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
The SN74LVC258A is characterized for operation from –40°C to 85°C.  
FUNCTION TABLE  
INPUTS  
OUTPUT  
Y
A/B  
A
X
L
B
X
X
X
L
OE  
H
L
X
L
Z
H
L
L
L
H
X
X
L
H
H
H
L
L
H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments Incorporated.  
Copyright 1998, Texas Instruments Incorporated  
PRODUCT PREVIEW information concerns products in the formative or  
design phase of development. Characteristic data and other  
specifications are design goals. Texas Instruments reserves the right to  
change or discontinue these products without notice.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
logic symbol  
15  
OE  
EN  
G1  
1
A/B  
2
4
7
1A  
1B  
2A  
2B  
3A  
3B  
4A  
4B  
1
1
MUX  
1Y  
2Y  
3
5
6
11  
10  
14  
13  
9
3Y  
4Y  
12  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
15  
OE  
1
A/B  
2
1A  
4
7
1Y  
2Y  
3Y  
4Y  
3
1B  
5
2A  
6
2B  
11  
3A  
9
10  
3B  
14  
4A  
12  
13  
4B  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V  
CC  
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 6.5 V  
I
Output voltage range, V (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to V  
+ 0.5 V  
O
CC  
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
IK  
I
Output clamp current, I  
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA  
OK  
O
Continuous output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA  
Continuous current through V  
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W  
O
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA  
CC  
JA  
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 131°C/W  
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C  
stg  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.  
2. The value of V is provided in the recommended operating conditions table.  
CC  
3. The package thermal impedance is calculated in accordance with JESD 51.  
recommended operating conditions (see Note 4)  
MIN  
1.65  
1.5  
MAX  
UNIT  
Operating  
3.6  
V
Supply voltage  
V
CC  
IH  
Data retention only  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.65 V to 1.95 V  
= 2.3 V to 2.7 V  
= 2.7 V to 3.6 V  
= 1.65 V to 1.95 V  
= 2.3 V to 2.7 V  
= 2.7 V to 3.6 V  
0.65 × V  
1.7  
CC  
V
High-level input voltage  
V
V
2
0.35 × V  
0.7  
CC  
V
IL  
Low-level input voltage  
0.8  
V
V
Input voltage  
0
0
5.5  
V
V
I
Output voltage  
V
O
CC  
–4  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 1.65 V  
= 2.3 V  
= 2.7 V  
= 3 V  
–8  
I
High-level output current  
Low-level output current  
mA  
mA  
OH  
OL  
–12  
–24  
4
= 1.65 V  
= 2.3 V  
= 2.7 V  
= 3 V  
8
I
12  
24  
10  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
0
ns/V  
T
A
–40  
85  
°C  
NOTE 4: All unused inputs of the device must be held at V  
or GND to ensure proper device operation. Refer to the TI application report,  
CC  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
TYP  
PARAMETER  
TEST CONDITIONS  
MIN  
V –0.2  
CC  
MAX  
UNIT  
V
CC  
I
I
I
= –100 µA  
= –4 mA  
= –8 mA  
1.65 V to 3.6 V  
1.65 V  
2.3 V  
OH  
OH  
OH  
1.2  
1.7  
2.2  
2.4  
2.2  
V
V
OH  
OL  
2.7 V  
I
= –12 mA  
OH  
3 V  
I
I
I
I
I
I
= –24 mA  
= 100 µA  
= 4 mA  
3 V  
OH  
OL  
OL  
OL  
OL  
OL  
1.65 V to 3.6 V  
1.65 V  
2.3 V  
0.2  
0.45  
0.7  
V
= 8 mA  
V
= 12 mA  
= 24 mA  
2.7 V  
0.4  
3 V  
0.55  
±5  
I
I
V = 5.5 V or GND  
3.6 V  
µA  
µA  
µA  
I
V
= V  
or GND  
3.6 V  
±10  
10  
I
O
CC  
or GND,  
OZ  
CC  
I
V = V  
I = 0  
O
3.6 V  
I
CC  
One input at V  
– 0.6 V,  
or GND  
CC  
Other inputs at V  
I  
CC  
2.7 V to 3.6 V  
500  
µA  
CC  
or GND  
C
C
V = V  
3.3 V  
3.3 V  
pF  
pF  
i
I
CC  
= V  
V
O
or GND  
o
CC  
All typical values are at V  
= 3.3 V, T = 25°C.  
CC  
A
switching characteristics over recommended operating free-air temperature range (unless  
otherwise noted) (see Figures 1 through 3)  
V
= 1.8 V  
V
= 2.5 V  
V
= 3.3 V  
CC  
± 0.15 V  
CC  
± 0.2 V  
CC  
± 0.3 V  
V
= 2.7 V  
MAX  
FROM  
(INPUT)  
TO  
(OUTPUT)  
CC  
PARAMETER  
UNIT  
MIN MAX  
MIN MAX  
MIN  
MIN  
MAX  
A or B  
A/B  
t
pd  
Y
ns  
t
t
t
Y
Y
ns  
ns  
ns  
OE  
en  
OE  
dis  
sk(o)  
Skew between any two outputs of the same package switching in the same direction  
operating characteristics, T = 25°C  
A
V
= 1.8 V  
± 0.15 V  
V
= 2.5 V  
V = 3.3 V  
CC  
CC  
CC  
± 0.2 V  
TEST  
CONDITIONS  
± 0.3 V  
PARAMETER  
UNIT  
TYP  
TYP  
TYP  
C
Power dissipation capacitance  
f = 10 MHz  
pF  
pd  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
PARAMETER MEASUREMENT INFORMATION  
V
= 1.8 V ± 0.15 V  
CC  
2 × V  
CC  
Open  
S1  
1k Ω  
From Output  
Under Test  
TEST  
S1  
GND  
t
Open  
pd  
/t  
C
= 30 pF  
t
2 × V  
CC  
Open  
L
PLZ PZL  
1k Ω  
(see Note A)  
t
/t  
PHZ PZH  
LOAD CIRCUIT  
t
w
V
CC  
V
CC  
V
CC  
/2  
V
CC  
/2  
Input  
Timing  
Input  
V
/2  
CC  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
su  
t
h
V
CC  
Output  
Control  
(low-level  
enabling)  
Data  
Input  
V
CC  
V
/2  
V
CC  
/2  
CC  
V
CC  
/2  
V
CC  
/2  
0 V  
0 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
t
t
PZL  
PLZ  
Output  
Waveform 1  
V
CC  
V
CC  
V
/2  
CC  
Input  
V
CC  
/2  
V
CC  
/2  
S1 at 2 × V  
(see Note B)  
V
V
+ 0.15 V  
V
CC  
OL  
0 V  
OL  
t
t
PZH  
PHZ  
t
t
PLH  
PHL  
Output  
Waveform 2  
S1 at Open  
(see Note B)  
V
OH  
V
V
OH  
– 0.15 V  
OH  
V
/2  
CC  
Output  
V
CC  
/2  
V
CC  
/2  
0 V  
OL  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C
L
includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2 ns, t 2 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
PHL  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 1. Load Circuit and Voltage Waveforms  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
PARAMETER MEASUREMENT INFORMATION  
V
= 2.5 V ± 0.2 V  
CC  
2 × V  
CC  
Open  
S1  
500 Ω  
From Output  
Under Test  
TEST  
S1  
GND  
t
Open  
pd  
/t  
C
= 30 pF  
t
2 × V  
CC  
GND  
L
PLZ PZL  
500 Ω  
(see Note A)  
t
/t  
PHZ PZH  
LOAD CIRCUIT  
t
w
V
CC  
V
CC  
V
CC  
/2  
V
CC  
/2  
Input  
Timing  
Input  
V
/2  
CC  
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
su  
t
h
V
CC  
Output  
Control  
(low-level  
enabling)  
Data  
Input  
V
CC  
V
/2  
V
CC  
/2  
CC  
V
CC  
/2  
V
CC  
/2  
0 V  
0 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
t
t
PZL  
PLZ  
Output  
Waveform 1  
V
CC  
V
CC  
V
/2  
CC  
Input  
V
CC  
/2  
V
CC  
/2  
S1 at 2 × V  
(see Note B)  
V
V
+ 0.15 V  
V
CC  
OL  
0 V  
OL  
t
t
PZH  
PHZ  
t
t
PLH  
PHL  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
V
OH  
– 0.15 V  
OH  
V
/2  
CC  
Output  
V
CC  
/2  
V
CC  
/2  
0 V  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C
L
includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2 ns, t 2 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
PHL  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 2. Load Circuit and Voltage Waveforms  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN74LVC258A  
QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER  
WITH 3-STATE OUTPUTS  
SCAS345F – MARCH 1994 – REVISED JUNE 1998  
PARAMETER MEASUREMENT INFORMATION  
V
= 2.7 V AND 3.3 V ± 0.3 V  
CC  
6 V  
TEST  
S1  
S1  
500 Ω  
Open  
GND  
t
Open  
6 V  
pd  
/t  
From Output  
Under Test  
t
PLZ PZL  
/t  
t
GND  
PHZ PZH  
C
= 50 pF  
L
500 Ω  
(see Note A)  
t
w
LOAD CIRCUIT  
2.7 V  
0 V  
1.5 V  
1.5 V  
Input  
2.7 V  
0 V  
Timing  
Input  
1.5 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
t
su  
t
h
2.7 V  
0 V  
Data  
Input  
Output  
2.7 V  
0 V  
1.5 V  
1.5 V  
Control  
(low-level  
enabling)  
1.5 V  
1.5 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
t
t
PZL  
t
PLZ  
Output  
Waveform 1  
S1 at 6 V  
3 V  
2.7 V  
0 V  
1.5 V  
Input  
1.5 V  
1.5 V  
V
V
+ 0.3 V  
– 0.3 V  
OL  
V
OL  
(see Note B)  
t
PHZ  
t
PLH  
t
PHL  
PZH  
Output  
Waveform 2  
S1 at GND  
V
OH  
V
OH  
OH  
1.5 V  
Output  
1.5 V  
1.5 V  
(see Note B)  
0 V  
V
OL  
VOLTAGE WAVEFORMS  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
ENABLE AND DISABLE TIMES  
NOTES: A.  
C
L
includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 , t 2.5 ns, t 2.5 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
PLZ  
PZL  
PLH  
PHZ  
PZH  
PHL  
are the same as t  
.
en  
are the same as t .  
pd  
Figure 3. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue  
any product or service without notice, and advise customers to obtain the latest version of relevant information  
to verify, before placing orders, that information being relied on is current and complete. All products are sold  
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those  
pertaining to warranty, patent infringement, and limitation of liability.  
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent  
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily  
performed, except those mandated by government requirements.  
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF  
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL  
APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR  
WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER  
CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERSTOOD TO  
BE FULLY AT THE CUSTOMER’S RISK.  
In order to minimize risks associated with the customer’s applications, adequate design and operating  
safeguards must be provided by the customer to minimize inherent or procedural hazards.  
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent  
that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other  
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party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.  
Copyright 1998, Texas Instruments Incorporated  

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SN74LVC2952ADBLE

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADBR

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADBRE4

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADGVR

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADW

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADWE4

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI

SN74LVC2952ADWG4

LVC/LCX/Z SERIES, 8-BIT REGISTERED TRANSCEIVER, TRUE OUTPUT, PDSO24, GREEN, PLASTIC, SOIC-24
TI

SN74LVC2952ADWR

OCTAL BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS
TI