SN74LVC2G74DCTRE6 [TI]
具有清零和预置端的单路正边沿触发式 D 型触发器 | DCT | 8 | -40 to 125;
| 型号： | SN74LVC2G74DCTRE6 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有清零和预置端的单路正边沿触发式 D 型触发器 | DCT | 8 | -40 to 125 光电二极管 逻辑集成电路 触发器 |
| 文件： | 总15页 (文件大小：352K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
FEATURES
DCT OR DCU PACKAGE
(TOP VIEW)
•
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
CLK
D
Q
GND
V
CC
1
2
3
4
8
7
6
5
•
•
•
•
•
•
Supports 5-V VCC Operation
PRE
CLR
Q
Inputs Accept Voltages to 5.5 V
Max tpd of 5.9 ns at 3.3 V
Low Power Consumption, 10-µA Max ICC
±24-mA Output Drive at 3.3 V
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
4
3
2
1
5
6
7
8
GND
Q
Q
CLR
PRE
•
•
•
•
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
D
CLK
Ioff Supports Partial-Power-Down Mode
Operation
V
CC
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
DESCRIPTION/ORDERING INFORMATION
This single positive-edge-triggered D-type flip-flop is designed for 1.65-V to 5.5-V VCC operation.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER TOP-SIDE MARKING(2)
NanoStar™
WCSP (DSBGA) – YEA
SN74LVC2G74YEAR
NanoFree™
WCSP (DSBGA) – YZA (Pb-free)
SN74LVC2G74YZAR
_ _ _CP_
Reel of 3000
NanoStar™ – WCSP (DSBGA)
0.23-mm Large Bump – YEP
SN74LVC2G74YEPR
–40°C to 85°C
NanoFree™ – WCSP (DSBGA)
0.23-mm Large Bump – YZP (Pb-free)
SN74LVC2G74YZPR
SSOP – DCT
Reel of 3000
Reel of 3000
Reel of 250
SN74LVC2G74DCTR
SN74LVC2G74DCUR
SN74LVC2G74DCUT
C74_ _ _
C74_
VSSOP – DCU
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.
DCU: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1999–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
A low level at the preset (PRE) or clear (CLR) input sets or resets the outputs, regardless of the levels of the
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs
at a voltage level and is not related directly to the rise time of the clock pulse. Following the hold-time interval,
data at the D input can be changed without affecting the levels at the outputs.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
FUNCTION TABLE
INPUTS
OUTPUTS
PRE
L
CLR
H
CLK
X
D
X
X
X
H
L
Q
H
Q
L
H
L
X
L
H(1)
H
H(1)
L
L
X
H
H
↑
H
L
H
H
↑
L
H
H
H
L
X
Q0
Q 0
(1) This configuration is nonstable; that is, it does not persist when PRE or CLR returns to its inactive
(high) level.
LOGIC DIAGRAM (POSITIVE LOGIC)
7
1
PRE
CLK
C
C
C
5
Q
TG
C
C
C
C
2
6
D
TG
TG
TG
3
Q
C
C
C
CLR
2
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
MAX UNIT
VCC Supply voltage range
6.5
6.5
6.5
V
V
VI
Input voltage range(2)
VO
VO
IIK
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high or low state(2)(3)
V
–0.5 VCC + 0.5
V
Input clamp current
VI < 0
–50
–50
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCC or GND
±50 mA
±100 mA
220
DCT package
DCU package
227
θJA
Package thermal impedance(4)
°C/W
140
YEA/YZA package
YEP/YZP package
102
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
3
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
Recommended Operating Conditions(1)
MIN
1.65
MAX UNIT
Operating
5.5
V
VCC
Supply voltage
Data retention only
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
1.5
0.65 × VCC
1.7
VIH
High-level input voltage
V
2
VCC = 4.5 V to 5.5 V
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
0.7 × VCC
0.35 × VCC
0.7
VIL
Low-level input voltage
V
0.8
VCC = 4.5 V to 5.5 V
0.3 × VCC
5.5
VCC
–4
VI
Input voltage
0
0
V
V
VO
Output voltage
VCC = 1.65 V
VCC = 2.3 V
–8
IOH
High-level output current
Low-level output current
–16
–24
–32
4
mA
mA
VCC = 3 V
VCC = 4.5 V
VCC = 1.65 V
VCC = 2.3 V
8
IOL
16
VCC = 3 V
24
VCC = 4.5 V
32
VCC = 1.8 V ± 0.15 V, 2.5 V ± 0.2 V
VCC = 3.3 V ± 0.3 V
VCC = 5 V ± 0.5 V
20
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
10
ns/V
°C
5
TA
–40
85
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
1.65 V to 5.5 V
1.65 V
MIN TYP(1)
VCC – 0.1
MAX UNIT
IOH = –100 µA
IOH = –4 mA
IOH = –8 mA
IOH = –16 mA
IOH = –24 mA
IOH = –32 mA
IOL = 100 µA
IOL = 4 mA
1.2
1.9
2.4
2.3
3.8
2.3 V
VOH
V
3 V
4.5 V
1.65 V to 5.5 V
1.65 V
0.1
0.45
IOL = 8 mA
2.3 V
0.3
V
VOL
IOL = 16 mA
IOL = 24 mA
IOL = 32 mA
0.4
3 V
0.55
0.55
4.5 V
Data or
control inputs
II
VI = 5.5 V or GND
0 to 5.5 V
±5
µA
Ioff
VI or VO = 5.5 V
0
±10
10
µA
µA
µA
pF
ICC
VI = 5.5 V or GND,
IO = 0
1.65 V to 5.5 V
3 V to 5.5 V
3.3 V
∆ICC
One input at VCC – 0.6 V, Other inputs at VCC or GND
VI = VCC or GND
500
Ci
5
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
UNIT
MIN
MAX
80
MIN
MAX
175
MIN
MAX
175
MIN
MAX
200
fclock
tw
MHz
ns
CLK
6.2
6.2
2.9
1.9
0
2.7
2.7
1.7
1.4
0.3
2.7
2.7
1.3
1.2
1.2
2
2
Pulse duration
PRE or CLR low
Data
1.1
1
tsu
th
Setup time, before CLK↑
Hold time, data after CLK↑
ns
ns
PRE or CLR inactive
0.5
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
80
MAX
MIN
175
2.2
3
MAX
MIN
MAX
MIN
200
1.4
MAX
fmax
175
2.2
2.6
1.7
MHz
Q
Q
4.8
6
13.4
14.4
12.9
7.1
7.7
7
5.9
6.2
5.9
4.1
4.4
4.1
CLK
tpd
1.6
ns
PRE or CLR
Q or Q
4.4
2.3
1.6
5
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
Operating Characteristics
TA = 25°C
VCC = 1.8 V
VCC = 2.5 V
TYP
VCC = 3.3 V
TYP
VCC = 5 V
PARAMETER
TEST CONDITIONS
UNIT
TYP
TYP
Cpd
Power dissipation capacitance
f = 10 MHz
35
35
37
40
pF
6
SN74LVC2G74
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
WITH CLEAR AND PRESET
www.ti.com
SCES203K–APRIL 1999–REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
V
LOAD
S1
Open
R
L
From Output
Under Test
TEST
/t
S1
GND
t
t
Open
PLH PHL
C
L
t
/t
V
R
L
PLZ PZL
LOAD
GND
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
LOAD
C
L
R
L
V
∆
V
I
t /t
r f
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
V
V
3 V
≤2 ns
≤2 ns
≤2.5 ns
≤2.5 ns
V
/2
/2
2 × V
2 × V
6 V
2 × V
CC
30 pF
30 pF
50 pF
50 pF
1 kΩ
500 Ω
500 Ω
500 Ω
0.15 V
0.15 V
0.3 V
CC
CC
CC
V
CC
CC
CC
1.5 V
/2
V
CC
V
CC
0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
h
su
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
0 V
t
t
t
t
t
PHL
PZL
PLZ
PLH
Output
Waveform 1
V
V
OH
V
V
/2
LOAD
V
V
V
M
M
Output
V
V
M
S1 at V
LOAD
V
OL
+ V
∆
OL
(see Note B)
OL
t
PHL
PLH
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
− V
∆
V
M
OH
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
30-Aug-2005
PACKAGING INFORMATION
Orderable Device
SN74LVC2G74DCTR
SN74LVC2G74DCTRE4
SN74LVC2G74DCUR
SN74LVC2G74DCURE4
SN74LVC2G74DCURG4
SN74LVC2G74DCUT
SN74LVC2G74DCUTE4
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SM8
DCT
8
8
8
8
8
8
8
3000
3000
3000
3000
Pb-Free
(RoHS)
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
CU NIPDAU Level-1-260C-UNLIM
SM8
US8
US8
US8
US8
US8
DCT
DCU
DCU
DCU
DCU
DCU
Pb-Free
(RoHS)
Pb-Free
(RoHS)
Pb-Free
(RoHS)
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250
Pb-Free
(RoHS)
CU NIPDAU Level-1-260C-UNLIM
250
Pb-Free
(RoHS)
CU NIPDAU Level-1-260C-UNLIM
SN74LVC2G74YEAR
SN74LVC2G74YEPR
SN74LVC2G74YZAR
ACTIVE
ACTIVE
ACTIVE
WCSP
WCSP
WCSP
YEA
YEP
YZA
8
8
8
3000
3000
3000
TBD
TBD
SNPB
SNPB
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Pb-Free
(RoHS)
SNAGCU
SN74LVC2G74YZPR
ACTIVE
WCSP
YZP
8
3000
Pb-Free
(RoHS)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS
&
no Sb/Br)
-
please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS049B – MAY 1999 – REVISED OCTOBER 2002
DCT (R-PDSO-G8)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
M
0,13
0,65
8
5
0,15 NOM
2,90
2,70
4,25
3,75
Gage Plane
PIN 1
INDEX AREA
0,25
1
4
0° – 8°
0,60
0,20
3,15
2,75
1,30 MAX
Seating Plane
0,10
0,10
0,00
4188781/C 09/02
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion
D. Falls within JEDEC MO-187 variation DA.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号：
UL1042
UL1042 - Uk砤d zr體nowa縪nego mieszacza iloczynowegoWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV201
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14
IC-SM-VIDEO AMPWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14TA
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14TC
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV302N16
IC-SM-4:1 MUX SWITCHWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV4089
VIDEO AMPLIFIER WITH DC RESTORATIONWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
©2020 ICPDF网 联系我们和版权申明