SN74LVC373ADWRG4 [TI]

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS; 八路透明D类锁存器具有三态输出
SN74LVC373ADWRG4
型号: SN74LVC373ADWRG4
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS
八路透明D类锁存器具有三态输出

总线驱动器 总线收发器 锁存器 逻辑集成电路 光电二极管 输出元件
文件: 总28页 (文件大小:1058K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
FEATURES  
Ioff Supports Partial-Power-Down Mode  
Operation  
Operate From 1.65 V to 3.6 V  
Inputs Accept Voltages to 5.5 V  
Max tpd of 6.8 ns at 3.3 V  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds JESD 22  
– 2000-V Human-Body Model (A114-A)  
– 200-V Machine Model (A115-A)  
Typical VOLP (Output Ground Bounce) < 0.8 V  
at VCC = 3.3 V, TA = 25°C  
Typical VOHV (Output VOH Undershoot) > 2 V at  
VCC = 3.3 V, TA = 25°C  
– 1000-V Charged-Device Model (C101)  
ABC  
Support Mixed-Mode Signal Operation on All  
Ports (5-V Input/Output Voltage With  
3.3-V VCC  
)
SN54LVC373A . . . J OR W PACKAGE  
SN74LVC373A . . . DB, DGV, DW, N,  
NS, OR PW PACKAGE  
SN74LVC373A . . . RGY PACKAGE  
(TOP VIEW)  
SN54LVC373A . . . FK PACKAGE  
(TOP VIEW)  
(TOP VIEW)  
1
20  
1
2
3
4
5
6
7
8
9
10  
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
OE  
1Q  
1D  
V
CC  
3
9
2
1
20 19  
18  
2D  
2Q  
3Q  
3D  
4D  
8D  
7D  
7Q  
6Q  
6D  
2
3
4
5
6
7
8
9
19  
18  
17  
16  
15  
14  
13  
12  
4
5
6
7
8
1Q  
1D  
2D  
2Q  
3Q  
3D  
4D  
4Q  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
8Q  
8D  
7D  
7Q  
6Q  
6D  
5D  
5Q  
LE  
17  
16  
15  
14  
2D  
2Q  
3Q  
10 11 12 13  
3D  
4D  
4Q  
GND  
10  
11  
DESCRIPTION/ORDERING INFORMATION  
The SN54LVC373A octal transparent D-type latch is designed for 2.7-V to 3.6-V VCC operation, and the  
SN74LVC373A octal transparent D-type latch is designed for 1.65-V to 3.6-V VCC operation.  
While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs. When LE is taken low, the Q  
outputs are latched at the logic levels set up at the D inputs.  
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or  
low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the  
bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines  
without interface or pullup components.  
OE does not affect the internal operations of the latches. Old data can be retained or new data can be entered  
while the outputs are in the high-impedance state.  
These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the  
outputs, preventing damaging current backflow through the devices when they are powered down.  
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup  
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.  
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators  
in a mixed 3.3-V/5-V system environment.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1993–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
On products compliant to MIL-PRF-38535, all parameters are  
Instruments standard warranty. Production processing does not  
tested unless otherwise noted. On all other products, production  
necessarily include testing of all parameters.  
processing does not necessarily include testing of all parameters.  
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
DESCRIPTION/ORDERING INFORMATION (CONTINUED)  
ORDERING INFORMATION  
TA  
PACKAGE(1)  
ORDERABLE PART NUMBER  
SN74LVC373AN  
TOP-SIDE MARKING  
PDIP – N  
Tube of 20  
SN74LVC373AN  
QFN – RGY  
Reel of 1000  
Tube of 25  
SN74LVC373ARGYR  
SN74LVC373ADW  
SN74LVC373ADWR  
SN74LVC373ANSR  
SN74LVC373ADBR  
SN74LVC373APW  
LC373A  
SOIC – DW  
LVC373A  
Reel of 2000  
Reel of 2000  
Reel of 2000  
Tube of 70  
SOP – NS  
LVC373A  
LC373A  
SSOP – DB  
–40°C to 85°C  
TSSOP – PW  
Reel of 2000  
Reel of 250  
Reel of 2000  
SN74LVC373APWR  
SN74LVC373APWT  
SN74LVC373ADGVR  
SN74LVC373AGQNR  
SN74LVC373AZQNR  
SNJ54LVC373AJ  
LC373A  
TVSOP – DGV  
VFBGA – GQN  
VFBGA – ZQN (Pb-free)  
CDIP – J  
LC373A  
LC373A  
Reel of 1000  
Tube of 20  
Tube of 85  
Tube of 55  
SNJ54LVC373AJ  
SNJ54LVC373AW  
SNJ54LVC373AFK  
–55°C to 125°C  
CFP – W  
SNJ54LVC373AW  
LCCC – FK  
SNJ54LVC373AFK  
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at  
www.ti.com/sc/package.  
GQN OR ZQN PACKAGE  
TERMINAL ASSIGNMENTS  
(TOP VIEW)  
1
1Q  
2
3
4
1
2
3
4
A
B
C
D
E
OE  
7D  
2Q  
5D  
4Q  
VCC  
1D  
6Q  
3D  
LE  
8Q  
8D  
7Q  
6D  
5Q  
A
B
C
D
E
2D  
3Q  
4D  
GND  
FUNCTION TABLE  
(EACH LATCH)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
H
H
L
D
H
L
H
L
L
L
X
X
Q0  
Z
H
X
2
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
LOGIC DIAGRAM (POSITIVE LOGIC)  
1
OE  
LE  
11  
C1  
1D  
2
1Q  
3
1D  
To Seven Other Channels  
Pin numbers shown are for the DB, DGV, DW, FK, J, N, NS, PW, RGY, and W packages.  
Absolute Maximum Ratings(1)  
over operating free-air temperature range (unless otherwise noted)  
MIN  
–0.5  
–0.5  
–0.5  
MAX  
6.5  
UNIT  
V
VCC  
VI  
Supply voltage range  
Input voltage range(2)  
Voltage range applied to any output in the high-impedance or power-off state(2)  
Voltage range applied to any output in the high or low state(2)(3)  
6.5  
V
VO  
VO  
IIK  
6.5  
V
–0.5 VCC + 0.5  
V
Input clamp current  
VI < 0  
–50  
–50  
±50  
±100  
70  
mA  
mA  
mA  
mA  
IOK  
IO  
Output clamp current  
VO < 0  
Continuous output current  
Continuous current through VCC or GND  
DB package(4)  
DGV package(4)  
DW package(4)  
GQN/ZQN package(4)  
N package(4)  
NS package(4)  
PW package(4)  
RGY package(5)  
92  
58  
78  
θJA  
Package thermal impedance  
Storage temperature range  
°C/W  
69  
60  
83  
37  
Tstg  
–65  
150  
°C  
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating  
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.  
(3) The value of VCC is provided in the recommended operating conditions table.  
(4) The package thermal impedance is calculated in accordance with JESD 51-7.  
(5) The package thermal impedance is calculated in accordance with JESD 51-5.  
3
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
Recommended Operating Conditions(1)  
SN54LVC373A  
SN74LVC373A  
UNIT  
MIN  
2
MAX  
MIN  
1.65  
1.5  
MAX  
Operating  
3.6  
3.6  
VCC  
Supply voltage  
V
V
Data retention only  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
VCC = 1.65 V to 1.95 V  
VCC = 2.3 V to 2.7 V  
VCC = 2.7 V to 3.6 V  
1.5  
0.65 × VCC  
VIH  
High-level input voltage  
1.7  
2
2
0.35 × VCC  
0.7  
0.8  
5.5  
VCC  
5.5  
–4  
VIL  
Low-level input voltage  
V
0.8  
5.5  
VI  
Input voltage  
0
0
0
0
0
0
V
V
High or low state  
3-state  
VCC  
5.5  
VO  
Output voltage  
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 2.7 V  
VCC = 3 V  
–8  
IOH  
High-level output current  
Low-level output current  
mA  
mA  
–12  
–24  
–12  
–24  
4
VCC = 1.65 V  
VCC = 2.3 V  
VCC = 2.7 V  
VCC = 3 V  
8
IOL  
12  
24  
12  
24  
t/v  
Input transition rise or fall rate  
Operating free-air temperature  
10  
10  
ns/V  
°C  
TA  
–55  
125  
–40  
85  
(1) All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,  
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.  
4
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
Electrical Characteristics  
over recommended operating free-air temperature range (unless otherwise noted)  
SN54LVC373A  
MIN TYP(1) MAX  
SN74LVC373A  
MIN TYP(1)  
PARAMETER  
TEST CONDITIONS  
VCC  
UNIT  
MAX  
1.65 V to 3.6 V  
2.7 V to 3.6 V  
1.65 V  
2.3 V  
VCC – 0.2  
IOH = –100 µA  
VCC – 0.2  
IOH = –4 mA  
IOH = –8 mA  
1.2  
1.7  
2.2  
2.4  
2.2  
VOH  
V
2.7 V  
2.2  
2.4  
2.2  
IOH = –12 mA  
IOH = –24 mA  
IOL = 100 µA  
3 V  
3 V  
1.65 V to 3.6 V  
2.7 V to 3.6 V  
1.65 V  
2.3 V  
0.2  
0.2  
IOL = 4 mA  
0.45  
0.7  
0.4  
0.55  
±5  
VOL  
V
IOL = 8 mA  
IOL = 12 mA  
2.7 V  
0.4  
0.55  
±5  
IOL = 24 mA  
3 V  
II  
VI = 0 to 5.5 V  
VI or VO = 5.5 V  
VO = 0 to 5.5 V  
VI = VCC or GND  
3.6 V VI 5.5 V(2)  
One input at VCC – 0.6 V,  
3.6 V  
µA  
µA  
µA  
Ioff  
IOZ  
0
±10  
±10  
10  
3.6 V  
±15  
10  
ICC  
IO = 0  
3.6 V  
µA  
µA  
10  
10  
ICC  
2.7 V to 3.6 V  
500  
500  
Other inputs at VCC or GND  
Ci  
VI = VCC or GND  
3.3 V  
3.3 V  
4
12  
12  
4
pF  
pF  
Co  
VO = VCC or GND  
5.5  
5.5  
(1) All typical values are at VCC = 3.3 V, TA = 25°C.  
(2) This applies in the disabled state only.  
Timing Requirements  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
SN54LVC373A  
VCC = 3.3 V  
± 0.3 V  
VCC = 2.7 V  
UNIT  
MIN MAX MIN  
MAX  
tw  
tsu  
th  
Pulse duration, LE high  
Setup time, data before LE↓  
Hold time, data after LE↓  
3.3  
2
3.3  
2
ns  
ns  
ns  
2
2
Timing Requirements  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
SN74LVC373A  
VCC = 1.8 V  
± 0.15 V  
VCC = 2.5 V  
± 0.2 V  
VCC = 3.3 V  
± 0.3 V  
VCC = 2.7 V  
UNIT  
MIN  
MAX MIN  
MAX  
MIN MAX  
MIN  
3.3  
2
MAX  
(1)  
(1)  
tw  
tsu  
th  
Pulse duration, LE high  
Setup time, data before LE↓  
Hold time, data after LE↓  
3.3  
2
ns  
ns  
ns  
(1)  
(1)  
(1)  
(1)  
1.5  
1.5  
(1) This information was not available at the time of publication.  
5
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
Switching Characteristics  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
SN54LVC373A  
VCC = 3.3 V  
± 0.3 V  
MIN MAX  
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
VCC = 2.7 V  
UNIT  
MIN  
MAX  
D
8.5  
9.5  
8.7  
8
1
1
7.5  
8.5  
7.7  
7
tpd  
Q
ns  
LE  
OE  
OE  
ten  
Q
Q
1
ns  
ns  
tdis  
0.5  
Switching Characteristics  
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)  
SN74LVC373A  
FROM  
(INPUT)  
TO  
(OUTPUT)  
VCC = 1.8 V  
± 0.15 V  
VCC = 2.5 V  
± 0.2 V  
VCC = 3.3 V  
± 0.3 V  
PARAMETER  
VCC = 2.7 V  
UNIT  
MIN MAX  
MIN MAX  
MIN MAX  
MIN  
1.5  
2
MAX  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
(1)  
D
7.8  
8.2  
8.7  
7.6  
6.8  
7.6  
7.7  
7
tpd  
Q
ns  
LE  
OE  
OE  
ten  
tdis  
Q
Q
1.5  
1.5  
ns  
ns  
ns  
tsk(o)  
1
(1) This information was not available at the time of publication.  
Operating Characteristics  
TA = 25°C  
VCC = 1.8 V  
VCC = 2.5 V  
VCC = 3.3 V  
TEST  
CONDITIONS  
PARAMETER  
UNIT  
TYP  
TYP  
TYP  
46  
3
(1)  
(1)  
Outputs enabled  
Outputs disabled  
Power dissipation capacitance  
per latch  
Cpd  
f = 10 MHz  
pF  
(1)  
(1)  
(1) This information was not available at the time of publication.  
6
SN54LVC373A, SN74LVC373A  
OCTAL TRANSPARENT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
www.ti.com  
SCAS295SJANUARY 1993REVISED MAY 2005  
PARAMETER MEASUREMENT INFORMATION  
V
LOAD  
S1  
Open  
R
L
From Output  
Under Test  
TEST  
/t  
S1  
GND  
t
t
Open  
PLH PHL  
C
L
t
/t  
V
R
L
PLZ PZL  
LOAD  
GND  
(see Note A)  
/t  
PHZ PZH  
LOAD CIRCUIT  
INPUTS  
V
CC  
V
M
V
LOAD  
C
L
R
L
V
V
I
t /t  
r f  
1.8 V ± 0.15 V  
2.5 V ± 0.2 V  
2.7 V  
V
V
2.7 V  
2.7 V  
2 ns  
2 ns  
2.5 ns  
2.5 ns  
V
/2  
/2  
2 × V  
2 × V  
6 V  
6 V  
30 pF  
30 pF  
50 pF  
50 pF  
1 k  
500 Ω  
500 Ω  
500 Ω  
0.15 V  
0.15 V  
0.3 V  
CC  
CC  
CC  
V
CC  
CC  
CC  
1.5 V  
1.5 V  
3.3 V ± 0.3 V  
0.3 V  
V
I
Timing Input  
Data Input  
V
M
0 V  
t
w
t
t
h
su  
V
I
V
I
Input  
V
M
V
M
V
M
V
M
0 V  
0 V  
VOLTAGE WAVEFORMS  
PULSE DURATION  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
V
I
V
I
Output  
Control  
V
M
V
M
Input  
V
M
V
M
0 V  
0 V  
t
t
t
t
t
PHL  
PZL  
PLZ  
PLH  
Output  
Waveform 1  
V
V
OH  
V
V
/2  
LOAD  
V
V
V
M
M
Output  
V
V
M
S1 at V  
LOAD  
V
OL  
+ V  
OL  
(see Note B)  
OL  
t
PHL  
PLH  
t
t
PHZ  
PZH  
Output  
Waveform 2  
S1 at GND  
V
V
OH  
V
OH  
V
- V  
V
M
OH  
M
Output  
M
0 V  
OL  
(see Note B)  
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
INVERTING AND NONINVERTING OUTPUTS  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES  
LOW- AND HIGH-LEVEL ENABLING  
NOTES: A. C includes probe and jig capacitance.  
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, Z = 50 .  
O
D. The outputs are measured one at a time, with one transition per measurement.  
E.  
F.  
G.  
t
t
t
and t  
and t  
and t  
are the same as t  
.
dis  
.
PLZ  
PZL  
PLH  
PHZ  
are the same as t  
PZH  
en  
are the same as t .  
PHL pd  
H. All parameters and waveforms are not applicable to all devices.  
Figure 1. Load Circuit and Voltage Waveforms  
7
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jun-2010  
PACKAGING INFORMATION  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Samples Not Available  
5962-9757301Q2A  
5962-9757301QRA  
5962-9757301QSA  
SN74LVC373ADBLE  
SN74LVC373ADBR  
ACTIVE  
ACTIVE  
LCCC  
CDIP  
CFP  
FK  
J
20  
20  
20  
20  
20  
1
1
1
TBD  
TBD  
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
A42  
N / A for Pkg Type  
N / A for Pkg Type  
Call TI  
ACTIVE  
W
Call TI  
Call TI  
OBSOLETE  
ACTIVE  
SSOP  
SSOP  
DB  
DB  
2000  
2000  
2000  
2000  
2000  
2000  
25  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
SN74LVC373ADBRE4  
SN74LVC373ADBRG4  
SN74LVC373ADGVR  
SN74LVC373ADGVRE4  
SN74LVC373ADGVRG4  
SN74LVC373ADW  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
NRND  
SSOP  
SSOP  
TVSOP  
TVSOP  
TVSOP  
SOIC  
DB  
DB  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
DGV  
DGV  
DGV  
DW  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SN74LVC373ADWG4  
SN74LVC373ADWR  
SN74LVC373ADWRE4  
SN74LVC373ADWRG4  
SN74LVC373AGQNR  
SOIC  
DW  
25  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SOIC  
DW  
2000  
2000  
2000  
1000  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SOIC  
DW  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
SOIC  
DW  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
BGA  
GQN  
TBD  
SNPB  
Level-1-240C-UNLIM  
Samples Not Available  
MICROSTAR  
JUNIOR  
SN74LVC373AN  
ACTIVE  
ACTIVE  
PDIP  
N
N
20  
20  
20  
20  
Pb-Free (RoHS)  
Pb-Free (RoHS)  
CU NIPDAU N / A for Pkg Type  
CU NIPDAU N / A for Pkg Type  
Contact TI Distributor  
or Sales Office  
SN74LVC373ANE4  
PDIP  
Contact TI Distributor  
or Sales Office  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jun-2010  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SN74LVC373ANSR  
SN74LVC373ANSRE4  
SN74LVC373ANSRG4  
SN74LVC373APW  
SO  
SO  
NS  
NS  
NS  
PW  
PW  
PW  
20  
20  
20  
20  
20  
20  
2000  
2000  
2000  
70  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Samples Not Available  
SO  
Green (RoHS  
& no Sb/Br)  
TSSOP  
TSSOP  
TSSOP  
Green (RoHS  
& no Sb/Br)  
SN74LVC373APWE4  
SN74LVC373APWG4  
70  
Green (RoHS  
& no Sb/Br)  
70  
Green (RoHS  
& no Sb/Br)  
SN74LVC373APWLE  
SN74LVC373APWR  
OBSOLETE  
ACTIVE  
TSSOP  
TSSOP  
PW  
PW  
20  
20  
TBD  
Call TI  
Call TI  
2000  
2000  
2000  
250  
Green (RoHS  
& no Sb/Br)  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-1-260C-UNLIM  
CU NIPDAU Level-2-260C-1 YEAR  
CU NIPDAU Level-2-260C-1 YEAR  
SNAGCU Level-1-260C-UNLIM  
Contact TI Distributor  
or Sales Office  
SN74LVC373APWRE4  
SN74LVC373APWRG4  
SN74LVC373APWT  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
TSSOP  
VQFN  
PW  
PW  
20  
20  
20  
20  
20  
20  
20  
20  
Green (RoHS  
& no Sb/Br)  
Contact TI Distributor  
or Sales Office  
Green (RoHS  
& no Sb/Br)  
Request Free Samples  
Purchase Samples  
Purchase Samples  
Purchase Samples  
Request Free Samples  
Request Free Samples  
Purchase Samples  
PW  
Green (RoHS  
& no Sb/Br)  
SN74LVC373APWTE4  
SN74LVC373APWTG4  
SN74LVC373ARGYR  
SN74LVC373ARGYRG4  
SN74LVC373AZQNR  
PW  
250  
Green (RoHS  
& no Sb/Br)  
PW  
250  
Green (RoHS  
& no Sb/Br)  
RGY  
RGY  
ZQN  
3000  
3000  
1000  
Green (RoHS  
& no Sb/Br)  
VQFN  
Green (RoHS  
& no Sb/Br)  
BGA  
Green (RoHS  
& no Sb/Br)  
MICROSTAR  
JUNIOR  
SNJ54LVC373AFK  
SNJ54LVC373AJ  
ACTIVE  
ACTIVE  
LCCC  
FK  
J
20  
20  
1
1
TBD  
TBD  
POST-PLATE N / A for Pkg Type  
Contact TI Distributor  
or Sales Office  
CDIP  
A42  
N / A for Pkg Type  
Contact TI Distributor  
or Sales Office  
Addendum-Page 2  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jun-2010  
Status (1)  
Eco Plan (2)  
MSL Peak Temp (3)  
Samples  
Orderable Device  
Package Type Package  
Drawing  
Pins  
Package Qty  
Lead/  
Ball Finish  
(Requires Login)  
SNJ54LVC373AW  
ACTIVE  
CFP  
W
20  
1
TBD  
Call TI  
N / A for Pkg Type  
Contact TI Distributor  
or Sales Office  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability  
information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that  
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between  
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight  
in homogeneous material)  
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information  
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and  
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.  
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN54LVC373A, SN74LVC373A :  
Catalog: SN74LVC373A  
Automotive: SN74LVC373A-Q1, SN74LVC373A-Q1  
Enhanced Product: SN74LVC373A-EP, SN74LVC373A-EP  
Military: SN54LVC373A  
Addendum-Page 3  
PACKAGE OPTION ADDENDUM  
www.ti.com  
30-Jun-2010  
NOTE: Qualified Version Definitions:  
Catalog - TI's standard catalog product  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Enhanced Product - Supports Defense, Aerospace and Medical Applications  
Military - QML certified for Military and Defense Applications  
Addendum-Page 4  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
6-Aug-2010  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN74LVC373ADBR  
SN74LVC373ADGVR  
SN74LVC373ADWR  
SN74LVC373AGQNR  
SSOP  
TVSOP  
SOIC  
DB  
DGV  
DW  
20  
20  
20  
20  
2000  
2000  
2000  
1000  
330.0  
330.0  
330.0  
330.0  
16.4  
12.4  
24.4  
12.4  
8.2  
6.9  
7.5  
5.6  
2.5  
1.6  
2.7  
1.5  
12.0  
8.0  
16.0  
12.0  
24.0  
12.0  
Q1  
Q1  
Q1  
Q1  
10.8  
3.3  
13.0  
4.3  
12.0  
8.0  
BGA MI  
CROSTA  
R JUNI  
OR  
GQN  
SN74LVC373ANSR  
SN74LVC373APWR  
SN74LVC373APWT  
SN74LVC373ARGYR  
SN74LVC373AZQNR  
SO  
NS  
PW  
20  
20  
20  
20  
20  
2000  
2000  
250  
330.0  
330.0  
330.0  
330.0  
330.0  
24.4  
16.4  
16.4  
12.4  
12.4  
8.2  
6.95  
6.95  
3.8  
13.0  
7.1  
7.1  
4.8  
4.3  
2.5  
1.6  
1.6  
1.6  
1.5  
12.0  
8.0  
8.0  
8.0  
8.0  
24.0  
16.0  
16.0  
12.0  
12.0  
Q1  
Q1  
Q1  
Q1  
Q1  
TSSOP  
TSSOP  
VQFN  
PW  
RGY  
ZQN  
3000  
1000  
BGA MI  
CROSTA  
R JUNI  
OR  
3.3  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
6-Aug-2010  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN74LVC373ADBR  
SN74LVC373ADGVR  
SN74LVC373ADWR  
SN74LVC373AGQNR  
SSOP  
TVSOP  
SOIC  
DB  
DGV  
DW  
20  
20  
20  
20  
2000  
2000  
2000  
1000  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
33.0  
29.0  
41.0  
29.0  
BGA MICROSTAR  
JUNIOR  
GQN  
SN74LVC373ANSR  
SN74LVC373APWR  
SN74LVC373APWT  
SN74LVC373ARGYR  
SN74LVC373AZQNR  
SO  
NS  
PW  
20  
20  
20  
20  
20  
2000  
2000  
250  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
346.0  
41.0  
33.0  
33.0  
29.0  
29.0  
TSSOP  
TSSOP  
VQFN  
PW  
RGY  
ZQN  
3000  
1000  
BGA MICROSTAR  
JUNIOR  
Pack Materials-Page 2  
MECHANICAL DATA  
MLCC006B – OCTOBER 1996  
FK (S-CQCC-N**)  
LEADLESS CERAMIC CHIP CARRIER  
28 TERMINAL SHOWN  
A
B
NO. OF  
TERMINALS  
**  
18 17 16 15 14 13 12  
MIN  
MAX  
MIN  
MAX  
0.342  
(8,69)  
0.358  
(9,09)  
0.307  
(7,80)  
0.358  
(9,09)  
19  
20  
11  
10  
9
20  
28  
44  
52  
68  
84  
0.442  
(11,23)  
0.458  
(11,63)  
0.406  
(10,31)  
0.458  
(11,63)  
21  
B SQ  
22  
0.640  
(16,26)  
0.660  
(16,76)  
0.495  
(12,58)  
0.560  
(14,22)  
8
A SQ  
23  
0.739  
(18,78)  
0.761  
(19,32)  
0.495  
(12,58)  
0.560  
(14,22)  
7
24  
25  
6
0.938  
(23,83)  
0.962  
(24,43)  
0.850  
(21,6)  
0.858  
(21,8)  
5
1.141  
(28,99)  
1.165  
(29,59)  
1.047  
(26,6)  
1.063  
(27,0)  
26 27 28  
1
2
3
4
0.080 (2,03)  
0.064 (1,63)  
0.020 (0,51)  
0.010 (0,25)  
0.020 (0,51)  
0.010 (0,25)  
0.055 (1,40)  
0.045 (1,14)  
0.045 (1,14)  
0.035 (0,89)  
0.045 (1,14)  
0.035 (0,89)  
0.028 (0,71)  
0.022 (0,54)  
0.050 (1,27)  
4040140/D 10/96  
NOTES: A. All linear dimensions are in inches (millimeters).  
B. This drawing is subject to change without notice.  
C. This package can be hermetically sealed with a metal lid.  
D. The terminals are gold plated.  
E. Falls within JEDEC MS-004  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000  
DGV (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
24 PINS SHOWN  
0,23  
0,13  
M
0,07  
0,40  
24  
13  
0,16 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
0°ā8°  
0,75  
1
12  
0,50  
A
Seating Plane  
0,08  
0,15  
0,05  
1,20 MAX  
PINS **  
14  
16  
20  
24  
38  
48  
56  
DIM  
A MAX  
A MIN  
3,70  
3,50  
3,70  
3,50  
5,10  
4,90  
5,10  
4,90  
7,90  
7,70  
9,80  
9,60  
11,40  
11,20  
4073251/E 08/00  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.  
D. Falls within JEDEC: 24/48 Pins – MO-153  
14/16/20/56 Pins – MO-194  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001  
DB (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE  
28 PINS SHOWN  
0,38  
0,22  
0,65  
28  
M
0,15  
15  
0,25  
0,09  
5,60  
5,00  
8,20  
7,40  
Gage Plane  
1
14  
0,25  
A
0°ā8°  
0,95  
0,55  
Seating Plane  
0,10  
2,00 MAX  
0,05 MIN  
PINS **  
14  
16  
20  
24  
28  
30  
38  
DIM  
6,50  
5,90  
6,50  
5,90  
7,50  
8,50  
7,90  
10,50  
9,90  
10,50 12,90  
A MAX  
A MIN  
6,90  
9,90  
12,30  
4040065 /E 12/01  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-150  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
MECHANICAL DATA  
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999  
PW (R-PDSO-G**)  
PLASTIC SMALL-OUTLINE PACKAGE  
14 PINS SHOWN  
0,30  
0,19  
M
0,10  
0,65  
14  
8
0,15 NOM  
4,50  
4,30  
6,60  
6,20  
Gage Plane  
0,25  
1
7
0°8°  
A
0,75  
0,50  
Seating Plane  
0,10  
0,15  
0,05  
1,20 MAX  
PINS **  
8
14  
16  
20  
24  
28  
DIM  
3,10  
2,90  
5,10  
4,90  
5,10  
4,90  
6,60  
6,40  
7,90  
9,80  
9,60  
A MAX  
A MIN  
7,70  
4040064/F 01/97  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.  
D. Falls within JEDEC MO-153  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where  
mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
applications using TI components. To minimize the risks associated with customer products and applications, customers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
or other TI intellectual property right relating to any combination, machine, or process in which TI products or services are used. Information  
published by TI regarding third-party products or services does not constitute a license from TI to use such products or services or a  
warranty or endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual  
property of the third party, or a license from TI under the patents or other intellectual property of TI.  
Reproduction of TI information in TI data books or data sheets is permissible only if reproduction is without alteration and is accompanied  
by all associated warranties, conditions, limitations, and notices. Reproduction of this information with alteration is an unfair and deceptive  
business practice. TI is not responsible or liable for such altered documentation. Information of third parties may be subject to additional  
restrictions.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that product or service voids all  
express and any implied warranties for the associated TI product or service and is an unfair and deceptive business practice. TI is not  
responsible or liable for any such statements.  
TI products are not authorized for use in safety-critical applications (such as life support) where a failure of the TI product would reasonably  
be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing  
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and  
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products  
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be  
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in  
such safety-critical applications.  
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are  
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military  
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at  
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TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are  
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products in automotive applications, TI will not be responsible for any failure to meet such requirements.  
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:  
Products  
Applications  
Audio  
Amplifiers  
amplifier.ti.com  
dataconverter.ti.com  
www.dlp.com  
www.ti.com/audio  
Data Converters  
DLP® Products  
Automotive  
www.ti.com/automotive  
www.ti.com/communications  
Communications and  
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DSP  
dsp.ti.com  
Computers and  
Peripherals  
www.ti.com/computers  
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Interface  
www.ti.com/clocks  
interface.ti.com  
logic.ti.com  
Consumer Electronics  
Energy  
www.ti.com/consumer-apps  
www.ti.com/energy  
Logic  
Industrial  
www.ti.com/industrial  
Power Mgmt  
Microcontrollers  
RFID  
power.ti.com  
Medical  
www.ti.com/medical  
microcontroller.ti.com  
www.ti-rfid.com  
Security  
www.ti.com/security  
Space, Avionics &  
Defense  
www.ti.com/space-avionics-defense  
RF/IF and ZigBee® Solutions www.ti.com/lprf  
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Wireless  
www.ti.com/video  
www.ti.com/wireless-apps  
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2010, Texas Instruments Incorporated  

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ZXFV201

QUAD VIDEO AMPLIFIER

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ZETEX

ZXFV201N14

IC-SM-VIDEO AMP

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ZXFV201N14TA

QUAD VIDEO AMPLIFIER

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ZETEX

ZXFV201N14TC

QUAD VIDEO AMPLIFIER

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ZETEX

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ETC

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ETC

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ETC

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ZXFV302N16

IC-SM-4:1 MUX SWITCH

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ETC

ZXFV4089

VIDEO AMPLIFIER WITH DC RESTORATION

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ZETEX

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