SN74LVC4245ADBRG4 [TI]
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS; 八路总线收发器和3.3 V至5 V移位器3态输出
| 型号： | SN74LVC4245ADBRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER WITH 3-STATE OUTPUTS |
| 文件： | 总15页 (文件大小：366K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
FEATURES
DB, DW, OR PW PACKAGE
(TOP VIEW)
•
•
•
Bidirectional Voltage Translator
5.5 V on A Port and 2.7 V to 3.6 V on B Port
1
24
23
22
21
20
19
18
17
16
15
14
13
(5 V) V
V
V
(3.3 V)
(3.3 V)
CCA
CCB
Control Inputs VIH/VIL Levels Are Referenced
to VCCA Voltage
2
DIR
CCB
3
A1
A2
A3
A4
A5
A6
A7
A8
OE
B1
B2
B3
B4
B5
B6
B7
B8
GND
•
•
Latch-Up Performance Exceeds 250 mA Per
JESD 17
4
5
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
6
7
8
9
– 1000-V Charged-Device Model (C101)
10
11
12
GND
GND
DESCRIPTION/ORDERING INFORMATION
This 8-bit (octal) noninverting bus transceiver
contains two separate supply rails; B port has VCCB
,
which is set at 3.3 V, and A port has VCCA, which is
set at 5 V. This allows for translation from a 3.3-V to
a 5-V environment, and vice versa.
<br/>
The SN74LVC4245A is designed for asynchronous communication between data buses. The device transmits
data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the
direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are
effectively isolated. The control circuitry (DIR, OE) is powered by VCCA
.
The SN74LVC4245A pinout allows the designer to switch to a normal all-3.3-V or all-5-V 20-pin '245 device
without board re-layout. The designer uses the data paths for pins 2–11 and 14–23 of the SN74LVC4245A to
align with the conventional '245 pinout.
ORDERING INFORMATION
TA
PACKAGE(1)
Tube of 25
ORDERABLE PART NUMBER
SN74LVC4245ADW
TOP-SIDE MARKING
LVC4245A
SOIC – DW
SSOP – DB
Reel of 2000
Reel of 2000
Tube of 60
SN74LVC4245ADWR
SN74LVC4245ADBR
SN74LVC4245APW
SN74LVC4245APWR
SN74LVC4245APWT
LJ245A
LJ245A
–40°C to 85°C
TSSOP – PW
Reel of 2000
Reel of 250
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
FUNCTION TABLE
INPUTS
OPERATION
OE
L
DIR
L
B data to A bus
A data to B bus
Isolation
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 1994–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
LOGIC DIAGRAM (POSITIVE LOGIC)
2
3
DIR
A1
22
21
OE
B1
To Seven Other Channels
Absolute Maximum Ratings(1)
over operating free-air temperature range for VCCA = 4.5 V to 5.5 V (unless otherwise noted)
MIN
MAX
6.5
UNIT
VCCA
VI
Supply voltage range
Input voltage range
–0.5
V
A port(2)
Control inputs
A port(2)
VI < 0
–0.5 VCCA + 0.5
–0.5
V
6
VO
IIK
Output voltage range
–0.5 VCCA + 0.5
V
Input clamp current
–50
–50
±50
±100
63
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through each VCCA or GND
DB package
DW package
PW package
θJA
Package thermal impedance(3)
46
°C/W
°C
88
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This value is limited to 6 V maximum.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
2
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
Absolute Maximum Ratings(1)
over operating free-air temperature range for VCCB = 2.7 V to 3.6 V (unless otherwise noted)
MIN
MAX
UNIT
V
VCCB
VI
Supply voltage range
–0.5
4.6
Input voltage range
B port(2)
B port(2)
VI < 0
–0.5 VCCB + 0.5
V
VO
IIK
Output voltage range
–0.5 VCCB + 0.5
V
Input clamp current
–50
–50
±50
±100
63
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
Continuous output current
Continuous current through VCCB or GND
DB package
DW package
PW package
θJA
Package thermal impedance(3)
46
°C/W
°C
88
Tstg
Storage temperature range
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) This value is limited to 4.6 V maximum.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions(1)
for VCCA = 4.5 V to 5.5 V
MIN
4.5
2
MAX
UNIT
V
VCCA
VIH
VIL
Supply voltage
5.5
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
VCCA
VCCA
–24
24
V
VIA
VOA
IOH
IOL
0
0
V
Output voltage
V
High-level output current
Low-level output current
Operating free-air temperature
mA
mA
°C
TA
–40
85
(1) All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI
application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Recommended Operating Conditions(1)
for VCCB = 2.7 V to 3.6 V
MIN
2.7
2
MAX
UNIT
VCCB
VIH
Supply voltage
3.6
V
V
V
V
V
High-level input voltage
Low-level input voltage
Input voltage
VCCB = 2.7 V to 3.6 V
VCCB = 2.7 V to 3.6 V
VIL
0.8
VCCB
VCCB
–12
–24
12
VIB
0
0
VOB
Output voltage
VCCB = 2.7 V
VCCB = 3 V
VCCB = 2.7 V
VCCB = 3 V
IOH
High-level output current
mA
IOL
TA
Low-level output current
mA
24
Operating free-air temperature
–40
85
°C
(1) All unused inputs of the device must be held at the associated VCC or GND to ensure proper device operation. Refer to the TI
application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
3
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
Electrical Characteristics(1)
over recommended operating free-air temperature range for VCCA = 4.5 V to 5.5 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCA
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
4.5 V
5.5 V
5.5 V
5.5 V
5.5 V
5.5 V
Open
5 V
MIN TYP(2)
MAX UNIT
4.3
5.3
3.7
4.7
IOH = –100 µA
IOH = –24 mA
IOL = 100 µA
IOL = 24 mA
VOH
V
0.2
0.2
V
VOL
0.55
0.55
II
Control inputs VI = VCCA or GND
±1
±5
µA
µA
µA
mA
pF
pF
(3)
IOZ
A port
VO = VCCA or GND
VI = VCCA or GND,
One input at 3.4 V,
ICCA
∆ICCA
Ci
IO = 0
80
(4)
Other inputs at VCCA or GND
1.5
Control inputs VI = VCCA or GND
A port VO = VCCA or GND
5
Cio
11
(1) VCCB = 2.7 V to 3.6 V
(2) All typical values are measured at VCC = 5 V, TA = 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or the associated
VCC
.
Electrical Characteristics(1)
over recommended operating free-air temperature range for VCCB = 2.7 V to 3.6 V (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCCB
2.7 V to 3.6 V VCC – 0.2
MIN TYP(2)
MAX UNIT
IOH = –100 µA
2.7 V
3 V
2.2
2.4
2
VOH
IOH = –12 mA
V
IOH = –24 mA
IOL = 100 µA
3 V
2.7 V to 3.6 V
2.7 V
0.2
VOL
IOL = 12 mA
0.4
0.55
±5
V
IOL = 24 mA
3 V
(3)
IOZ
B port
B port
VO = VCCB or GND
VI = VCCB or GND,
3.6 V
µA
µA
mA
pF
ICCB
∆ICCB
Cio
IO = 0
3.6 V
50
(4)
One input at VCCB – 0.6 V,
VO = VCCB or GND
Other inputs at VCCB or GND
2.7 V to 3.6 V
3.3 V
0.5
11
(1) VCCA = 5 V ± 0.5 V
(2) All typical values are measured at VCC = 3.3 V, TA = 25°C.
(3) For I/O ports, the parameter IOZ includes the input leakage current.
(4) This is the increase in supply current for each input that is at one of the specified TTL voltage levels, rather than 0 V or the associated
VCC
.
4
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
Switching Characteristics
over recommended operating free-air temperature range, CL = 50 pF (unless otherwise noted) (see Figure 1 and Figure 2)
VCCA = 5 V ± 0.5 V,
VCCB = 2.7 V to 3.6 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN
1
MAX
tPHL
tPLH
tPHL
tPLH
tPZL
tPZH
tPZL
tPZH
tPLZ
tPHZ
tPLZ
tPHZ
6.3
6.7
6.1
5
A
B
A
A
B
A
B
ns
ns
ns
ns
ns
ns
1
1
B
1
1
9
OE
OE
OE
OE
1
8.1
8.8
9.8
7
1
1
1
1
5.8
7.7
7.8
1
1
Operating Characteristics
VCCA = 4.5 V to 5.5 V, VCCB = 2.7 V to 3.6 V, TA = 25°C
PARAMETER
TEST CONDITIONS
TYP
UNIT
Outputs enabled
Outputs disabled
39.5
5
Cpd
Power dissipation capacitance per transceiver
CL = 0,
f = 10 MHz
pF
(1)
Power-Up Considerations
TI level-translation devices offer an opportunity for successful mixed-voltage signal design. A proper power-up
sequence always should be followed to avoid excessive supply current, bus contention, oscillations, or other
anomalies caused by improperly biased device pins. Take these precautions to guard against such power-up
problems:
1. Connect ground before any supply voltage is applied.
2. Power up the control side of the device (VCCA for all four of these devices).
3. Tie OE to VCCA with a pullup resistor so that it ramps with VCCA
.
4. Depending on the direction of the data path, DIR can be high or low. If DIR high is needed (A data to B bus),
ramp it with VCCA. Otherwise, keep DIR low.
(1) Refer to the TI application report, Texas Instruments Voltage-Level-Translation Devices, literature number SCEA021.
5
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
A PORT
2 × V
CC
S1
Open
500 Ω
From Output
Under Test
TEST
/t
S1
GND
t
Open
PLH PHL
C = 50 pF
(see Note A)
L
t
/t
/t
2 × V
CC
GND
PLZ PZL
500 Ω
t
PHZ PZH
LOAD CIRCUIT
t
w
V
CC
Input
1.5 V
1.5 V
3 V
0 V
0 V
Output
Control
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
t
PLZ
PZL
Output
Waveform 1
S1 at 2 × V
CC
(see Note B)
V
V
CC
V
CC
50% V
CC
V
V
+ 0.3 V
OL
1.5 V
1.5 V
Input
OL
0 V
V
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
OH
- 0.3 V
OH
50% V
Output
CC
50% V
50% V
CC
CC
≈0 V
(see Note B)
V
OL
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
SN74LVC4245A
OCTAL BUS TRANSCEIVER AND 3.3-V TO 5-V SHIFTER
WITH 3-STATE OUTPUTS
www.ti.com
SCAS375H–MARCH 1994–REVISED MARCH 2005
PARAMETER MEASUREMENT INFORMATION
B PORT
7 V
Open
GND
S1
500 Ω
From Output
Under Test
TEST
/t
S1
t
Open
7 V
GND
PLH PHL
C = 50 pF
L
t
t
/t
PLZ PZL
500 Ω
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
t
w
3 V
Input
1.5 V
1.5 V
3 V
0 V
0 V
Output
Control
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
t
t
PLZ
PZL
Output
Waveform 1
S1 at 7 V
3.5 V
3 V
0 V
1.5 V
V
V
+ 0.3 V
OL
1.5 V
1.5 V
Input
V
OL
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
V
OH
Output
Waveform 2
S1 at GND
V
V
OH
- 0.3 V
OH
1.5 V
Output
1.5 V
1.5 V
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
NONINVERTING OUTPUTS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time, with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 2. Load Circuit and Voltage Waveforms
7
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
PACKAGING INFORMATION
Orderable Device
SN74LVC4245ADBR
SN74LVC4245ADBRE4
SN74LVC4245ADBRG4
SN74LVC4245ADW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SSOP
DB
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SSOP
SSOP
SOIC
DB
DB
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
DW
DW
DW
DW
DW
DW
PW
PW
PW
PW
PW
PW
PW
PW
PW
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC4245ADWE4
SN74LVC4245ADWG4
SN74LVC4245ADWR
SN74LVC4245ADWRE4
SN74LVC4245ADWRG4
SN74LVC4245APW
SOIC
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVC4245APWE4
SN74LVC4245APWG4
SN74LVC4245APWR
SN74LVC4245APWRE4
SN74LVC4245APWRG4
SN74LVC4245APWT
SN74LVC4245APWTE4
SN74LVC4245APWTG4
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
60 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
28-May-2007
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
SN74LVC4245ADBR
SN74LVC4245ADWR
SN74LVC4245APWR
DB
DW
PW
24
24
24
SITE 41
SITE 60
SITE 41
8.2
10.75
6.95
8.8
15.7
8.3
2.5
2.7
1.6
12
12
8
16
24
16
Q1
Q1
Q1
330
24
330
16
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
SN74LVC4245ADBR
SN74LVC4245ADWR
SN74LVC4245APWR
DB
DW
PW
24
24
24
SITE 41
SITE 60
SITE 41
346.0
346.0
346.0
346.0
346.0
346.0
33.0
41.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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