SN74LVC8T245MDWREP [TI]
具有可配置电压转换和三态输出的增强型产品 8 位双电源总线收发器 | DW | 24 | -55 to 125;型号: | SN74LVC8T245MDWREP |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有可配置电压转换和三态输出的增强型产品 8 位双电源总线收发器 | DW | 24 | -55 to 125 驱动 总线驱动器 总线收发器 |
文件: | 总13页 (文件大小:331K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN74LVC8T245-EP
www.ti.com ........................................................................................................................................................................................... SCES770–DECEMBER 2008
8-BIT DUAL-SUPPLY BUS TRANSCEIVER
WITH CONFIGURABLE VOLTAGE TRANSLATION AND 3-STATE OUTPUTS
1
FEATURES
•
•
•
Control Inputs VIH/VIL Levels Are Referenced to
VCCA Voltage
SUPPORTS DEFENSE, AEROSPACE,
AND MEDICAL APPLICATIONS
•
•
•
•
Controlled Baseline
One Assembly/Test Site
One Fabrication Site
Available in Military (–55°C/125°C)
Temperature Range(1)
VCC Isolation Feature – If Either VCC Input Is at
GND, All Are in the High-Impedance State
Fully Configurable Dual-Rail Design Allows
Each Port to Operate Over the Full 1.65-V to
5.5-V Power-Supply Range
•
•
•
Extended Product Life Cycle
Extended Product-Change Notification
Product Traceability
•
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
–
–
–
4000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
(1) Additional temperature ranges are available – contact factory
PW PACKAGE
(TOP VIEW)
VCCA
1
24 VCCB
23 VCCB
22
DIR
A1
A2
A3
A4
A5
A6
A7
A8
2
3
OE
4
21 B1
20 B2
19 B3
18 B4
5
6
7
8
17
16
15
B5
B6
B7
9
10
GND 11
GND 12
14 B8
13 GND
DESCRIPTION/ORDERING INFORMATION
This 8-bit noninverting bus transceiver uses two separate configurable power-supply rails. The SN74LVC8T245
is optimized to operate with VCCA and VCCB set at 1.65 V to 5.5 V. The A port is designed to track VCCA. VCCA
accepts any supply voltage from 1.65 V to 5.5 V. The B port is designed to track VCCB. VCCB accepts any supply
voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the
1.8-V, 2.5-V, 3.3-V, and 5.5-V voltage nodes.
ORDERING INFORMATION(1)
TA
PACKAGE(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
NH245MEP
–55°C to 125°C
TSSOP – PW
Tape and reel
SN74LVC8T245MPWREP
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
(2) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVC8T245-EP
SCES770–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
The SN74LVC8T245 is designed for asynchronous communication between two data buses. The logic levels of
the direction-control (DIR) input and the output-enable (OE) input activate either the B-port outputs or the A-port
outputs or place both output ports into the high-impedance mode. The device transmits data from the A bus to
the B bus when the B-port outputs are activated, and from the B bus to the A bus when the A-port outputs are
activated. The input circuitry on both A and B ports is always active and must have a logic HIGH or LOW level
applied to prevent excess ICC and ICCZ
.
The SN74LVC8T245 is designed so that the control pins (DIR and OE) are supplied by VCCA
.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
The VCC isolation feature ensures that if either VCC input is at GND, all outputs are in the high-impedance state.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
FUNCTION TABLE(1)
(EACH 8-BIT SECTION)
CONTROL INPUTS
OUTPUT CIRCUITS
OPERATION
OE
L
DIR
L
A PORT
Enabled
Hi-Z
B PORT
Hi-Z
B data to A bus
A data to B bus
Isolation
L
H
Enabled
Hi-Z
H
X
Hi-Z
(1) Input circuits of the data I/Os are always active.
LOGIC DIAGRAM (POSITIVE LOGIC)
2
3
DIR
A1
22
21
OE
B1
To Seven Other Channels
2
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Product Folder Link(s): SN74LVC8T245-EP
SN74LVC8T245-EP
www.ti.com ........................................................................................................................................................................................... SCES770–DECEMBER 2008
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCCA
VCCB
Supply voltage range
Input voltage range(2)
–0.5
6.5
V
I/O ports (A port)
I/O ports (B port)
Control inputs
A port
–0.5
–0.5
–0.5
–0.5
–0.5
6.5
6.5
6.5
6.5
6.5
VI
V
Voltage range applied to any output
VO
VO
V
V
in the high-impedance or power-off state(2)
B port
A port
–0.5 VCCA + 0.5
Voltage range applied to any output in the high or low state(2)(3)
B port
–0.5 VCCB + 0.5
IIK
IOK
IO
Input clamp current
VI < 0
–50
–50
±50
±100
88
mA
mA
mA
mA
°C/W
°C
Output clamp current
VO < 0
Continuous output current
Continuous current through each VCCA, VCCB, and GND
Package thermal impedance(4)
Storage temperature range
θJA
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The output positive-voltage rating may be exceeded up to 6.5 V maximum if the output current rating is observed.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
Copyright © 2008, Texas Instruments Incorporated
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SCES770–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
Recommended Operating Conditions(1)(2)(3)(4)
VCCI
VCCO
MIN
1.65
MAX UNIT
VCCA
VCCB
5.5
V
Supply voltage
1.65
5.5
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.65
1.7
High-level
input voltage
VIH
Data inputs(5)
Data inputs(5)
V
2
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
VCCI × 0.7
VCCI × 0.35
0.7
0.8
Low-level
input voltage
VIL
V
V
4.5 V to 5.5 V
1.65 V to 1.95 V
VCCI × 0.3
VCCA
×
0.65
High-level
input voltage
Control inputs
(referenced to VCCA
2.3 V to 2.7 V
3 V to 3.6 V
1.7
2
VIH
(6)
)
)
4.5 V to 5.5 V
1.65 V to 1.95 V
VCCA × 0.7
VCCA
×
0.35
Low-level
input voltage
Control inputs
(referenced to VCCA
2.3 V to 2.7 V
3 V to 3.6 V
0.7
VIL
V
(6)
0.8
4.5 V to 5.5 V
VCCA × 0.3
VI
Input voltage
Control inputs
Active state
3-State
0
0
0
5.5
VCCO
5.5
–4
V
V
V
Input/output
voltage
VI/O
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
–8
IOH
High-level output current
mA
mA
–24
–32
4
4.5 V to 5.5 V
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
8
IOL
Low-level output current
Input transition
24
4.5 V to 5.5 V
32
1.65 V to 1.95 V
2.3 V to 2.7 V
3 V to 3.6 V
20
20
Δt/Δv
Data inputs
ns/V
°C
rise or fall rate
10
4.5 V to 5.5 V
5
TA
Operating free-air temperature
–55
125
(1) VCCI is the VCC associated with the data input port.
(2) VCCO is the VCC associated with the output port.
(3) All unused or driven (floating) data inputs (I/Os) of the device must be held at logic HIGH or LOW (preferably VCCI or GND) to ensure
proper device operation and minimize power. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature
number SCBA004.
(4) All unused control inputs must be held at VCCA or GND to ensure proper device operation and minimize power comsumption.
(5) For VCCI values not specified in the data sheet, VIH min = VCCI × 0.7 V, VIL max = VCCI × 0.3 V.
(6) For VCCA values not specified in the data sheet, VIH min = VCCA × 0.7 V, VIL max = VCCA × 0.3 V.
4
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Product Folder Link(s): SN74LVC8T245-EP
SN74LVC8T245-EP
www.ti.com ........................................................................................................................................................................................... SCES770–DECEMBER 2008
Electrical Characteristics(1)(2)
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
IOH = –100 µA,
VCCA
VCCB
MIN TYP MAX
MIN MAX
VCCO – 0.1
UNIT
VI = VIH
VI = VIH
VI = VIH
VI = VIH
VI = VIH
VI = VIL
VI = VIL
VI = VIL
VI = VIL
VI = VIL
1.65 V to 4.5 V 1.65 V to 4.5 V
IOH = –4 mA,
IOH = –8 mA,
IOH = –24 mA,
IOH = –32 mA,
IOL = 100 µA,
IOL = 4 mA,
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
1.2
1.9
2.4
3.8
VOH
V
4.5 V
4.5 V
1.65 V to 4.5 V 1.65 V to 4.5 V
0.1
0.45
0.3
1.65 V
2.3 V
3 V
1.65 V
2.3 V
3 V
VOL
IOL = 8 mA,
V
IOL = 24 mA,
IOL = 32 mA,
VI = VCCA or GND
0.55
0.55
±2
4.5 V
4.5 V
II
DIR
1.65 V to 5.5 V 1.65 V to 5.5 V
±1
±1
±1
µA
µA
0 V
0 to 5.5 V
0 V
±6
A or B
port
Ioff
VI or VO = 0 to 5.5 V
0 to 5.5 V
±6
A or B
port
VO = VCCO or GND,
OE = VIH
IOZ
1.65 V to 5.5 V 1.65 V to 5.5 V
1.65 V to 5.5 V 1.65 V to 5.5 V
±1
±2
µA
µA
15
15
–2
15
–2
15
25
ICCA
VI = VCCI or GND, IO = 0
5 V
0 V
0 V
5 V
1.65 V to 5.5 V 1.65 V to 5.5 V
ICCB
VI = VCCI or GND, IO = 0
VI = VCCI or GND, IO = 0
5 V
0 V
0 V
5 V
µA
µA
ICCA + ICCB
A port
1.65 V to 5.5 V 1.65 V to 5.5 V
One A port at VCCA – 0.6 V,
DIR at VCCA, B port = open
50
ΔICCA
3 V to 5.5 V
3 V to 5.5 V
µA
DIR at VCCA – 0.6 V,
B port = open,
DIR
50
A port at VCCA or GND
One B port at VCCB – 0.6 V,
DIR at GND, A port = open
ΔICCB B port
3 V to 5.5 V
3.3 V
3 V to 5.5 V
3.3 V
50
5
µA
pF
pF
Control
inputs
Ci
VI = VCCA or GND
4
A or B
port
Cio
VO = VCCA/B or GND
3.3 V
3.3 V
8.5
10
(1) VCCO is the VCC associated with the output port.
(2) VCCI is the VCC associated with the input port.
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SCES770–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V VCCB = 3.3 V VCCB = 5 V
± 0.2 V ± 0.3 V ± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN MAX MIN MAX MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.7 25.9
1.3
0.8
1.5
1.9
0.4
1.5
13.2
27.6
33.4
17.1
27.8
20
1
0.7
1.5
1.7
0.4
1.2
11.4
27.4
33.3
16
0.8 11.1
0.7 27.4
1.4 33.2
1.3 14.3
0.4 27.7
0.9 14.8
ns
ns
ns
ns
ns
ns
B
0.9 28.8
1.5 33.6
2.4 36.2
OE
OE
OE
OE
0.4
1.8
28
40
27.7
16.6
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V VCCB = 5 V
± 0.3 V ± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN
MAX MIN
MAX MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5 25.4
1.2
13
13.1
13
0.8
1
10.2
12.9
13
0.6
8.8
ns
ns
ns
ns
ns
ns
B
1.2 13.3
1
1.4
1.8
1
0.9 12.8
OE
OE
OE
OE
1.4
13
1.4
1.7
1
1.4
13
2.3 33.6
15
14.3
17.2
14.1
0.9 10.9
1
17.2
17.3
18.1
1
1
17.3
11.2
1.7 32.2
1.5
1.2
6
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Product Folder Link(s): SN74LVC8T245-EP
SN74LVC8T245-EP
www.ti.com ........................................................................................................................................................................................... SCES770–DECEMBER 2008
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) (see Figure 1)
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V VCCB = 3.3 V VCCB = 5 V
± 0.2 V ± 0.3 V ± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
MIN MAX MIN MAX MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5 25.2
1.1
0.8
1.6
1.7
0.8
1.4
12.8
10.2
12.2
14.3
13.6
18.4
0.8
0.7
1.6
1.5
0.8
1.1
10.3
10.1
12.2
12.6
13.2
12.9
0.5 10.4
ns
ns
ns
ns
ns
ns
B
0.8 11.2
1.6 12.2
0.6
10
OE
OE
OE
OE
1.6 12.2
0.8 10.3
0.8 13.6
0.9 10.9
2.1
33
0.8 14.1
1.8 31.7
Switching Characteristics
over recommended operating free-air temperature range, VCCA = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1)
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
VCC = 5 V
± 0.5 V
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX MIN
MAX MIN
MAX MIN MAX
tPLH
tPHL
tPLH
tPHL
tPHZ
tPLZ
tPHZ
tPLZ
tPZH
tPZL
tPZH
tPZL
A
B
A
A
B
A
B
1.5 25.4
1
0.4
0.3
1.6
0.7
1.3
12.8
8.8
0.7
0.3
0.3
1.4
0.7
1
10
8.5
0.4
0.3
0.3
0.7
8.2
8.3
9.4
9.7
ns
ns
ns
ns
ns
ns
B
0.7
0.3
2
11
9.4
OE
OE
OE
OE
9.4
9.4
32.7
13.7
10.9
18.4
12
0.7 10.9
1.5 31.6
10.9
13.7
0.7 10.9
0.9 10.7
Operating Characteristics
TA = 25°C
VCCA
VCCB = 1.8 V
=
VCCA
VCCB = 2.5 V
=
VCCA
VCCB = 3.3 V
=
VCCA =
VCCB = 5 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
2
TYP
2
TYP
2
TYP
3
A-port input, B-port output
(1)
CpdA
CL = 0,
f = 10 MHz,
tr = tf = 1 ns
B-port input, A-port output
12
13
2
13
13
2
13
14
2
16
16
3
pF
A-port input, B-port output
(1)
CpdB
B-port input, A-port output
(1) Power dissipation capacitance per transceiver
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SN74LVC8T245-EP
SCES770–DECEMBER 2008........................................................................................................................................................................................... www.ti.com
PARAMETER MEASUREMENT INFORMATION
2 × V
CCO
TEST
S1
S1
R
L
Open
GND
t
Open
pd
From Output
Under Test
t
t
/t
/t
2 × V
CCO
GND
PLZ PZL
PHZ PZH
C
L
R
L
(see Note A)
t
w
LOAD CIRCUIT
V
CCI
V
CCI
/2
V
CCI
/2
Input
C
L
V
TP
R
L
V
CCO
0 V
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
2 kΩ
2 kΩ
2 kΩ
2 kΩ
0.15 V
0.15 V
0.3 V
15 pF
15 pF
15 pF
15 pF
VOLTAGE WAVEFORMS
PULSE DURATION
0.3 V
V
CCA
Output
Control
(low-level
enabling)
V /2
CCA
V
CCA
/2
t
0 V
t
PZL
PLZ
V
V
CCO
Output
Waveform 1
V
CCI
V
/2
/2
CCO
Input
V
CCI
/2
V
CCI
/2
V
+ V
OL
TP
S1 at 2 × V
CCO
OL
0 V
(see Note B)
t
t
PZH
PHZ
t
t
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
OH
V
OH
− V
TP
V
CCO
Output
V /2
CCO
V
CCO
/2
(see Note B)
0 V
V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, Z = 50 Ω, dv/dt ≥ 1 V/ns.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
H.
I.
t
t
t
V
V
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
pd
PHL
is the V associated with the input port.
CC
CCI
is the V associated with the output port.
CCO
CC
J. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
8
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PACKAGE OPTION ADDENDUM
www.ti.com
8-Dec-2008
PACKAGING INFORMATION
Orderable Device
SN74LVC8T245MPWREP
V62/09615-01XE
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
PW
24
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVC8T245-EP :
Catalog: SN74LVC8T245
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Dec-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
SN74LVC8T245MPWREP TSSOP
PW
24
2000
330.0
16.4
6.95
8.3
1.6
8.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Dec-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
TSSOP PW 24
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
SN74LVC8T245MPWREP
2000
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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