SN74LVCH244A-Q1 [TI]
OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS; 八路缓冲器/驱动器，具有三态输出
| 型号： | SN74LVCH244A-Q1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS |
| 文件： | 总9页 (文件大小：168K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN74LVCH244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES492A–SEPTEMBER 2003–REVISED DECEMBER 2005
FEATURES
DW OR PW PACKAGE
(TOP VIEW)
(1)
•
•
•
Qualification in Accordance With AEC-Q100
Qualified for Automotive Applications
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
1OE
1A1
2Y4
1A2
2Y3
1A3
2Y2
1A4
2Y1
GND
V
CC
Customer-Specific Configuration Control Can
Be Supported Along With Major-Change
Approval
2OE
1Y1
2A4
1Y2
2A3
1Y3
2A2
1Y4
2A1
•
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
•
•
•
•
Operates From 2 V to 3.6 V
Inputs Accept Voltages to 5.5 V
Max tpd of 6.5 ns at 3.3 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
•
•
Typical VOHV (Output VOH Undershoot)
>2 V at VCC = 3.3 V, TA = 25°C
Supports Mixed-Mode Signal Operation on All
Ports (5-V Input/Output Voltage With
3.3-V VCC
)
•
•
Ioff Supports Partial-Power-Down Mode
Operation
Bus Hold on Data Inputs Eliminates the Need
for External Pullup/Pulldown Resistors
(1) Contact factory for details. Q100 qualification data available
on request.
DESCRIPTION/ORDERING INFORMATION
The SN74LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCC operation.
This device is organized as two 4-bit line drivers with separate output-enable (OE) inputs. When OE is low, this
devices passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance
state.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of this device as a translator in
a mixed 3.3-V/5-V system environment.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
ORDERING INFORMATION
TA
PACKAGE(1)
Reel of 2000
Reel of 2000
ORDERABLE PART NUMBER
SN74LVCH244AQDWRQ1
SN74LVCH244AQPWRQ1
TOP-SIDE MARKING
LH244AQ
LH244AQ
SOIC – DW
–40°C to 125°C
TSSOP – PW
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2003–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
SN74LVCH244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES492A–SEPTEMBER 2003–REVISED DECEMBER 2005
FUNCTION TABLE
(EACH BUFFER)
INPUTS
OE
OUTPUT
Y
A
H
L
L
L
H
L
H
X
Z
LOGIC DIAGRAM (POSITIVE LOGIC)
1
2
19
1OE
1A1
2OE
18
16
14
12
11
13
15
17
9
7
5
3
1Y1
1Y2
1Y3
1Y4
2A1
2A2
2A3
2A4
2Y1
2Y2
2Y3
2Y4
4
6
8
1A2
1A3
1A4
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
–0.5
–0.5
MAX
6.5
UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Voltage range applied to any output in the high-impedance or power-off state(2)
Voltage range applied to any output in the high or low state(2)(3)
V
6.5
6.5
V
VO
VO
IIK
V
VCC + 0.5
–50
V
Input clamp current
VI < 0
mA
mA
mA
mA
IOK
IO
Output clamp current
VO < 0
–50
Continuous output current
Continuous current through VCC or GND
±50
±100
58
DW package
PW package
θJA
Package thermal impedance(4)
Storage temperature range
°C/W
°C
83
Tstg
–65
150
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The value of VCC is provided in the recommended operating conditions table.
(4) The package thermal impedance is calculated in accordance with JESD 51-7.
2
SN74LVCH244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES492A–SEPTEMBER 2003–REVISED DECEMBER 2005
Recommended Operating Conditions(1)
MIN
2
MAX UNIT
Operating
3.6
V
VCC
Supply voltage
Data retention only
VCC = 2.7 V to 3.6 V
VCC = 2.7 V to 3.6 V
1.5
2
VIH
VIL
VI
High-level input voltage
Low-level input voltage
Input voltage
V
0.8
5.5
VCC
5.5
–12
–24
12
V
V
0
0
0
High or low state
3-state
VO
IOH
IOL
Output voltage
V
VCC = 2.7 V
VCC = 3 V
High-level output current
Low-level output current
mA
mA
VCC = 2.7 V
VCC = 3 V
24
∆t/∆v
Input transition rise or fall rate
Operating free-air temperature
10
ns/V
TA
–40
125
°C
(1) All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
2.7 V to 3.6 V
2.7 V
MIN TYP(1)
VCC – 0.2
MAX UNIT
IOH = –100 µA
2.2
2.4
2.2
VOH
IOH = –12 mA
V
3 V
IOH = –24 mA
IOL = 100 µA
IOL = 12 mA
3 V
2.7 V to 3.6 V
2.7 V
0.2
VOL
0.4
0.55
±5
V
IOL = 24 mA
3 V
II
VI = 0 to 5.5 V
VI = 0.8 V
3.6 V
µA
µA
75
3 V
II(hold)
VI = 2 V
–75
VI = 0 to 3.6 V(2)
VO = 0 to 5.5 V
VI = VCC or GND
3.6 V ≤ VI ≤ 5.5 V(3)
3..6 V
3.6 V
±500
±15
10
IOZ
ICC
µA
µA
IO = 0
3.6 V
10
∆ICC
Ci
One input at VCC – 0.6 V, Other inputs at VCC or GND
VI = VCC or GND
2.7 V to 3.6 V
3.3 V
500
12
µA
pF
pF
4
Co
VO = VCC or GND
3.3 V
5.5
12
(1) All typical values are at VCC = 3.3 V, TA = 25°C.
(2) This is the bus-hold maximum dynamic current required to switch the input from one state to another.
(3) This applies in the disabled state only.
3
SN74LVCH244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES492A–SEPTEMBER 2003–REVISED DECEMBER 2005
Switching Characteristics
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 1)
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
MIN MAX
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MIN MAX
tpd
ten
tdis
A
Y
Y
Y
7.5
9
1
1
1
6.5
8
ns
ns
ns
OE
OE
8
7
Operating Characteristics
TA = 25°C
VCC = 2.5 V
VCC = 3.3 V
TEST
CONDITIONS
PARAMETER
UNIT
TYP
TYP
47
2
(1)
Outputs enabled
Outputs disabled
Cpd
Power dissipation capacitance per buffer/driver
f = 10 MHz
pF
(1)
(1) This information was not available at the time of publication.
4
SN74LVCH244A-Q1
OCTAL BUFFER/DRIVER
WITH 3-STATE OUTPUTS
www.ti.com
SCES492A–SEPTEMBER 2003–REVISED DECEMBER 2005
PARAMETER MEASUREMENT INFORMATION
V
LOAD
S1
Open
R
L
From Output
Under Test
TEST
/t
S1
GND
t
t
Open
PLH PHL
C
L
t
/t
V
R
L
PLZ PZL
LOAD
GND
(see Note A)
/t
PHZ PZH
LOAD CIRCUIT
INPUTS
V
CC
V
M
V
LOAD
C
L
R
L
V
∆
V
I
t /t
r f
2.7 V
2.7 V
2.7 V
≤2.5 ns
≤2.5 ns
1.5 V
1.5 V
6 V
6 V
50 pF
50 pF
500 Ω
500 Ω
0.3 V
0.3 V
3.3 V ± 0.3 V
V
I
Timing Input
Data Input
V
M
0 V
t
w
t
t
h
su
V
I
V
I
Input
V
M
V
M
V
M
V
M
0 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
V
I
V
I
Output
Control
V
M
V
M
Input
V
M
V
M
0 V
0 V
t
t
t
t
t
PHL
PZL
PLZ
PLH
Output
Waveform 1
V
V
OH
V
V
/2
LOAD
V
V
V
M
M
Output
V
V
M
S1 at V
LOAD
V
OL
+ V
∆
OL
(see Note B)
OL
t
PHL
PLH
t
t
PHZ
PZH
Output
Waveform 2
S1 at GND
V
V
OH
V
OH
V
– V
∆
V
M
OH
M
Output
M
≈0 V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω.
O
D. The outputs are measured one at a time, with one transition per measurement.
E.
F.
G.
t
t
t
and t
and t
and t
are the same as t
.
dis
.
PLZ
PZL
PLH
PHZ
are the same as t
PZH
en
are the same as t .
PHL pd
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74LVCH244AQDWRQ1 OBSOLETE
SOIC
DW
20
20
TBD
TBD
Call TI
Call TI
Call TI
Call TI
SN74LVCH244AQPWRQ1 OBSOLETE TSSOP
PW
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVCH244A-Q1 :
Catalog: SN74LVCH244A
Military: SN54LVCH244A
•
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Military - QML certified for Military and Defense Applications
•
•
Addendum-Page 1
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