SN74LVT125_06 [TI]
3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS; 3.3 -V ABT翻两番总线缓冲器,三态输出![SN74LVT125_06](http://pdffile.icpdf.com/pdf1/p00120/img/icpdf/SN74LVT125_659036_icpdf.jpg)
型号: | SN74LVT125_06 |
厂家: | ![]() |
描述: | 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS |
文件: | 总12页 (文件大小:277K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢈ ꢉ
ꢊ ꢋꢊ ꢌꢅ ꢍꢎꢆ ꢏ ꢐꢍꢑꢒ ꢐꢓꢄ ꢔ ꢎꢐꢀ ꢎ ꢐꢕ ꢕꢔ ꢒ
ꢖ ꢗꢆ ꢘ ꢊ ꢌꢀꢆꢍꢆ ꢔ ꢙ ꢐꢆ ꢓ ꢐꢆꢀ
SCBS133F − MAY 1992 − REVISED OCTOBER 2003
D, DB, NS, OR PW PACKAGE
(TOP VIEW)
D
Supports Mixed-Mode Signal Operation
(5-V Input and Output Voltages With
3.3-V V
)
CC
1
2
3
4
5
6
7
14
13
12
11
10
9
1OE
1A
1Y
2OE
2A
2Y
V
CC
4OE
D
D
D
D
D
D
Supports Unregulated Battery Operation
Down to 2.7 V
4A
4Y
3OE
3A
3Y
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
A
I
Supports Partial-Power-Down Mode
off
8
Operation
GND
Bus-Hold Data Inputs Eliminate the Need
for External Pullup Resistors
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
description/ordering information
This bus buffer is designed specifically for low-voltage (3.3-V) V
a TTL interface to a 5-V system environment.
operation, but with the capability to provide
CC
The SN74LVT125 features independent line drivers with 3-state outputs. Each output is in the high-impedance
state when the associated output-enable (OE) input is high.
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
This device is fully specified for partial-power-down applications using I . The I circuitry disables the outputs,
off
off
preventing damaging current backflow through the device when it is powered down.
To ensure the high-impedance state during power up or power down, OE should be tied to V
resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup
CC
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
Tube
SN74LVT125D
SOIC − D
LVT125
Tape and reel
Tape and reel
Tape and reel
Tube
SN74LVT125DR
SN74LVT125NSR
SN74LVT125DBR
SN74LVT125PW
SN74LVT125PWR
SOP − NS
LVT125
LX125
−40°C to 85°C
SSOP − DB
TSSOP − PW
LX125
Tape and reel
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢉ
ꢊꢋ ꢊꢌꢅ ꢍ ꢎꢆ ꢏꢐ ꢍ ꢑꢒ ꢐꢓ ꢄꢔ ꢎꢐ ꢀ ꢎꢐ ꢕꢕ ꢔꢒ
ꢖꢗ ꢆ ꢘ ꢊ ꢌꢀꢆꢍꢆ ꢔ ꢙꢐꢆ ꢓ ꢐꢆꢀ
SCBS133F − MAY 1992 − REVISED OCTOBER 2003
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
logic diagram (positive logic)
1
1OE
1A
2
4
5
3
6
1Y
2Y
2OE
2A
10
9
3OE
3A
8
3Y
4Y
13
12
4OE
4A
11
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high state or power-off state, V (see Note 1) . . . . −0.5 V to 7 V
O
Current into any output in the low state, I
Current into any output in the high state, I (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
O
O
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
OK
O
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V > V
.
CC
O
3. The package thermal impedance is calculated in accordance with JESD 51-7.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢖ ꢗꢆ ꢘ ꢊ ꢌꢀꢆꢍꢆ ꢔ ꢙ ꢐꢆ ꢓꢐ ꢆꢀ
ꢎ
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SCBS133F − MAY 1992 − REVISED OCTOBER 2003
recommended operating conditions (see Note 4)
MIN
2.7
2
MAX
UNIT
V
V
V
V
V
Supply voltage
3.6
CC
High-level input voltage
Low-level input voltage
Input voltage
V
IH
0.8
5.5
−32
64
V
IL
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
mA
mA
ns/V
°C
OH
OL
∆t/∆v
Outputs enabled
10
T
A
−40
85
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
†
TYP
PARAMETER
TEST CONDITIONS
I = −18 mA
MIN
MAX
UNIT
V
IK
V
V
V
V
= 2.7 V,
−1.2
V
CC
CC
CC
CC
I
‡
= MIN to MAX ,
= 2.7 V,
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 64 mA
V
−0.2
OH
OH
OH
OL
OL
OL
OL
OL
CC
2.4
2
V
V
V
OH
= 3 V
0.2
0.5
0.4
0.5
0.55
10
V
CC
= 2.7 V
V
OL
V
V
= 3 V
CC
‡
= 0 or MAX ,
V = 5.5 V
I
CC
V = V
I
or GND
Control inputs
Data inputs
1
CC
CC
I
I
µA
V = V
I
1
V
CC
= 3.6 V
V = 0
I
−5
I
I
V
V
= 0,
V or V = 0 to 4.5 V
100
µA
µA
off
CC
I
O
V = 0.8 V
I
75
= 3 V
Data inputs
I(hold)
CC
V = 2 V
I
−75
I
I
V
V
= 3.6 V,
= 3.6 V,
V
= 3 V
5
−5
µA
µA
OZH
CC
O
O
V
= 0.5 V
OZL
CC
Outputs high
Outputs low
0.12
4.5
0.19
7
V
= 3.6 V,
I
O
= 0,
CC
I
mA
CC
V = V
I
or GND
CC
Outputs disabled
0.12
0.19
V
CC
= 3 V to 3.6 V,
One input at V
CC
− 0.6 V, Other inputs at V
or GND
CC
§
0.2
mA
∆I
CC
C
C
V = 3 V or 0
4
8
pF
pF
i
I
V
O
= 3 V or 0
o
†
‡
§
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V
or GND.
CC
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄꢅꢆ ꢇ ꢈ ꢉ
ꢊꢋ ꢊꢌꢅ ꢍ ꢎꢆ ꢏꢐ ꢍ ꢑꢒ ꢐꢓ ꢄꢔ ꢎꢐ ꢀ ꢎꢐ ꢕꢕ ꢔꢒ
ꢖꢗ ꢆ ꢘ ꢊ ꢌꢀꢆꢍꢆ ꢔ ꢙꢐꢆ ꢓ ꢐꢆꢀ
SCBS133F − MAY 1992 − REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
V
= 3.3 V
CC
0.3 V
V
= 2.7 V
CC
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
†
MIN TYP
MAX
4
MIN
MAX
4.5
4.9
6
t
t
t
t
t
t
1
1
2.7
2.9
3.4
3.4
3.7
2.6
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
3.9
4.7
4.7
5.1
4.5
1
OE
OE
1.1
1.8
1.3
6.5
5.7
4
†
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢅ ꢆꢇꢈ ꢉ
ꢊ ꢋꢊ ꢌꢅ ꢍꢎꢆ ꢏ ꢐꢍꢑꢒ ꢐꢓꢄ ꢔ ꢎꢐꢀ ꢎ ꢐꢕ ꢕꢔ ꢒ
ꢖ ꢗꢆ ꢘ ꢊ ꢌꢀꢆꢍꢆ ꢔ ꢙ ꢐꢆ ꢓꢐ ꢆꢀ
SCBS133F − MAY 1992 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
6 V
TEST
S1
S1
t
/t
PLH PHL
Open
6 V
500 Ω
Open
GND
From Output
Under Test
t
/t
PLZ PZL
t
/t
PHZ PZH
GND
C
= 50 pF
L
500 Ω
(see Note A)
2.7 V
0 V
LOAD CIRCUIT FOR OUTPUTS
1.5 V
Timing Input
Data Input
t
w
t
t
h
su
2.7 V
0 V
2.7 V
0 V
Input
1.5 V
1.5 V
1.5 V
1.5 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
0 V
Output
Control
1.5 V
1.5 V
t
Input
1.5 V
1.5 V
t
PZL
t
t
PHL
PLH
PLZ
1.5 V
Output
Waveform 1
S1 at 6 V
V
V
3 V
OH
1.5 V
1.5 V
1.5 V
Output
V
V
+ 0.3 V
− 0.3 V
OL
V
OL
OL
(see Note B)
t
PHZ
t
PLH
t
t
PZH
PHL
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
OH
1.5 V
1.5 V
Output
(see Note B)
≈0 V
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SN74LVT125D
NRND
SOIC
D
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVT125DBLE
SN74LVT125DBR
OBSOLETE
NRND
SSOP
SSOP
DB
DB
14
14
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVT125DBRG4
SN74LVT125DG4
SN74LVT125DR
NRND
NRND
NRND
NRND
NRND
NRND
NRND
SSOP
SOIC
SOIC
SOIC
SO
DB
D
14
14
14
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVT125DRG4
SN74LVT125NSR
SN74LVT125PW
SN74LVT125PWG4
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
NS
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVT125PWLE
SN74LVT125PWR
OBSOLETE TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
NRND
TSSOP
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVT125PWRG4
NRND
TSSOP
PW
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2006
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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