SN74LVTH125DBRG4 [TI]
3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS; 3.3 -V ABT翻两番总线缓冲器,三态输出型号: | SN74LVTH125DBRG4 |
厂家: | TEXAS INSTRUMENTS |
描述: | 3.3-V ABT QUADRUPLE BUS BUFFERS WITH 3-STATE OUTPUTS |
文件: | 总17页 (文件大小:549K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
D
D
D
D
Support Mixed-Mode Signal Operation (5-V
Input and Output Voltages With 3.3-V V
D
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
)
CC
Support Unregulated Battery Operation
Down to 2.7 V
D
D
Latch-Up Performance Exceeds 500 mA Per
JESD 17
Typical V
<0.8 V at V
(Output Ground Bounce)
OLP
CC
= 3.3 V, T = 25°C
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
A
I
and Power-Up 3-State Support Hot
off
Insertion
SN74LVTH125 . . . RGY PACKAGE
(TOP VIEW)
SN54LVTH125 . . . FK PACKAGE
(TOP VIEW)
SN54LVTH125 . . . J OR W PACKAGE
SN74LVTH125 . . . D, DB, DGV, NS,
OR PW PACKAGE
(TOP VIEW)
1
14
1
2
3
4
5
6
7
14
13
12
11
10
9
1OE
1A
1Y
2OE
2A
2Y
V
CC
4OE
3
2
1
20 19
18 4A
1A
1Y
13 4OE
12 4A
1Y
NC
2
3
4
5
6
4
5
6
7
8
17
16
15
14
NC
4Y
4A
4Y
3OE
3A
3Y
11
10
9
2OE
2A
4Y
2OE
NC
3OE
3A
NC
3OE
2Y
2A
9 10 11 12 13
7
8
8
GND
NC − No internal connection
description/ordering information
These bus buffers are designed specifically for low-voltage (3.3-V) V
provide a TTL interface to a 5-V system environment.
operation, but with the capability to
CC
The ’LVTH125 devices feature independent line drivers with 3-state outputs. Each output is in the
high-impedance state when the associated output-enable (OE) input is high.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
QFN − RGY
SOIC − D
Tape and reel
Tube
SN74LVTH125RGYR
SN74LVTH125D
LXH125
LVTH125
Tape and reel
Tape and reel
Tape and reel
Tube
SN74LVTH125DR
SN74LVTH125NSR
SN74LVTH125DBR
SN74LVTH125PW
SN74LVTH125PWR
SN74LVTH125DGVR
SNJ54LVTH125J
SOP − NS
LVTH125
LXH125
−40°C to 85°C
SSOP − DB
TSSOP − PW
LXH125
Tape and reel
Tape and reel
Tube
TVSOP − DGV
CDIP − J
LXH125
SNJ54LVTH125J
SNJ54LVTH125W
SNJ54LVTH125FK
CFP − W
Tube
SNJ54LVTH125W
SNJ54LVTH125FK
−55°C to 125°C
LCCC − FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
description/ordering information (continued)
Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors
with the bus-hold circuitry is not recommended.
When V
is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
CC
However, to ensure the high-impedance state above 1.5 V, OE should be tied to V
the minimum value of the resistor is determined by the current-sinking capability of the driver.
through a pullup resistor;
CC
These devices are fully specified for hot-insertion applications using I and power-up 3-state. The I circuitry
off
off
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
(each buffer)
INPUTS
OUTPUT
Y
OE
A
H
L
L
L
H
L
H
X
Z
logic diagram (positive logic)
1
10
1OE
3OE
3A
2
3
9
8
1A
1Y
2Y
3Y
4Y
4
13
12
2OE
4OE
4A
5
6
11
2A
Pin numbers shown are for the D, DB, DGV, J, NS, PW, RGY, and W packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Voltage range applied to any output in the high-impedance
or power-off state, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
O
Voltage range applied to any output in the high state, V (see Note 1) . . . . . . . . . . . . . −0.5 V to V
+ 0.5 V
O
CC
Current into any output in the low state, I : SN54LVTH125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
O
SN74LVTH125 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Current into any output in the high state, I (see Note 2): SN54LVTH125 . . . . . . . . . . . . . . . . . . . . . . . 48 mA
O
SN74LVTH125 . . . . . . . . . . . . . . . . . . . . . . . 64 mA
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
IK
OK
I
Output clamp current, I
(V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
O
Package thermal impedance, θ (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
(see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and V > V
.
CC
O
3. The package thermal impedance is calculated in accordance with JESD 51-7.
4. The package thermal impedance is calculated in accordance with JESD 51-5.
recommended operating conditions (see Note 5)
SN54LVTH125 SN74LVTH125
UNIT
MIN
2.7
2
MAX
MIN
2.7
2
MAX
V
V
V
V
Supply voltage
3.6
3.6
V
V
CC
High-level input voltage
Low-level input voltage
Input voltage
IH
0.8
5.5
−24
48
0.8
5.5
−32
64
V
IL
V
I
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Power-up ramp rate
mA
mA
ns/V
µs/V
°C
OH
OL
∆t/∆v
∆t/∆V
Outputs enabled
10
10
200
−55
200
−40
CC
T
A
Operating free-air temperature
125
85
NOTE 5: All unused control inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
CC
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3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54LVTH125
SN74LVTH125
PARAMETER
TEST CONDITIONS
UNIT
†
TYP
†
TYP
MIN
MAX
MIN
MAX
V
V
V
V
V
= 2.7 V,
I = −18 mA
−1.2
−1.2
V
IK
CC
CC
CC
I
= 2.7 V to 3.6 V,
= 2.7 V,
I
I
I
I
I
I
I
I
I
I
= −100 µA
= −8 mA
= −24 mA
= −32 mA
= 100 µA
= 24 mA
= 16 mA
= 32 mA
= 48 mA
= 64 mA
V
−0.2
V
CC
−0.2
OH
OH
OH
OH
OL
OL
OL
OL
OL
OL
CC
2.4
2
2.4
2
V
V
OH
V
= 3 V
CC
CC
0.2
0.5
0.2
0.5
0.4
0.5
V
= 2.7 V
0.4
V
OL
0.5
V
CC
= 3 V
0.55
0.55
10
V
V
= 0 or 3.6 V,
= 3.6 V,
V = 5.5 V
I
10
1
CC
Control
inputs
V = V
or GND
1
CC
I
CC
I
I
µA
V = V
1
1
−5
I
CC
Data inputs
V
V
= 3.6 V
= 0,
CC
V = 0
I
−5
I
I
V or V = 0 to 4.5 V
I
100
µA
µA
off
CC
O
V = 0.8 V
I
75
75
V
CC
= 3 V
V = 2 V
I
−75
−75
Data inputs
I(hold)
‡
V
V
V
V
= 3.6 V ,
V = 0 to 3.6 V
500
5
CC
CC
CC
CC
I
I
I
= 3.6 V,
= 3.6 V,
V
= 3 V
5
µA
µA
OZH
O
O
V
= 0.5 V
−5
−5
OZL
= 0 to 1.5 V, V = 0.5 V to 3 V,
OE = don’t care
O
∗
50
50
50
50
µA
µA
I
OZPU
OZPD
V
= 1.5 V to 0, V = 0.5 V to 3 V,
CC
OE = don’t care
O
∗
I
Outputs high
Outputs low
0.12
4.5
0.19
7
0.12
4.5
0.19
7
V
I
= 3.6 V,
CC
= 0,
I
mA
mA
O
CC
V = V
I
or GND
CC
Outputs disabled
0.12
0.19
0.12
0.19
V
= 3 V to 3.6 V, One input at V − 0.6 V,
CC
CC
Other inputs at V
§
0.3
0.2
∆I
CC
or GND
CC
C
C
V = 3 V or 0
4
4
pF
pF
i
I
V
O
= 3 V or 0
6.5
6.5
o
∗
†
‡
§
On products compliant to MIL-PRF-38535, this parameter is not production tested.
All typical values are at V = 3.3 V, T = 25°C.
CC
This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V or GND.
A
CC
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ꢢ
ꢡ
ꢟ ꢤ ꢞ ꢝ ꢰ ꢥ ꢪꢜ ꢦ ꢞ ꢤ ꢠꢨ ꢟꢤ ꢱ ꢤ ꢬ ꢠꢪ ꢣꢤ ꢥ ꢛꢍ ꢧ ꢜꢦ ꢩꢦ ꢡꢛ ꢤꢩ ꢝꢞ ꢛꢝ ꢡ ꢟꢦ ꢛꢦ ꢦꢥ ꢟ ꢠꢛ ꢜꢤꢩ
ꢛ
ꢞ
ꢝ
ꢥ
ꢛ
ꢜ
ꢤ
ꢨ
ꢠ
ꢩ
ꢣ
ꢦ
ꢛ
ꢝ
ꢱ
ꢤ
ꢠ
ꢩ
ꢞ
ꢪ
ꢤ
ꢡ
ꢝ
ꢨ
ꢝ
ꢡ
ꢦ
ꢛ
ꢝ
ꢠ
ꢥ
ꢞ
ꢦ
ꢩ
ꢤ
ꢟ
ꢤ
ꢞ
ꢝ
ꢰ
ꢥ
ꢰ
ꢠ
ꢦ
ꢬ
ꢞ
ꢍ
ꢆ
ꢤ
ꢭ
ꢦ
ꢞ
ꢙ
ꢥ
ꢞ
ꢛ
ꢩ
ꢢ
ꢣ
ꢤ
ꢥ
ꢡ ꢜ ꢦ ꢥ ꢰꢤ ꢠꢩ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢ ꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢪꢩ ꢠ ꢟꢢꢡ ꢛꢞ ꢮ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢍ
ꢛ
ꢞ
ꢩ
ꢤ
ꢞ
ꢤ
ꢩ
ꢱ
ꢤ
ꢞ
ꢛ
ꢜ
ꢤ
ꢩ
ꢝ
ꢰ
ꢜ
ꢛ
ꢛ
ꢠ
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢂ
ꢊ
ꢀ
ꢁ
ꢋ
ꢃ
ꢌ ꢍꢌ ꢎꢅ ꢏꢐꢆ ꢑ ꢒꢏꢓꢔ ꢒꢕꢄ ꢖ ꢐꢒꢀ ꢐ ꢒꢗ ꢗꢖ ꢔ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢂ
ꢀ
ꢀ
ꢘ ꢙꢆ ꢇ ꢌ ꢎꢀꢆꢏꢆ ꢖ ꢚ ꢒꢆ ꢕ ꢒꢆ
SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
SN54LVTH125
= 3.3 V
SN74LVTH125
V
CC
V
CC
= 3.3 V
V
FROM
(INPUT)
TO
(OUTPUT)
V
= 2.7 V
= 2.7 V
PARAMETER
UNIT
CC
CC
0.3 V
0.3 V
†
MIN
MAX
4.2
4.1
4.9
4.9
5.3
4.7
MIN
MAX
4.7
5.1
5.6
5.6
5.9
4.2
MIN TYP
MAX
3.5
3.9
4
MIN
MAX
4.5
4.9
5.5
5.4
5.7
4
t
t
t
t
t
t
1
1
1
2
PLH
PHL
PZH
PZL
PHZ
PLZ
A
Y
Y
Y
ns
ns
ns
1
1
2.1
2
1
OE
OE
1.1
1.5
1.3
1.1
1.5
1.3
2.1
2.3
2.8
4
4.5
4.5
†
All typical values are at V
CC
= 3.3 V, T = 25°C.
A
ꢕ
ꢔ
ꢚ
ꢓ
ꢒ
ꢧ
ꢆ
ꢕ
ꢔ
ꢖ
ꢅ
ꢙ
ꢖ
ꢘ
ꢝ
ꢥ
ꢨ
ꢠ
ꢩ
ꢣ
ꢦ
ꢛ
ꢝ
ꢠ
ꢥ
ꢡ
ꢠ
ꢥ
ꢡ
ꢤ
ꢩ
ꢥ
ꢞ
ꢪ
ꢩ
ꢠ
ꢟ
ꢢ
ꢟꢤ ꢞ ꢝ ꢰꢥ ꢪꢜ ꢦ ꢞ ꢤ ꢠꢨ ꢟꢤ ꢱ ꢤ ꢬꢠ ꢪꢣꢤ ꢥꢛꢍ ꢧ ꢜꢦ ꢩꢦ ꢡꢛ ꢤꢩ ꢝꢞ ꢛꢝ ꢡ ꢟꢦ ꢛꢦ ꢦꢥ ꢟ ꢠꢛ ꢜꢤꢩ
ꢡ
ꢛ
ꢞ
ꢝ
ꢥ
ꢛ
ꢜ
ꢤ
ꢨ
ꢠ
ꢩ
ꢣ
ꢦ
ꢛ
ꢝ
ꢱ
ꢤ
ꢠ
ꢩ
ꢞ
ꢪ
ꢤ
ꢡ
ꢝ
ꢨ
ꢝ
ꢡ
ꢦ
ꢛ
ꢝ
ꢠ
ꢥ
ꢞ
ꢦ
ꢩ
ꢤ
ꢟ
ꢤ
ꢞ
ꢝ
ꢰ
ꢥ
ꢰ
ꢠ
ꢦ
ꢬ
ꢞ
ꢍ
ꢆ
ꢤ
ꢭ
ꢦ
ꢞ
ꢙ
ꢥ
ꢞ
ꢛ
ꢩ
ꢢ
ꢣ
ꢤ
ꢥ
ꢡ ꢜꢦ ꢥ ꢰꢤ ꢠꢩ ꢟꢝ ꢞ ꢡ ꢠꢥ ꢛꢝ ꢥꢢꢤ ꢛ ꢜꢤ ꢞ ꢤ ꢪꢩ ꢠꢟ ꢢꢡꢛ ꢞ ꢮ ꢝꢛꢜ ꢠꢢꢛ ꢥꢠꢛ ꢝꢡꢤ ꢍ
ꢛ
ꢞ
ꢩ
ꢤ
ꢞ
ꢤ
ꢩ
ꢱ
ꢤꢞ
ꢛ
ꢜ
ꢤ
ꢩ
ꢝ
ꢰ
ꢜ
ꢛ
ꢛ
ꢠ
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢌ
ꢂ
ꢃ
ꢄ
ꢏ
ꢌ
ꢅ
ꢐ
ꢎ
ꢆ
ꢆ
ꢀ
ꢇ
ꢑ
ꢆꢏ
ꢈ
ꢉ
ꢒ
ꢂ
ꢏ
ꢖ
ꢊ
ꢀ
ꢓ
ꢚ
ꢁ
ꢔ
ꢒ
ꢋ
ꢒ
ꢆ
ꢃ
ꢕ
ꢕ
ꢄ
ꢄ
ꢒ
ꢅ
ꢖ
ꢆ
ꢆ
ꢇ
ꢐ
ꢈ
ꢒ
ꢉ
ꢀ
ꢂ
ꢌ
ꢍ
ꢎ
ꢅ
ꢐ
ꢒ
ꢗ
ꢗ
ꢖꢔ
ꢀ
ꢘ
ꢙ
ꢆ
ꢇ
ꢆ
ꢀ
SCBS703I − AUGUST 1997 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
6 V
TEST
S1
Open
GND
S1
500 Ω
From Output
Under Test
t
/t
Open
6 V
PLH PHL
/t
t
PLZ PZL
/t
C
= 50 pF
L
t
GND
PHZ PZH
500 Ω
(see Note A)
2.7 V
0 V
LOAD CIRCUIT
Timing Input
Data Input
1.5 V
t
w
t
t
h
su
2.7 V
2.7 V
0 V
1.5 V
1.5 V
Input
1.5 V
1.5 V
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
2.7 V
0 V
2.7 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
Input
0 V
V
t
t
PLZ
PZL
t
t
t
PHL
PLH
Output
Waveform 1
S1 at 6 V
3 V
OH
1.5 V
1.5 V
1.5 V
t
1.5 V
Output
V
V
+ 0.3 V
OL
V
OL
(see Note B)
V
OL
t
t
PZH
PHZ
PHL
PLH
Output
Waveform 2
S1 at GND
V
OH
V
V
OH
− 0.3 V
OH
1.5 V
1.5 V
Output
≈0 V
(see Note B)
OL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. includes probe and jig capacitance.
C
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z = 50 Ω, t ≤ 2.5 ns, t ≤ 2.5 ns.
O
r
f
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
PACKAGING INFORMATION
Orderable Device
SN74LVTH125D
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVTH125DBR
SN74LVTH125DBRE4
SN74LVTH125DBRG4
SN74LVTH125DE4
SSOP
SSOP
SSOP
SOIC
DB
DB
DB
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVTH125DG4
SN74LVTH125DGVR
SN74LVTH125DGVRE4
SN74LVTH125DGVRG4
SN74LVTH125DR
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVTH125DRE4
SN74LVTH125DRG4
SN74LVTH125NSR
SN74LVTH125NSRE4
SN74LVTH125NSRG4
SN74LVTH125PW
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
NS
NS
NS
PW
PW
PW
PW
PW
PW
RGY
RGY
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
VQFN
VQFN
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74LVTH125PWE4
SN74LVTH125PWG4
SN74LVTH125PWR
SN74LVTH125PWRE4
SN74LVTH125PWRG4
SN74LVTH125RGYR
SN74LVTH125RGYRG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
21-Dec-2009
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN74LVTH125 :
Enhanced Product: SN74LVTH125-EP
•
NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74LVTH125DBR
SN74LVTH125DGVR
SN74LVTH125DR
SN74LVTH125DR
SN74LVTH125NSR
SN74LVTH125PWR
SN74LVTH125RGYR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
14
2000
2000
2500
2500
2000
2000
3000
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
12.4
16.4
16.4
16.4
12.4
12.4
8.2
6.8
6.5
6.5
8.2
6.9
3.75
6.6
4.0
2.5
1.6
2.1
2.1
2.5
1.6
1.15
12.0
8.0
16.0
12.0
16.0
16.0
16.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
9.0
8.0
SOIC
D
9.0
8.0
SO
NS
PW
RGY
10.5
5.6
12.0
8.0
TSSOP
VQFN
3.75
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Jul-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74LVTH125DBR
SN74LVTH125DGVR
SN74LVTH125DR
SN74LVTH125DR
SN74LVTH125NSR
SN74LVTH125PWR
SN74LVTH125RGYR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
14
2000
2000
2500
2500
2000
2000
3000
346.0
346.0
333.2
346.0
346.0
346.0
346.0
346.0
346.0
345.9
346.0
346.0
346.0
346.0
33.0
29.0
28.6
33.0
33.0
29.0
29.0
SOIC
D
SO
NS
PW
RGY
TSSOP
VQFN
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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be expected to cause severe personal injury or death, unless officers of the parties have executed an agreement specifically governing
such use. Buyers represent that they have all necessary expertise in the safety and regulatory ramifications of their applications, and
acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products
and any use of TI products in such safety-critical applications, notwithstanding any applications-related information or support that may be
provided by TI. Further, Buyers must fully indemnify TI and its representatives against any damages arising out of the use of TI products in
such safety-critical applications.
TI products are neither designed nor intended for use in military/aerospace applications or environments unless the TI products are
specifically designated by TI as military-grade or "enhanced plastic." Only products designated by TI as military-grade meet military
specifications. Buyers acknowledge and agree that any such use of TI products which TI has not designated as military-grade is solely at
the Buyer's risk, and that they are solely responsible for compliance with all legal and regulatory requirements in connection with such use.
TI products are neither designed nor intended for use in automotive applications or environments unless the specific TI products are
designated by TI as compliant with ISO/TS 16949 requirements. Buyers acknowledge and agree that, if they use any non-designated
products in automotive applications, TI will not be responsible for any failure to meet such requirements.
Following are URLs where you can obtain information on other Texas Instruments products and application solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
www.ti.com/audio
Data Converters
DLP® Products
Automotive
www.ti.com/automotive
www.ti.com/communications
Communications and
Telecom
DSP
dsp.ti.com
Computers and
Peripherals
www.ti.com/computers
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
Consumer Electronics
Energy
www.ti.com/consumer-apps
www.ti.com/energy
Logic
Industrial
www.ti.com/industrial
Power Mgmt
Microcontrollers
RFID
power.ti.com
Medical
www.ti.com/medical
microcontroller.ti.com
www.ti-rfid.com
Security
www.ti.com/security
Space, Avionics &
Defense
www.ti.com/space-avionics-defense
RF/IF and ZigBee® Solutions www.ti.com/lprf
Video and Imaging
Wireless
www.ti.com/video
www.ti.com/wireless-apps
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2010, Texas Instruments Incorporated
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