SN75115NSRE4 [TI]
SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS; SN55115 , SN75115双路差分接收器型号: | SN75115NSRE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | SN55115, SN75115 DUAL DIFFERENTIAL RECEIVERS |
文件: | 总23页 (文件大小:940K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
SN55115 . . . J OR W PACKAGE
SN75115 . . . N PACKAGE
(TOP VIEW)
Choice of Open-Collector or Active Pullup
(Totem-Pole) Outputs
Single 5-V Supply
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Differential Line Operation
Dual-Channel Operation
TTL Compatible
1YS
1YP
V
CC
2YS
1STRB
1RTC
1B
2YP
2STRB
2RTC
2B
±15-V Common-Mode Input Voltage Range
Optional-Use Built-In 130-Ω Line-
Terminating Resistor
1R
T
1A
2R
2A
T
Individual Frequency-Response Controls
Individual Channel Strobes
GND
Designed for Use With SN55113, SN75113,
SN55114, and SN75114 Drivers
SN55114 . . . FK PACKAGE
(TOP VIEW)
Designed to Be Interchangeable With
National DS9615 Line Receivers
3
2
1
20 19
18
description
2YP
2STRB
NC
1STRB
1RTC
NC
4
5
6
7
8
17
16
15
14
The SN55115 and SN75115 dual differential line
receivers are designed to sense small differential
signals in the presence of large common-mode
noise. These devices give TTL-compatible output
signals as a function of the differential input
voltage. The open-collector output configuration
permits the wire-ANDing of similar TTL outputs
2RTC
2B
1B
1R
T
9 10 11 12 13
(such
as
SN5401/SN7401)
or
other
NC – No internal connection
SN55115/SN75115 line receivers. This permits a
level of logic to be implemented without extra
delay.
The output stages are similar to TTL totem-pole outputs, but with sink outputs, 1YS and 2YS, and the
corresponding active pullup terminals, 1YP and 2YP, available on adjacent package pins. The frequency
response and noise immunity may be provided by a single external capacitor. A strobe input is provided for each
channel. With the strobe in the low level, the receiver is disabled and the outputs are forced to a high level.
The SN55115 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN75115 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
OUTPUT
DIFF INPUT
(A AND B)
(YP AND YS
TIED
STRB
TOGETHER)
L
H
H
X
L
H
H
L
H
H = V ≥ V min or V more positive than V max
I
I
IH
ID
T+
T–
L = V ≤ V max or V morenegativethanV
max
IL ID
X = irrelevant
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
†
logic symbol
5
&
1B
7
2
1
1YP
1YS
1A
6
1R
R
T
T
3
1STRB
1RTC
2B
4
RSP
11
9
14
15
2YP
2YS
2A
10
13
12
2R
T
2STRB
2RTC
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
5
1B
7
2
1
1YP (Pullup)
1YS (Sink)
1A
6
1R
T
4
3
1RTC
1STRB
11
9
2B
2A
14
15
2YP (Pullup)
2YS (Sink)
10
12
13
2R
T
2RTC
2STRB
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
schematic (each receiver)
Response
Time
Control
4,12
R
6,10
Strobe
3,13
T
16
V
CC
2.7 k
V
1 k
1 k
V
2 k
V
1.5 k 1.64 k
1 pF
1.64 k
130
1 pF
2.6 k
500
2.6 k
500
20
Input 7.9
A
2,14 Pullup
YP
8 k
8 k
7 k
5 k
7 k
3 k
Input 5.11
B
Sink
Output
YS
1,15
8
130
150
150
1.5 k
150
GND
Common to
Both Receivers
2.5 k
V
150
Resistor values are nominal and in ohms.
Pin numbers shown are for the J, N, and W packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage V (A, B, and R ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 V
I
T
Input voltage V (STRB) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
I
Off-state voltage applied to open-collector outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J or W package . . . . . . . . . . . . . . . . 300°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: N package . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTE 1: All voltage values, except differential input voltage, are with respect to network ground terminal.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
DISSIPATION RATING TABLE
DERATING FACTOR
T
≤ 25°C
T
= 70°C
T = 125°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
275 mW
275 mW
—
A
†
FK
1375 mW
11.0 mW/°C
11.0 mW/°C
9.2 mW/°C
8.0 mW/°C
880 mW
†
J
1375 mW
880 mW
N
1150 mW
736 mW
†
W
1000 mW
640 mW
200 mW
†
In the FK, J, and W packages, SN55115 chips are either silver glass or alloy mounted. SN75115 chips are
glass mounted.
recommended operating conditions
SN55115
SN75115
UNIT
MIN NOM
MAX
MIN NOM
MAX
Supply voltage, V
CC
High-level input voltage at STRB, V
4.5
2.4
5
5.5
4.75
2.4
5
5.25
V
V
IH
Low-level input voltage at STRB, V
0.4
–5
0.4
–5
15
70
V
IL
High-level output current, I
mA
mA
°C
OH
Low-level output current, I
15
OL
Operating free-air temperature, T
–55
125
0
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN55115
SN75115
†
PARAMETER
UNIT
TEST CONDITIONS
‡
‡
MIN TYP
MAX
MIN TYP
MAX
Positive-going
threshold voltage
§
§
V
V
= 0 .4 V,
= 2 .4 V,
I
I
= 15 mA,
= –5 mA,
V
V
= 0
= 0
500
500
mV
mV
V
V
O
OL
IC
IT+
Negative-going
threshold voltage
¶
¶
–500
–500
O
OH
IC
IT–
+15
+24
to
–19
+15
+24
to
–19
Common-mode
input voltage range
to
to
V
ICR
V
ID
= ±1 V
V
–15
–15
T
= MIN
= 25°C
= MAX
2.2
2.4
2.4
2.4
2.4
2.4
A
High-level ouput
voltage
V
I
= MIN,
= –5 mA
V
V
= –0.5 V,
= –0.5 V,
CC
OH
ID
V
V
T
A
3.4
0.22
–0.5
3.4
0.22
–0.5
V
V
OH
T
A
Low-level output
voltage
V
= MIN,
= 15 mA
CC
ID
0.4
0.45
OL
I
OL
T
A
= MIN
–0.9
–0.7
–0.7
2
–0.9
–0.7
–0.7
5
Low-level input
current
V
= MAX,
V = 0.4 V,
I
CC
Other input at 5.5 V
I
IL
T
A
= 25°C
= MAX
= 25°C
= MAX
mA
T
A
T
A
High-level strobe
current
V
V
= MIN,
V
ID
V
ID
V
ID
= –0.5 V,
= 0.5 V,
= 0.5 V,
CC
strobe
I
I
µA
SH
= 4.5 V
T
A
5
10
Low-level strobe
current
V
V
= MAX,
CC
strobe
T
A
= 25°C
= 25°C
–1.15
–3.4
–2.4
–1.15
–3.4
–2.4
mA
mA
SL
= 0.4 V
Response-time-
control current
V
CC
V
RC
= MAX,
= 0
I(
T
A
–1.2
–1.2
RTC)
(off)
T
A
= 25°C
= MAX
= 25°C
= MAX
100
200
V
V
= MIN,
= –4.5 V
V
= 12 V,
CC
ID
OH
OH
Off-state
open-collector
output current
T
A
I
O
µA
T
A
100
200
V
V
= MIN,
= –4.75 V
V
= 5.25 V,
CC
ID
T
A
Line-terminating
resistance
R
V
= 5 V
T
A
= 25°C
= 25°C
= 25°C
77
130
–40
32
167
–80
50
74
130
179
Ω
T
CC
Supply-circuit output
V
V
= MAX,
= 0
V
V
= –0.5 V,
= 0.5 V,
CC
O
ID
I
T
A
–15
–14
–40 –100
32 50
mA
mA
OS
#
current
Supply current
(both receivers)
V
V
= MAX,
= 0
CC
IC
ID
I
T
A
CC
†
Unless otherwise noted, V
= 2.4 V. All parameters with the exception of off-state open-collector output current are measured with the active
pullup connected to the sink output.
strobe
‡
§
¶
All typical values are at V
= 5 V, T = 25°C, and V = 0.
CC
A
IC
Differential voltages are at the B input terminal with respect to the A input terminal.
The algebraic convention, in which the less positive (more negative) limit is designated as minimum, is used in this data sheet for threshold
voltages only.
#
Only one output should be shorted to ground at a time, and duration of the short circuit should not exceed one second.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
switching characteristics, V
= 5 V, C = 30 pF, T = 25°C
L A
CC
SN55115
TYP
SN75115
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
MAX
Propagation delay time,
low-to-high level output
t
t
R
R
= 3.9 kΩ, See Figure 1
= 390 Ω, See Figure 1
18
20
50
18
20
75
ns
ns
PLH
L
L
Propagation delay time,
high-to-low level output
50
75
PHL
PARAMETER MEASUREMENT INFORMATION
Open
2.4 V
STRB
5 V
R
T
Input
Pulse
≤ 5 ns
≤ 5 ns
3 V
Differential
Input
R
90%
0 V
90%
0 V
L
YP
YS
B
A
Generator
10%
10%
–3 V
(see Note A)
V
O
t
t
PLH
PHL
1.5 V
C
= 30 pF
L
V
OH
(see Note B)
Response
Time Control
Open
Output
1.5 V
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORM
NOTES: A. The pulse generator has the following characteristics: Z = 50 Ω, PRR ≤ 500 kHz, t ≤ 100 ns, duty cycle = 50%.
O
w
B.
C includes probe and jig capacitance.
L
Figure 1. Test Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
†
TYPICAL CHARACTERISTICS
INPUT CURRENT
vs
INPUT VOLTAGE
6
4
V
= 5 V
CC
Input Not Under Test at 0 V
= 25°C
T
A
2
0
– 2
– 4
– 6
– 25 – 20 – 15 – 10 – 5
0
5
10 15 20 25
V – Input Voltage – V
I
Figure 2
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
COMMON-MODE INPUT VOLTAGE
4
3.4
3.2
2.8
2.4
2
6
5
4
3
2
1
0
V
= 4.5 V
No Load
= 25°C
CC
T
A
V
(V = –0.5 V, I
OH ID
= –5 mA)
OH
V
CC
= 5.5 V
V
= 5 V
CC
CC
V
= 4.5 V
V
ID
= – 1 V
1.6
1.2
0.8
0.4
0
V
(V = 0.5 V, I
OL ID
= 15 mA)
V
= 1 V
5
OL
ID
– 75 – 50 – 25
0
25
50
75
100 125
– 25 – 20 – 15 – 10 – 5
0
10 15 20 25
T
A
– Free-Air Temperature – °C
V
IC
– Common-Mode Input Voltage – V
Figure 3
Figure 4
†
Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
0.4
0.3
0.2
0.1
0
5
4
V
T
A
= –0.5 V
= 25°C
V
= 0.5 V
ID
ID
T
A
= 25°C
V
CC
= 5.5 V
V
CC
= 4.5 V
V
CC
= 5 V
3
2
V
CC
= 5.5 V
V
CC
= 4.5 V
1
0
0
5
10
15
20
25
30
–50
0
–10
–20
–30
–40
I – Low-Level Output Current – mA
OL
I
– High-Level Output Current – mA
OH
Figure 5
Figure 6
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
6
5
4
3
2
1
0
6
5
4
3
2
1
0
V
V
V
= 5.5 V
= 5 V
CC
CC
CC
V
= 5 V
CC
Load = 2 kΩ to V
CC
= 4.5 V
T
= 125°C
A
T
A
= 25°C
T
= –55°C
A
Load = 2 kΩ to V
T
A
CC
= 25°C
–0.2 –0.15 –0.1 –0.05
0
0.5 0.1 0.15 0.2
–0.2
–0.1
0
0.1
0.2
V – Differential Input Voltage – V
ID
V
ID
– Differential Input Voltage – V
Figure 7
Figure 8
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
†
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
OUTPUT VOLTAGE
vs
STROBE INPUT VOLTAGE
STROBE INPUT VOLTAGE
6
5
4
3
2
1
0
6
5
4
3
2
1
0
No Load
= 0.5 V
V
= 5 V
CC
No Load
= 0.5 V
V
ID
T
A
= 25°C
V
ID
V
= 5.5 V
CC
T
= 125°C
A
V
CC
= 5 V
T
= –55°C
= 25°C
A
V
= 4.5 V
CC
T
A
0
0.5
1
1.5
2
2.5
3
3.5
4
0
0.5
1
1.5
2
2.5
3
3.5
4
V
– Strobe Input Voltage – V
strobe
V
– Strobe Input Voltage – V
strobe
Figure 9
Figure 10
SUPPLY CURRENT
(BOTH RECEIVERS)
vs
SUPPLY CURRENT
(BOTH RECEIVERS)
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
40
35
30
25
20
15
10
5
60
50
40
30
20
10
0
No Load
T
A
= 25°C
B Input at V
CC
A Input at 0 V
B Input at 0 V
A Input at V
CC
V
= 5.5 V
CC
B Input at 5.5 V
A Input at 0 V
0
–75 –50 –25
0
25
50
75
100 125
0
1
2
3
4
5
6
7
8
T
A
– Free-Air Temperature – °C
V
CC
– Supply Voltage – V
Figure 11
Figure 12
†
Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55115, SN75115
DUAL DIFFERENTIAL RECEIVERS
SLLS072D – SEPTEMBER 1973 – REVISED MAY 1998
†
TYPICAL CHARACTERISTICS
MAXIMUM OPERATING FREQUENCY
PROPAGATION DELAY TIMES
vs
vs
RESPONSE-TIME-CONTROL CAPACITANCE
FREE-AIR TEMPERATURE
30
10M
1M
V
= 5 V
CC
See Figure 1
25
20
15
10
5
t
(R = 390 Ω)
L
PHL
t
(R = 3.9 kΩ)
L
PLH
10k
1k
V
= 5 V
CC
Input: – 0.5-V to 0.5-V Square Wave
= 25°C
T
A
100
0.001
0
0.01
0.1
1
10
–75 –50 –25
0
25
50
75
100 125
Response-Time-Control Capacitance – µF
T
A
– Free-Air Temperature – °C
Figure 13
Figure 14
†
Data for temperatures below 0°C and above 70°C and for supply voltages below 4.75 V and above 5.25 V are applicable to SN55115 circuits
only. These parameters were measured with the active pullup connected to the sink output.
APPLICATION INFORMATION
Location 5
Location 3
‡
‡
Z
O
Z
O
Location 6
Location 1
Location 2
Location 4
Twisted
Pair
SN75113 Driver
SN75115 Receiver
= R . A capacitor may be connected in series with Z to reduce power dissipation.
‡
Z
O
T
O
Figure 15. Basic Party-Line or Data-Bus Differential Data Transmission
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-88745012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
88745012A
SNJ55
115FK
5962-88745012A-T
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
88745012A
SNJ55115FK
5962-8874501FA
JM38510/10404BEA
M38510/10404BEA
ACTIVE
ACTIVE
ACTIVE
CFP
CDIP
CDIP
W
J
16
16
16
1
1
1
TBD
TBD
TBD
TBD
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
-55 to 125
5962-8874501FA
SNJ55115W
JM38510
/10404BEA
J
JM38510
/10404BEA
SN55115J
SN75115D
ACTIVE
ACTIVE
CDIP
SOIC
J
16
16
1
A42
N / A for Pkg Type
-55 to 125
0 to 70
SN55115J
D
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75115
SN75115DE4
SN75115DG4
SN75115DR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
16
16
16
16
16
16
16
16
16
40
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
0 to 70
SN75115
SN75115
SN75115
SN75115
SN75115
SN75115N
SN75115N
SN75115
SN75115
Green (RoHS
& no Sb/Br)
D
2500
2500
2500
25
Green (RoHS
& no Sb/Br)
SN75115DRE4
SN75115DRG4
SN75115N
D
Green (RoHS
& no Sb/Br)
D
Green (RoHS
& no Sb/Br)
N
Pb-Free
(RoHS)
SN75115NE4
SN75115NSR
SN75115NSRE4
N
25
Pb-Free
(RoHS)
N / A for Pkg Type
NS
NS
2000
2000
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SO
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN75115NSRG4
SNJ55115FK
ACTIVE
SO
NS
16
20
2000
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN75115
ACTIVE
LCCC
FK
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
88745012A
SNJ55
115FK
SNJ55115J
SNJ55115W
ACTIVE
ACTIVE
CDIP
CFP
J
16
16
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
SNJ55115J
W
5962-8874501FA
SNJ55115W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN55115, SN75115 :
Catalog: SN75115
•
Military: SN55115
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Military - QML certified for Military and Defense Applications
•
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75115DR
SOIC
SO
D
16
16
2500
2000
330.0
330.0
16.4
16.4
6.5
8.2
10.3
10.5
2.1
2.5
8.0
16.0
16.0
Q1
Q1
SN75115NSR
NS
12.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN75115DR
SOIC
SO
D
16
16
2500
2000
333.2
367.0
345.9
367.0
28.6
38.0
SN75115NSR
NS
Pack Materials-Page 2
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changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
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TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
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