SN751516FT-00 [TI]

DC PLASMA DISPLAY DRIVER, PDSO48;
SN751516FT-00
型号: SN751516FT-00
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

DC PLASMA DISPLAY DRIVER, PDSO48

驱动 光电二极管 接口集成电路
文件: 总11页 (文件大小:169K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇ ꢀ ꢁꢂ ꢃꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌꢀ ꢍꢌ ꢈꢎ ꢀꢊꢋ ꢌꢏ ꢈ ꢐꢎ ꢑ ꢒꢐ ꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
SN751506 . . . FT PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
Each Device Drives 32 Lines  
180-V Open-Drain Parallel Outputs  
220-mA Parallel Output Sink Current  
Capability  
Q32  
Q31  
Q30  
Q29  
Q28  
Q27  
Q26  
Q25  
Q24  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
40  
CMOS-Compatible Inputs  
Strobe Input Provided  
Serial Data Output for Cascade Operation  
Inputs Have Built-In Electrostatic Discharge  
Protection  
Q9  
Q23 10 39  
Q10  
Q11  
Q12  
Q13  
Q14  
Q15  
Q16  
NC  
GND  
NC  
STROBE  
NC  
description  
11 38  
12 37  
13 36  
14 35  
15 34  
16 33  
17 32  
18 31  
19 30  
20 29  
21 28  
22 27  
23 26  
24 25  
Q22  
Q21  
Q20  
Q19  
Q18  
Q17  
NC  
GND  
NC  
NC  
The SN751506 and the SN751516 are monolithic  
integrated circuits designed to drive the scan lines  
of a dc plasma panel display. The SN751516 pin  
sequence is reversed from the SN751506 for  
ease in printed-circuit-board layout.  
Each device consists of a 32-bit shift register and  
32 OR gates. Serial data is entered into the shift  
register on the high-to-low transition of the clock  
input. When STROBE is low, all Q outputs are in  
the off state. Outputs are open-drain JFET  
transistors with a breakdown voltage in excess of  
180 V. The outputs have a 220-mA sink current  
capability in the on state. Only one Q output  
should be allowed to be in the on state at a time.  
CLOCK  
V
V
CC  
CC  
NC  
NC  
DATA IN  
SERIAL OUT  
SN751516 . . . FT PACKAGE  
(TOP VIEW)  
SERIAL OUT from the shift register can be used  
to cascade shift registers. This output is not  
affected by the STROBE input. All inputs are  
CMOS compatible with ESD protection built in.  
Q1  
Q2  
Q3  
Q4  
Q5  
Q6  
Q7  
Q8  
Q9  
Q32  
Q31  
Q30  
Q29  
Q28  
Q27  
Q26  
Q25  
1
2
3
4
5
6
7
8
9
48  
47  
46  
45  
44  
43  
42  
41  
The SN751506 and SN751516 are characterized  
for operation from 0°C to 70°C.  
40 Q24  
39 Q23  
Q10 10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
Q11  
Q12  
Q13  
Q14  
Q15  
Q22  
Q21  
Q20  
Q19  
Q18  
Q17  
NC  
GND  
NC  
NC  
Q16  
NC  
GND  
NC  
STROBE  
NC  
CLOCK  
V
V
CC  
CC  
NC  
DATA IN  
NC  
SERIAL OUT  
NC − No internal connection  
ꢊꢐ ꢓ ꢈꢔ ꢉ ꢕꢎ ꢓ ꢁ ꢈ ꢌꢕꢌ ꢖꢗ ꢘ ꢙꢚ ꢛ ꢜꢝ ꢖꢙꢗ ꢖꢞ ꢟꢠ ꢚ ꢚ ꢡꢗꢝ ꢜꢞ ꢙꢘ ꢢꢠꢣ ꢤꢖꢟ ꢜꢝ ꢖꢙꢗ ꢥꢜ ꢝꢡ ꢦ  
ꢊꢚ ꢙ ꢥꢠꢟ ꢝ ꢞ ꢟ ꢙꢗ ꢘꢙ ꢚ ꢛ ꢝ ꢙ ꢞ ꢢꢡ ꢟ ꢖꢘ ꢖꢟꢜ ꢝꢖ ꢙꢗꢞ ꢢꢡ ꢚ ꢝꢧ ꢡ ꢝꢡ ꢚ ꢛꢞ ꢙꢘ ꢕꢡꢨ ꢜꢞ ꢎꢗꢞ ꢝꢚ ꢠꢛ ꢡꢗꢝ ꢞ  
ꢞ ꢝ ꢜ ꢗꢥ ꢜ ꢚꢥ ꢩ ꢜ ꢚꢚ ꢜ ꢗ ꢝꢪꢦ ꢊꢚ ꢙ ꢥꢠꢟ ꢝꢖꢙꢗ ꢢꢚ ꢙꢟ ꢡꢞ ꢞꢖ ꢗꢫ ꢥꢙꢡ ꢞ ꢗꢙꢝ ꢗꢡ ꢟꢡ ꢞꢞ ꢜꢚ ꢖꢤ ꢪ ꢖꢗꢟ ꢤꢠꢥ ꢡ  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
Copyright 1989, Texas Instruments Incorporated  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃꢄ ꢃ ꢅ ꢆꢇ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌ ꢀ ꢍꢌ ꢈ ꢎ ꢀꢊ ꢋ ꢌꢏ ꢈꢐ ꢎ ꢑꢒ ꢐꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
logic symbols  
SN751506  
SN751516  
CMOS/  
CMOS/  
PLASMA DISP  
29  
PLASMA DISP  
20  
STROBE  
EN2  
STROBE  
CLOCK  
EN2  
SRG32  
SRG32  
21  
25  
28  
24  
CLOCK  
C1/  
C1/→  
48  
47  
.
.
.
1
2
DATA IN  
Q1 DATA IN  
Q2  
Q1  
Q2  
1D  
2
2
1D  
2
2
.
.
.
.
.
.
.
.
.
.
.
.
.
.
.
33  
16  
.
.
.
2
1
16  
33  
.
.
.
Q16  
Q17  
Q16  
Q17  
2
2
2
2
.
.
.
.
.
.
.
.
.
.
.
.
47  
48  
25  
Q31  
Q31  
2
2
2
2
Q32  
Q32  
24  
SERIAL OUT  
SERIAL OUT  
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
logic diagram (positive logic)  
STROBE  
R1  
R2  
CLOCK  
Q1  
Q2  
32-Bit  
Static  
Shift  
Register  
.
.
.
DATA IN  
28 Outputs  
(Q3 thru Q30)  
Not Shown  
.
.
.
R31  
Q31  
Q32  
R32  
SERIAL OUT  
FUNCTION TABLE  
CONTROL INPUTS  
OUTPUTS  
SHIFT REGISTERS  
R1 THRU R32  
FUNCTION  
CLOCK  
STROBE  
SERIAL  
QI THRU Q32  
No ↓  
X
X
R32  
R32  
Load and shift  
No change  
Load  
Determined by STROBE  
X
X
L
H
R32  
R32  
All high impedance  
R1 through R32  
Strobe  
As determined above  
H = high level, L = low level, X = irrelevant, = high-to-low transition.  
R32 takes on the state of R31, R31 takes on the state of R30, . . . R2 takes on the state of R1, and R1  
takes on the state of the data input.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇ ꢀ ꢁꢂ ꢃꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌꢀ ꢍꢌ ꢈꢎ ꢀꢊꢋ ꢌꢏ ꢈ ꢐꢎ ꢑ ꢒꢐ ꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
typical operating sequence  
CLOCK  
DATA IN  
Valid  
Irrelevant  
Valid  
Shift Register  
Contents  
Invalid  
STROBE  
Outputs  
Off State  
Off State  
Valid  
Only 1 bit in 32 should be low in the input data.  
schematics of inputs and outputs  
EQUIVALENT OF EACH INPUT  
TYPICAL OF ALL Q OUTPUTS  
TYPICAL OF SERIAL OUTPUT  
V
CC  
V
CC  
Output  
Input  
Output  
GND  
GND  
GND  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage range, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.4 V to 7 V  
CC  
On-state Q output voltage range, V  
Off-state Q output voltage range, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.4 V to 125 V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.4 V to 180 V  
O
O
Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.4 V to V  
+ 0.4 V  
+ 0.4 V  
I
CC  
CC  
Serial output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.4 V to V  
Q output on-state time duration (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100 µs  
Q output duty cycle (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1/200  
Continuous total power dissipation at (or below) 25°C free-air temperature (see Note 3) . . . . . . . . 1025 mW  
Operating free-air temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 150°C  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
NOTES: 1. Voltage values are with respect to GND.  
2. Only one Q output should be on at a time.  
3. For operation above 25°C free-air temperature, derate linearly to 656 mW at 70°C at the rate of 8.2 mW/°C.  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃꢄ ꢃ ꢅ ꢆꢇ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌ ꢀ ꢍꢌ ꢈ ꢎ ꢀꢊ ꢋ ꢌꢏ ꢈꢐ ꢎ ꢑꢒ ꢐꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
recommended operating conditions  
MIN NOM  
MAX  
6
UNIT  
V
Supply voltage, V  
CC  
4
5
Peak on-state Q output voltage, V  
O(on)  
110  
V
V
CC  
V
CC  
V
CC  
V
CC  
= 4 V  
= 6 V  
= 4 V  
= 6 V  
3.2  
4.8  
High-level input voltage, V  
IH  
V
V
0.8  
1.2  
Low-level input voltage, V  
IL  
Output current, I (T = 25°C)  
220  
200  
mA  
kHz  
µs  
o
A
Clock frequency, f  
clock  
1.5  
Pulse duration, CLOCK high or low, t  
w(CLK)  
Pulse duration, DATA, t  
wD  
5
2
µs  
Pulse duration, STROBE, t  
w(STRB)  
µs  
Setup time, DATA IN before CLOCK , t  
1
µs  
su  
Hold time, DATA IN after CLOCK, t  
1.2  
0
µs  
h
Operating free-air temperature, T  
70  
°C  
A
The minimum clock period is 5 µs.  
electrical characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
SERIAL OUT  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
V
V
High-level output voltage  
Low-level output voltage  
I
I
I
= 0.1 mA  
4.5  
V
OH  
OH  
Q outputs  
SERIAL OUT  
Q outputs  
Q outputs  
= 180 mA  
= 0.1 mA  
6
10  
0.5  
1
OL  
V
OL  
OL  
I
I
I
I
Off-state output current  
Low-level output current  
High-level input current  
Low-level input current  
Input capacitance  
V
V
= 110 V  
= 16 V  
µA  
mA  
µA  
µA  
pF  
O(off)  
OL  
IH  
OH  
220  
OL  
V = V  
I CC  
1
−1  
15  
1
V = 0  
I
IL  
C
i
All Q outputs off  
One Q output on  
I
Supply current  
mA  
CC  
20  
40  
switching characteristics, V  
= 5 V, T = 25°C  
A
CC  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
0.5  
0.6  
1
UNIT  
µs  
t
t
t
t
t
Propagation delay time, CLOCK to SERIAL OUT  
Delay time, high-to-low-level Q output from STROBE or CLOCK inputs  
Delay time, low-to-high-level Q output from STROBE or CLOCK inputs  
Transition time, high-to-low-level Q output  
C
= 15 pF  
0.2  
pd  
L
0.2  
µs  
DHL  
DLH  
THL  
TLH  
C
R
= 150 pF,  
= 470 Ω,  
0.35  
L
L
µs  
0.1  
0.3  
1
µs  
See Figures 2 and 3  
Transition time, low-to-high-level Q output  
0.35  
µs  
Typical values are for clock Inputs. Typical values from STROBE will be less.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇ ꢀ ꢁꢂ ꢃꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌꢀ ꢍꢌ ꢈꢎ ꢀꢊꢋ ꢌꢏ ꢈ ꢐꢎ ꢑ ꢒꢐ ꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
PARAMETER MEASUREMENT INFORMATION  
4 V  
1 V  
CLOCK  
50%  
50%  
50%  
t
w(CLKH)  
t
w(CLKL)  
t
t
h
su  
4 V  
1 V  
DATA IN  
50%  
50%  
t
wD  
Figure 1. Input Timing Voltage Waveforms  
4 V  
1 V  
Last  
Pulse  
CLOCK  
50%  
V
OH  
OL  
SERIAL OUT  
STROBE  
50%  
V
t
pd  
t
w(STRB)  
50%  
4 V  
50%  
t
t
t
DHL  
DLH  
DHL  
V
V
OH  
90%  
10%  
90%  
90%  
10%  
Q Output  
10%  
TLH  
OL  
t
t
DLH  
t
THL  
Figure 2. Switching Characteristics  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃꢄ ꢃ ꢅ ꢆꢇ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌ ꢀ ꢍꢌ ꢈ ꢎ ꢀꢊ ꢋ ꢌꢏ ꢈꢐ ꢎ ꢑꢒ ꢐꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
PARAMETER MEASUREMENT INFORMATION  
5 V  
V
DD  
= 100 V  
150 pF  
150 pF  
Q1  
Q2  
470 Ω  
470 Ω  
DATA IN  
CLK  
Generator  
(see Note A)  
150 pF  
150 pF  
Generator  
(see Note A)  
Q31  
Q32  
470 Ω  
470 Ω  
STROBE  
Generator  
(see Note A)  
SERIAL  
OUT  
C
= 15 pF  
L
(see Note B)  
GND  
NOTES: A. Input pulses are supplied by generators having the following characteristics: t = 1.25 µs, PRR 200 kHz, t 30 ns, t 30 ns,  
w
r
f
Z
C
= 50 .  
O
L
B.  
includes probe and jig capacitance.  
Figure 3. Test Circuit  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀꢁ ꢂꢃ ꢄ ꢃ ꢅ ꢆ ꢇ ꢀ ꢁꢂ ꢃꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌꢀ ꢍꢌ ꢈꢎ ꢀꢊꢋ ꢌꢏ ꢈ ꢐꢎ ꢑ ꢒꢐ ꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
TYPICAL CHARACTERISTICS  
LOW-LEVEL Q OUTPUT CURRENT  
vs  
LOW-LEVEL Q OUTPUT VOLTAGE  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
10  
9
500  
450  
V
I
= 5 V  
V
CC  
V
OL  
= 5 V  
= 16 V  
CC  
= 180 mA  
OL  
8
7
6
5
4
3
2
1
400  
350  
300  
250  
200  
150  
100  
50  
0
0
0
10  
20  
T
30  
40  
50  
60  
70  
80  
0
10  
20  
T
30  
40  
50  
60  
70  
80  
− Free-Air Temperature − °C  
− Free-Air Temperature − °C  
A
A
Figure 5  
Figure 4  
PROPAGATION DELAY TIME,  
CLOCK TO SERIAL OUT  
vs  
SUPPLY CURRENT  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
0.5  
0.4  
0.3  
0.2  
0.1  
0
26  
25  
V
C
= 5 V  
V
= 5 V  
CC  
= 15 pF  
CC  
One Q  
Output Low  
L
24  
23  
22  
21  
20  
19  
18  
17  
16  
0
10  
20  
30  
40  
50  
60  
70  
80  
0
10  
20  
30  
40  
50  
60  
70  
80  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 6  
Figure 7  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
ꢀ ꢁꢂ ꢃꢄ ꢃ ꢅ ꢆꢇ ꢀꢁ ꢂ ꢃ ꢄ ꢃꢄ ꢆ  
ꢈꢉ ꢊꢋ ꢌ ꢀ ꢍꢌ ꢈ ꢎ ꢀꢊ ꢋ ꢌꢏ ꢈꢐ ꢎ ꢑꢒ ꢐꢀ  
SLDS034 − DECEMBER 1986 − REVISED JULY 1889  
TYPICAL CHARACTERISTICS  
DELAY TIME,  
DELAY TIME,  
HIGH-TO-LOW-LEVEL Q OUTPUT  
LOW-TO-HIGH-LEVEL Q OUTPUT  
vs  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
C
R
= 5 V  
= 150 pF  
= 470 Ω  
V
C
R
= 5 V  
= 150 pF  
= 470 Ω  
CC  
L
L
CC  
L
L
0
10  
20  
30  
40  
50  
60  
70  
0
10  
20  
30  
40  
50  
60  
70  
80  
80  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 8  
Figure 9  
TRANSITION TIME,  
HIGH-TO-LOW-LEVEL  
vs  
TRANSITION TIME,  
LOW-TO-HIGH-LEVEL Q OUTPUT  
vs  
FREE-AIR TEMPERATURE  
FREE-AIR TEMPERATURE  
0.5  
0.4  
0.3  
0.2  
0.1  
0
1.0  
0.9  
V
C
R
= 5 V  
= 150 pF  
= 470 Ω  
V
C
R
= 5 V  
= 150 pF  
= 470 Ω  
CC  
L
L
CC  
L
L
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
0
10  
20  
30  
40  
50  
60  
70  
80  
0
10  
20  
30  
40  
50  
60  
70  
80  
T
A
− Free-Air Temperature − °C  
T
A
− Free-Air Temperature − °C  
Figure 10  
Figure 11  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  
PACKAGE OPTION ADDENDUM  
www.ti.com  
23-Apr-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
DFP  
DFP  
DFP  
Drawing  
SN751506FT  
SN751516FT  
SN751516FT  
OBSOLETE  
OBSOLETE  
OBSOLETE  
FT  
48  
48  
48  
TBD  
TBD  
TBD  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
Call TI  
FT  
FT  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan  
-
The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS  
&
no Sb/Br)  
-
please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
MECHANICAL DATA  
MDFP001 – OCTOBER 1994  
FT (R-PDFP-G48)  
PLASTIC DUAL FLATPACK  
0,45  
0,25  
M
0,16  
0,80  
48  
25  
14,20 18,00  
13,80 17,20  
0,15 NOM  
Gage Plane  
1
24  
20,20  
19,80  
0,25  
0°10°  
1,00  
0,60  
2,00 TYP  
2,30 MAX  
Seating Plane  
0,15  
0,10 MIN  
4040228-2/B 03/95  
NOTES: A. All linear dimensions are in millimeters.  
B. This drawing is subject to change without notice.  
C. Contact field sales office to determine if a tighter coplanarity requirement is available for this package.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements,  
and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should  
obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are  
sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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mandated by government requirements, testing of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and  
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TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right, copyright, mask work right,  
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www.ti.com/audio  
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Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265  
Copyright © 2008, Texas Instruments Incorporated  

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