SN751730NSRG4 [TI]
TRIPLE LINE TRANSCEIVER, PDSO20, GREEN, PLASTIC, SOP-20;
| 型号： | SN751730NSRG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | TRIPLE LINE TRANSCEIVER, PDSO20, GREEN, PLASTIC, SOP-20 驱动 输入元件 光电二极管 接口集成电路 驱动器 |
| 文件： | 总17页 (文件大小：930K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
1
FEATURES
D OR N PACKAGE
(TOP VIEW)
Meets or Exceeds the Requirements of IBM®
360/370 Input/Output Interface Specification
for 4.5-Mb/s Operation
2
•
VCC
DO1
DI1
DE1
RI1
RO1
RI2
RO2
RI3
1
2
3
4
5
6
7
8
16
15
14
13
12
•
•
Single 5-V Supply
Uncommitted Emitter-Follower Output
Structure for Party-Line Operation
DO2
DI2
•
•
Driver Output Short-Circuit Protection
11 DO3
Driver Input/Receiver Output Compatible With
TTL
10
9
DI3
DE2
RO3
GND
•
•
Receiver Input Resistance . . . 7.4 kΩ to 20 kΩ
Ratio Specification for Propagation Delay
Time, Low to High/High to Low
DW PACKAGE
(TOP VIEW)
DESCRIPTION/
DE1
RI1
VCC
DO1
N.C.
DI1
DO2
DI2
DO3
N.C.
DI3
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
ORDERING INFORMATION
The SN751730 triple line driver/receiver is specifically
designed to meet the input/output interface
specifications for IBM System 360/370. It also is
compatible with standard TTL logic and supply
voltage levels.
N.C.
RO1
RI2
RO2
RI3
The low-impedance emitter-follower driver outputs of
the SN751730 drive terminated lines, such as coaxial
cable or twisted pair. Having the outputs uncommitted
allows wired-OR logic to be performed in party-line
applications. Output short-circuit protection is
provided by an internal clamping network that turns
on when the output voltage drops below
approximately 2.5 V.
N.C.
RO3
GND
DE2
NS PACKAGE
(TOP VIEW)
DE1
RI1
RO1
RI2
N.C.
N.C.
RO2
RI3
RO3
GND
VCC
19 DO1
1
2
3
4
5
6
7
8
9
10
20
An open line affects the receiver input as does a
low-level input voltage.
18
17
16
15
14
13
12
11
DI1
All the driver inputs and receiver outputs are in
conventional TTL configuration and the gating can be
used during power-up and power-down sequences to
ensure that no noise is introduced to the line by
pulling either DE1 or DE2 to a low level.
DO2
N.C.
N.C.
DI2
DO3
DI3
DE2
N.C. – No internal connection
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
IBM is a registered trademark of International Business Machines Corporation.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1990–2007, Texas Instruments Incorporated
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TOP-SIDE MARKING
PDIP – N
SOIC – D
Tube
SN751730N
SN751730N
Tube
SN751730D
SN751730
Tape and reel
Tube
SN751730DR
SN751730DW
SN751730DWR
SN751730NSR
0°C to 70°C
SOIC – DW
SOP – NS
SN751730
SN751730
Tape and reel
Tape and reel
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
FUNCTION TABLES
EACH DRIVER
INPUTS
OUTPUT
DO
DI
L
DE1
X
DE2
X
L
L
X
X
H
L
X
X
L
L
H
H
H
EACH DRIVER(1)
INPUT
RI
OUTPUT
RO
L
H
H
L
Open
H
(1) H = high level, L = low level, X = irrelevant
LOGIC DIAGRAM (POSITIVE LOGIC)
RECEIVER
DRIVER
1
2
4
6
3
5
7
DE1
DI1
RO1
RO2
RO3
RI1
RI2
RI3
15
13
11
14
DO1
DO2
DO3
12
DI2
10
9
DI3
DE2
Pin numbers shown are for the D and N package only.
2
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Copyright © 1990–2007, Texas Instruments Incorporated
Product Folder Link(s): SN751730
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
EQUIVALENT SCHEMATICS OF DRIVER AND RECEIVER(1)
DRIVER
V
CC
2.5 Ω
15 kΩ
DO
DI
DE1
DE2
100 Ω
RECEIVER
V
CC
60 Ω
6 kΩ
RO
RI
14 kΩ
(1) All resistor values are nominal.
Copyright © 1990–2007, Texas Instruments Incorporated
Submit Documentation Feedback
3
Product Folder Link(s): SN751730
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
UNIT
VCC
VI
Supply voltage(2)
7
V
Driver
–0.5
–0.5
–0.5
–0.5
7
7
V
V
V
V
Input voltage range
Receiver
Driver
VO
Output voltage range
7
Enable input voltage range
7
D package
DW package
N package
NS package
73
58
67
60
150
260
150
θJA
Package thermal impedance(3)
°C/W
TJ
Operating virtual junction temperature
°C
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 s
Storage temperature range
Tstg
–65
°C/W
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to network ground terminal.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
MIN
4.75
2
NOM
MAX
UNIT
VCC
VIH
Supply voltage
5
5.25
V
Driver, Enable
Receiver
High-level input voltage
V
1.55
Driver, Enable
Receiver
0.8
1.15
70
VIL
TA
Low-level input voltage
V
Operating free-air temperature
0
°C
4
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Copyright © 1990–2007, Texas Instruments Incorporated
Product Folder Link(s): SN751730
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
DRIVER SECTION
Electrical Characteristics
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
PARAMETER
Input clamp voltage
TEST CONDITIONS
MIN
MAX
UNIT
VIK
VCC = 4.75 V,
IIL = –18 mA
–1.5
V
VCC = 4.75 V,
IOH = –59.3 mA
VIH = 2 V,
TA = 25°C
3.11
VCC = 5.25 V,
IOH = - 78.1 mA
VIH = 2 V,
VIH = 2 V,
VIH = 2 V,
4.1
VOH
High–level output voltage
V
VCC = 4.75 V,
RL = 51.4 Ω
3.05
VCC = 5.25 V,
RL = 56.9 Ω
4.2
0.5
RL = 46.3 Ω or
56.9 Ω
VODH
Differential high-level output voltage
Low-level output voltage
V
V
VCC = 5.25 V,
VIL = 0.8 V,
VIH = 4.5 V
IOL = –0.24 mA
0.15
0.15
VOL
RL = 56.9 Ω
DI
20
60
IIH
High-level input current
Low-level input current
VCC = 5.25 V,
VCC = 5.25 V,
VIH = 2.7 V
VIH = 0.4 V
μA
μA
DE
DI
–400
–1200
100
IIL
DE
VIL = 0
VCC = 4.75 V,
VOH = 5 V
IOH
High-level output current
μA
VIH = 4.5 V
VIH = 4.5 V
100
IOS
Short-circuit output current(1)
VCC = 5.25 V
–30
mA
VI(D) = 4.5 V,
VI(R) = 0
ICCH
47
80
VCC = 5.25 V,
No load
Supply current (total package)
mA
VI(D) = 0,
VI(R) = 4.5 V
ICCL
(1) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.
Switching Characteristics
VCC = 5 V + 5%, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Propagation delay time, low- to high-level
output
tPLH
tPHL
6.5
12
18.5
ns
ns
Propagation delay time, high- to low-level
output
Differential propagation delay time(1)
RL = 47.5 Ω,
See Figure 1
6.5
12
18.5
10
Δtpd
ns
ns
tr
Output rise time
VCC = 5 V,
RL = 47.5 Ω,
See Figure 1
VO = 0.15 V to 3.05
V,
CL = 10.2 pF,
5
5
10
13
tf
Output fall time
Slew rate
ns
VO = 1 V to 3 V
average,
RL = 47.5 Ω,
See Figure 1
SR
CL = 10.2 pF,
0.65
V/ns
(1) Δtpd = |tPLH – tPHL
|
Copyright © 1990–2007, Texas Instruments Incorporated
Submit Documentation Feedback
5
Product Folder Link(s): SN751730
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
RECEIVER SECTION
Electrical Characteristics
over operating free-air temperature range (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
VCC = 4.75 V,
IOH = –400 μA
VI = 1.15 V,
VOH
VOL
High-level output voltage
2.7
V
V
IOL = 8 mA
0.5
0.4
VCC = 4.75 V,
VIH = 1.55 V
Low-level output voltage
IOL = 4 mA
rI
Input resistance
VCC = 0,
VI = 0.15 V to 3.9 V
VIH = 3.11 V
VIL = 0.15 V
VIL = 0
7.4
20
kΩ
mA
mA
mA
IIH
IIL
High-level input current
Low-level input current
Short-circuit output current
VCC = 4.75 V,
VCC = 5.25 V,
VCC = 5.25 V,
0.42
0.04
–100
–0.24
–20
(1)
IOS
VI(D) = 4.5 V,
VI(R) = 0
ICCH
47
80
Supply current (total
package)
VCC = 5.25 V,
No load
mA
VI(D) = 0,
VI(R) = 4.5 V
ICCL
(1) Not more than one output should be shorted at a time, and duration of the short circuit should not exceed one second.
Switching Characteristics
VCC = 5 V + 5%, TA = 25°C
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
Propagation delay time, low- to high-level
output
tPLH
7.5
7.5
12
19.5
ns
Propagation delay time, high- to low-level
output
RL = 2 kΩ, CL = 15 pF, See Figure 2
tPHL
12
19.5
10
ns
ns
(1)
Δtpd
Differential propagation delay time
(1) Δtpd = |tPLH – tPHL
|
6
Submit Documentation Feedback
Copyright © 1990–2007, Texas Instruments Incorporated
Product Folder Link(s): SN751730
SN751730
TRIPLE LINE DRIVER/RECEIVER
www.ti.com
SLLS062E–MAY 1990–REVISED AUGUST 2007
PARAMETER MEASUREMENT INFORMATION
3 V
V
CC
= 5 V
Input
1.3 V
1.3 V
t
w
0 V
Input
Output
Pulse
t
t
PHL
PLH
Generator
(see Note A)
V
3.05 V
1.4 V
OH
50 Ω
R
L
= 47.5 Ω
C
L
Output
1.4 V
(see Note B)
0.15 V
V
OL
t
f
t
r
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Z ≈ 50 Ω, t ≤ 500 ns, PRR ≤ 1 MHz, t ≤ 6 ns, t ≤ 15 ns.
O
w
f
r
B. C includes probe and jig capacitance.
L
Figure 1. Driver Test Circuit and Voltage Waveforms
V
CC
= 5 V
R
L
= 2 kΩ
Input
Output
Pulse
3 V
0 V
Generator
(see Note A)
Input
1.4 V
1.4 V
t
w
1N3064X2
t
t
PLH
PHL
C
L
= 15 pF
V
OH
OL
(see Note B)
Output
1.3 V
1.3 V
V
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: Z ≈ 50 Ω, t ≤ 500 ns, PRR ≤ 1 MHz, t ≤ 10 ns, t ≤ 10 ns.
O
w
f
r
B. C includes probe and jig capacitance.
L
Figure 2. Receiver Test Circuit and Voltage Waveforms
Copyright © 1990–2007, Texas Instruments Incorporated
Submit Documentation Feedback
7
Product Folder Link(s): SN751730
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
PACKAGING INFORMATION
Orderable Device
SN751730D
Status Package Type Package Pins Package
Eco Plan
Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(6)
(3)
(4/5)
ACTIVE
SOIC
SOIC
SOIC
PDIP
D
16
16
20
16
40
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
SN751730
SN751730DE4
SN751730DWR
SN751730N
ACTIVE
ACTIVE
ACTIVE
D
DW
N
40
2000
25
Green (RoHS
& no Sb/Br)
0 to 70
SN751730
SN751730
SN751730N
Green (RoHS
& no Sb/Br)
Pb-Free
(RoHS)
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Jun-2014
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Sep-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN751730DWR
SOIC
DW
20
2000
330.0
24.4
10.8
13.3
2.7
12.0
24.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
18-Sep-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 20
SPQ
Length (mm) Width (mm) Height (mm)
367.0 367.0 45.0
SN751730DWR
2000
Pack Materials-Page 2
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