SN75ALS057DWRE4 [TI]
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS; 梯形波接口总线收发器型号: | SN75ALS057DWRE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS |
文件: | 总22页 (文件大小:957K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
SN75ALS056 . . . DW OR N PACKAGE
Suitable for IEEE Standard 896
Applications
(TOP VIEW)
†
SN75ALS056 is an Octal Transceiver
SN75ALS057 is a Quad Transceiver
A1
A2
A3
A4
B1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
B2
B3
High-Speed Advanced Low-Power Schottky
(ALS) Circuitry
B4
V
GND
CC
A5
Low Power Dissipation:
52.5 mW/Channel Max
15 B5
14
13
12
11
A6
A7
A8
B6
B7
B8
T/R
High-Impedance pnp Inputs
Logic-Level 1-V Bus Swing Reduces Power
Consumption
CS
Trapezoidal Bus Output Waveform Reduces
Noise Coupling to Adjacent Lines
SN75ALS057 . . . DW OR N PACKAGE
(TOP VIEW)
Power-Up/Power-Down Protection
(Glitch Free)
D1
R1
D2
R2
B1
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
Open-Collector Driver Outputs Allow
Wired-OR Connections
E1
B2
Designed to Be a Faster, Lower-Power
Functional Equivalent of National DS3896,
DS3897
E2
V
GND
CC
D3
15 B3
14
13
12
11
R3
D4
R4
TE
E3
B4
E4
RE
description
The SN75ALS056 is an eight-channel,
monolithic, high-speed, advanced low-power
Schottky (ALS) device designed for two-way data
communication in
a
densely populated
backplane. The SN75ALS057 is a four-channel
version with independent driver-input (Dn) and
receiver-output (Rn) pins and a separate driver
disable for each driver (En).
These transceivers feature open-collector driver outputs with series Schottky diodes to reduce capacitive
loading to the bus. By using a 2-V pullup termination on the bus, the output signal swing is approximately 1 V,
which reduces the power necessary to drive the bus load capacitance. The driver outputs generate trapezoidal
waveforms that reduce crosstalk between channels. The drivers are capable of driving an equivalent dc load
as low as 18.5 Ω. The receivers have internal low-pass filters to further improve noise immunity.
The SN75ALS056 and SN75ALS057 are characterized for operation from 0°C to 70°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
†
The transceivers are suitable for IEEE Standard 896 applications to the extent of the operating conditions and characteristics specified in this
data sheet.
Copyright 1998, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
†
logic symbol
SN75ALS056
11
3EN1 (A-B)
3EN2 (B-A)
G3
T/R
10
1
CS
A1
20
19
18
17
15
1
B1
B2
B3
B4
B5
B6
B7
B8
2
2
3
4
6
A2
A3
A4
A5
A6
A7
A8
7
8
9
14
13
12
SN75ALS057
EN1 (D-B)
10
11
TE
RE
EN2 (B-R)
&
1
20
D1
E1
R1
D2
E2
R2
D3
E3
R3
D4
E4
R4
1
B1
19
2
2
3
18
15
13
B2
B3
B4
17
4
6
14
7
8
12
9
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
logic diagram (positive logic)
SN75ALS056
11
T/R
CS
10
Xmit
20
B1
1
A1
Rcv
12
B8
9
A8
SN75ALS057
10
11
TE
RE
Xmit
1
20
D1
E1
B1
19
2
R1
Rcv
8
13
D4
E4
B4
12
9
R4
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
Function Tables
SN75ALS056
TRANSMIT/RECEIVE
CONTROLS
CHANNELS
CS
L
T/R
H
A ↔ B
T(A
R(B
B)
A)
L
L
H
X
D
SN75ALS057
TRANSMIT/RECEIVE
CONTROLS
CHANNELS
TE
L
RE
L
En
L
D
B
B
R
D
T
R
R
D
L
L
H
L
L
H
D
L
H
H
H
L
H
X
X
T
D
D
D
R
D
H
H = high level, L = low level, R = receive, T = transmit,
D = disable, X = irrelevant
Direction of data transmission is from An to Bn for the SN75ALS056 and from Dn to Bn for the SN75ALS057.
Direction of data reception is from Bn to An for the SN75ALS056 and from Bn to Rn for the SN75ALS057. Data
transfer is inverting in both directions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
schematics of inputs and outputs
DRIVER OUTPUT
RECEIVER INPUT
CONTROL INPUTS
V
CC
V
CC
17.5 kΩ
Bn
2.5 kΩ
15 kΩ
TE/RE
Input
ESD
Protect
ESD
Protect
40 µA
GND
GND
RECEIVER OUTPUT
DRIVER INPUT
V
CC
SN75ALS057
Only
48 Ω
20 kΩ
An
or
Rn-Dn
En
ESD
Protect
ESD
Protect
ESD
Protect
†
GND
All resistor values shown are nominal.
†
Additional ESD protection is on the SN75ALS057, which has separate receiver-output and driver-input pins.
‡
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
CC
Control input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Driver input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Driver output voltage, V
I
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 V
O
Receiver input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.5 V
I
Receiver output voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Storage temperature range, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
O
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: DW or N package . . . . . . . . . . . . . . . 260 °C
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
‡
NOTE 1: Voltage values are with respect to network ground terminal.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
DISSIPATION RATING TABLE
T
25°C
DERATING FACTOR
T
= 70°C
T = 125°C
A
POWER RATING
A ≤
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
A
DW
N
1025 mW
8.2 mW/°C
9.2 mW/°C
656 mW
—
—
1150 mW
736 mW
recommended operating conditions
MIN NOM
MAX
UNIT
V
Supply voltage, V
4.75
2
5
5.25
CC
High-level driver and control input voltage, V
V
IH
Low-level driver and control input voltage, V
Bus termination voltage
0.8
2.1
70
V
IL
1.9
0
V
Operating free-air temperature, T
°C
A
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
SN75ALS056
†
TEST CONDITIONS
PARAMETER
UNIT
†
TYP
MIN
MAX
–1.5
1.69
V
V
Input clamp voltage at An, T/R, or CS
Receiver input threshold voltage at Bn
I = –18 mA
V
V
IK
I
1.405
2.4
IT
Bn at 1.2 V, CS at 0.8 V,
T/R at 0.8V, I = – 400 µA
V
OH
High-level output voltage at An
An
V
OH
Bn at 2 V ,CS at 0.8 V,
T/R at 0.8 V, I = 16 mA
0.5
1.2
OL
An at 2 V, CS at 0.8 V,
T/R at 2 V, V = 2 V,
V
OL
Low-level output voltage
Bn
V
0.75
L
R
=18.5 Ω,, See Figure 1
L
An, T/R or CS V = V
40
100
I
CC
I
IH
High-level input current
µA
V = 2 V, V
= 0 or 5.25 V,
I
CC
Bn
An at 0.8 V, T/R at 0.8 V
I
I
I
Low level input current at An, T/R, or CS
Short-circuit output current at An
V = 0.4 V
I
–400
–120
75
µA
IL
An at 0, Bn at 1.2 V,
CS at 0.8 V, T/R at 0.8 V
–40
mA
OS
CC
Supply current
mA
pF
C
Driver output capacitance
4.5
O(B)
†
Typical values are at V
CC
= 5 V, T = 25°C.
A
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
electrical characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
SN75ALS057
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
–1.5
1.69
V
V
Input clamp voltage at Dn, En, TE, or RE
Receiver input threshold voltage at Bn
I = –18 mA
V
V
IK
I
1.41
2.4
IT
Bn at 1.2 V, RE at 0.8 V,
= –400 µA
V
OH
High-level output voltage at Rn
Rn
V
I
OH
Bn at 2 V, RE at 0.8 V,
= 16 mA
0.5
1.2
40
I
OL
Dn at 2 V, En at 2 V,
TE at 0.8 V, V = 2 V,
V
OL
Low-level output voltage
Bn
V
0.75
L
R
= 18.5 Ω, See Figure 1
L
Dn, En,
TE, or RE
V = V
I
CC
I
IH
High-level input current
Bn
µA
V = 2 V, V
Dn at 0.8 V, En at 0.8 V,
TE at 0.8 V
= 0 or 5.25 V,
CC
I
100
I
I
I
Low-level input current at Dn, En, TE, or RE
Short-circuit output current at Rn
V = 0.4 V
I
–400
–120
40
µA
IL
Rn at 0, Bn at 1.2 V,
RE at 0.8 V
–40
mA
OS
Supply current
mA
pF
CC
C
Driver output capacitance
4.5
O(B)
†
Typical values are at V
CC
= 5 V, T = 25°C.
A
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
SN75ALS056
DRIVER
FROM
(INPUT) (OUTPUT)
TO
PARAMETER
TEST CONDITIONS
UNIT
†
TYP
MIN
MAX
Propagation delay time,
low-to-high-level output
t
t
24
PLH1
An and T/R at 2 V, V = 2 V,
L
CS
An
Bn
Bn
R 1 = 18 Ω,, C = 30 pF,
ns
L
L
Propagation delay time,
high-to-low-level output
R 2 not connected, See Figure 2
L
20
19
PHL1
CS at 0.8 V, T/R at 2 V,
Propagation delay time,
low-to-high-level output
t
t
t
t
PLH2
PHL2
PLH3
PHL3
V
= 2 V, R 1 = 18 Ω,,
L
L
L
ns
R 2 not connected, C = 30 pF,
See Figure 2,
L
Propagation delay time
high-to-low-level output
18
25
35
V
= 5 V, CS at 0.8 V,
Propagation delay time,
low-to-high-level output
I(An)
R 1 = 18 Ω, C = 30 pF,
L
L
R 2 not connected, V = 2 V,
See Figure 3,
Bn
Bn
ns
ns
T/R
An
L
L
Propagation delay time,
high-to-low-level output
Transition time,
low-to-high-level output
CS at 0.8 V, T/R at 2 V,
= 2 V, C = 30 pF,
t
t
1
1
3
3
11
6
TLH
V
L
L
R 1 = 18 Ω, R 2 not connected,
Transition time,
high-to-low-level output
L
L
THL
See Figure 2
†
Typical values are at V
CC
= 5 V, T = 25°C
A
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
SN75ALS056
RECEIVER
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
Propagation delay time,
low-to-high-level output
t
t
18
18
PLH4
CS at 0.8 V, T/R at 0.8 V, R 1 = 390 Ω,
L
Bn
An
ns
R 2 = 1.6 kΩ, C = 30 pF, See Figure 4
Propagation delay time,
high-to-low-level output
L
L
PHL4
CS at 0.8 V, V
= 2 V, V = 5 V,
L
I(Bn)
L
Output disable time from
low level
t
t
t
t
t
t
t
t
t
T/R
T/R
T/R
T/R
CS
CS
CS
CS
Bn
An
An
An
An
An
An
An
An
An
R 1 = 390 Ω, R 2 not connected,
20
40
17
15
18
15
8
ns
ns
ns
ns
ns
ns
ns
ns
ns
PLZ1
PZL1
PHZ1
PZH1
PLZ2
PZL2
PHZ2
PZH2
w(NR)
L
L
C
= 15 pF, See Figure 3
CS at 0.8 V, V
= 2 V, V = 5 V,
L
I(Bn)
L
Output enable time to
low level
R 1 = 390 Ω, R 2 = 1.6 kΩ,
L
L
C
= 30 pF, See Figure 3
CS at 0.8 V, V
= 0, V = 0,
L
I(Bn)
L
Output disable time from
high level
R 1 = 390 Ω, R 2 not connected,
L
L
C
= 15 pF, See Figure 3
CS at 0.8 V, VI
) = 0, V = 0,
L
(Bn
Output enable time to
high level
R 1 not connected, R 2 = 1.6 kΩ,
L
L
L
C
= 30 pF, See Figure 3
Bn at 2 V, T/R at 0.8 V, C = 5 pF,
L
Output disable time from
low level
V
= 5 V, R 1 = 390 Ω,
L
L
L
R 2 not connected, See Figure 5
Bn at 2 V, T/R at 0.8 V, C = 30 pF,
L
Output enable time to
low level
V
= 5 V, R 1 = 390 Ω, R 2 = 1.6 kΩ,
L L
L
See Figure 5
Bn at 0.8 V, T/R at 0.8 V, C = 5 pF,
L
Output disable time from
high level
V
= 0, R 1 = 390 Ω,
L
L
L
R 2 not connected, See Figure 5
Bn at 0.8 V, T/R at 0.8 V, C = 30 pF,
L
Output enable time to
high level
V
= 0, R 1 not connected,
17
L
L
L
R 2 = 1.6 kΩ, See Figure 5
CS at 0.8 V, T/R at 0.8 V, R 1 = 390 Ω,
L
L
Receiver noise rejection
pulse duration
R 2 = 1.6 kΩ, C = 30 pF, V = 5 V,
3
L
L
See Figure 6
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted)
SN75ALS057
DRIVER
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
UNIT
†
TYP
MIN
MAX
Propagation delay time,
low-to-high-level output
t
t
t
t
t
t
24
PLH1
PHL1
PLH2
PHL2
TLH
Dn, En, RE at 2 V, V = 2 V,
L
Bn
Bn
Bn
ns
TE
R 2 not connected, R 1 = 18 Ω,
L
L
Propagation delay time,
high-to-low-level output
See Figure 2, C = 30 pF
L
20
19
18
11
6
Propagation delay time,
low-to-high-level output
TE at 0.8 V, RE at 2 V,
V
= 2 V, R 1 = 18 Ω,
L
L
L
Dn or En
Dn or En
ns
ns
R 2 not connected,C = 30 pF,
See Figure 2
Propagation delay time,
high-to-low-level output
L
Transition time,
low-to-high-level output
RE at 2 V, V = 2 V,
L
1
1
3
3
TE at 0.8 V, R 1 = 18 Ω,,
L
R 2 not connected, C = 30 pF,
Transition time,
high-to-low-level output
L
L
THL
See Figure 2
†
Typical values are at V
CC
= 5 V, T = 25°C.
A
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
SN75ALS057
RECEIVER
FROM
(INPUT) (OUTPUT)
TO
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
Propagation delay time,
low-to-high-level output
t
t
18
18
PLH4
RE at 0.8 V, TE at 2 V, V = 5 V,
L
Bn
Rn
ns
R 1 = 390 Ω,, R 2 = 1.6 kΩ,, C = 30 pF,
L
L
L
Propagation delay time,
high-to-low-level output
See Figure 4
PHL4
Bn at 2 V, TE at 2 V, V = 5 V,
L
Output disable time
from low level
t
t
t
t
t
Rn
Rn
Rn
Rn
Rn
C
= 5 pF, R 1 = 390 Ω,
18
15
17
17
ns
ns
ns
ns
ns
RE
RE
RE
RE
Bn
PLZ2
PZL2
PHZ2
PZH2
w(NR)
L
L
L
R 2 not connected, See Figure 5
Bn at 2 V, TE at 2 V, V = 5 V,
L
Output enable time to
low level
C
= 30 pF, R 1 = 390 Ω, R 2 = 1.6 kΩ,
L L
L
See Figure 5
Bn at 0.8 V, TE at 2 V, V = 0,
L
Output disable time
from high level
C
= 5 pF, R 1 = 390 Ω,
L
L
L
R 2 not connected, See Figure 5
Bn at 0.8 V, TE at 2 V, V = 0,
L
Output enable time to
high level
C
= 30 pF, R 1 not connected,
L
L
L
R 2 = 1.6 kΩ, See Figure 5
TE at 2 V, RE at 0.8 V, V = 0,
L
Receiver noise
rejection pulse duration
R 1 = 390 Ω, R 2 = 1.6 kΩ, C = 30 pF,
3
L
L
L
See Figure 6
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (continued)
SN75ALS057
DRIVER PLUS
RECEIVER
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
Propagation delay time,
low-to-high-level output
t
t
40
40
PLH6
RE at 0.8 V, TE at 0.8 V, R 1 = 390 Ω,
L
Dn
Rn
ns
R 2 = 1.6 kΩ,, C = 30 pF, See Figure 7
Propagation delay time,
high-to-low-level output
L
L
PHL6
PARAMETER MEASUREMENT INFORMATION
V
L
R 1
L
SN75ALS056
or
SN75ALS057
V
O
(Bn)
Figure 1. Driver Low-Level-Output-Voltage Test Circuit
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
PARAMETER MEASUREMENT INFORMATION
V
L
R 1
L
SN75ALS056
or
V
V
L
I(CS, TE, An, Dn, En)
O
SN75ALS057
(Bn)
R 2
C
(includes jig capacitance)
L
TEST CIRCUIT
1.5 V
3 V
1.5 V
CS, TE
0
t
t
t
t
V
I
PLH1
PHL1
3 V
1.5 V
1.5 V
(An, Dn, En)
0
PHL2
PLH2
V
OH
90%
90%
1.55 V
10%
1.55 V
10%
V
O(Bn)
V
OL
t
t
THL
TLH
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 2. Driver Test Circuit and Voltage Waveforms
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
PARAMETER MEASUREMENT INFORMATION
5 V
390 Ω
V
L
S1
R 1
L
V
I(T/R)
V
SN75ALS056
O
V
(Bn,An)
I(An, Bn)
15 pF
R 2
L
C
(includes jig capacitance)
L
S2
1.6 kΩ
TEST CIRCUIT
V
I(T/R)
3 V
0
1.5 V
1.5 V
PHL3
t
PLH3
t
V
O(Bn)
1.55 V
1.55 V
t
t
PLZ1
PZL1
1.5 V
1.5 V
S1 Closed
S2 Open
V
V
O(An)
0.5 V
t
t
PHZ1
PZH1
0.5 V
S1 Open
S2 Closed
O(An)
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 3. Propagation Delay From T/R to An or Bn Test Circuit and Voltage Waveforms
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
5 V
R 1
L
SN75ALS056
or
SN75ALS057
V
I(Bn)
V
O
(An,Rn)
R 2
L
C
(includes jig capacitance)
L
TEST CIRCUIT
2 V
1 V
V
I(Bn)
1.55 V
1.55 V
t
PLH4
t
PHL4
V
OH
V
1.5 V
1.5 V
O(An, Rn)
V
OL
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 4. Receiver Test Circuit and Voltage Waveforms
V
L
R 1
L
SN75ALS056
or
SN75ALS057
V
O
V
I(CS, RE)
(An,Rn)
R 2
L
C
(includes jig capacitance)
L
TEST CIRCUIT
3 V
0
V
1.5 V
1.5 V
PHZ2
I(CS, RE)
0.5 V
t
t
PZH2
V
O(An, Rn)
1.5 V
t
PLZ2
t
PZL2
0.5 V
V
1.5 V
O(An, Rn)
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 5. Propagation Delay From CS to An or RE to Rn Test Circuit and Voltage Waveforms
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN75ALS056, SN75ALS057
TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS
SLLS028G – AUGUST 1987 – REVISED JUNE 1998
PARAMETER MEASUREMENT INFORMATION
5 V
R 1
L
SN75ALS056
or
SN75ALS057
V
I(Bn)
V
O
(An, Rn)
R 2
L
C
(includes jig capacitance)
L
TEST CIRCUIT
Bus Logic
High Level
1.85 V
1.1 V
2 V
1.55 V
V
1
1.55 V
1.25 V
Bus Logic
Low Level
t
w(NR)
t
w(NR)
t
w
is increased until the output voltage
fall just reaches 2 V.
t
w
is increased until the output voltage rise
just reaches 0.8 V.
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 6. Receiver Noise-Immunity Test Circuit and Voltage Waveforms
5 V
2 V
V
I(Dn)
R 1
L
18 Ω
SN75ALS057
V
O
(Bn)
(Rn)
R 2
L
30 pF
C (includes jig capacitance)
L
TEST CIRCUIT
3 V
0
1.5 V
1.5 V
V
V
I(Dn)
t
t
PLH6
PHL6
1.5 V
1.5 V
O(Rn)
VOLTAGE WAVEFORMS
NOTE A: t = t ≤ 5 ns from 10% to 90%
r
f
Figure 7. Driver Plus Receiver Delay-Times Test Circuits and Voltage Waveforms
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
SN75ALS056DW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
20
20
20
20
20
20
20
20
20
20
20
20
20
20
20
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75ALS056DWG4
SN75ALS056DWR
SN75ALS056DWRE4
SN75ALS056DWRG4
SN75ALS056N
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
DW
DW
DW
DW
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75ALS056NE4
SN75ALS057DW
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
DW
DW
DW
DW
DW
DW
N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75ALS057DWE4
SN75ALS057DWG4
SN75ALS057DWR
SN75ALS057DWRE4
SN75ALS057DWRG4
SN75ALS057N
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75ALS057NE4
N
20
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jan-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN75ALS056DWR
SN75ALS057DWR
SOIC
SOIC
DW
DW
20
20
2000
2000
330.0
330.0
24.4
24.4
10.8
10.8
13.3
13.3
2.7
2.7
12.0
12.0
24.0
24.0
Q1
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
3-Jan-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN75ALS056DWR
SN75ALS057DWR
SOIC
SOIC
DW
DW
20
20
2000
2000
367.0
367.0
367.0
367.0
45.0
45.0
Pack Materials-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale
supplied at the time of order acknowledgment.
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily
performed.
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide
adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information
published by TI regarding third-party products or services does not constitute a license to use such products or services or a warranty or
endorsement thereof. Use of such information may require a license from a third party under the patents or other intellectual property of the
third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of significant portions of TI information in TI data books or data sheets is permissible only if reproduction is without alteration
and is accompanied by all associated warranties, conditions, limitations, and notices. TI is not responsible or liable for such altered
documentation. Information of third parties may be subject to additional restrictions.
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.
TI is not responsible or liable for any such statements.
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements
concerning its products, and any use of TI components in its applications, notwithstanding any applications-related information or support
that may be provided by TI. Buyer represents and agrees that it has all the necessary expertise to create and implement safeguards which
anticipate dangerous consequences of failures, monitor failures and their consequences, lessen the likelihood of failures that might cause
harm and take appropriate remedial actions. Buyer will fully indemnify TI and its representatives against any damages arising out of the use
of any TI components in safety-critical applications.
In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to
help enable customers to design and create their own end-product solutions that meet applicable functional safety standards and
requirements. Nonetheless, such components are subject to these terms.
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties
have executed a special agreement specifically governing such use.
Only those TI components which TI has specifically designated as military grade or “enhanced plastic” are designed and intended for use in
military/aerospace applications or environments. Buyer acknowledges and agrees that any military or aerospace use of TI components
which have not been so designated is solely at the Buyer's risk, and that Buyer is solely responsible for compliance with all legal and
regulatory requirements in connection with such use.
TI has specifically designated certain components as meeting ISO/TS16949 requirements, mainly for automotive use. In any case of use of
non-designated products, TI will not be responsible for any failure to meet ISO/TS16949.
Products
Applications
Audio
www.ti.com/audio
amplifier.ti.com
dataconverter.ti.com
www.dlp.com
Automotive and Transportation www.ti.com/automotive
Communications and Telecom www.ti.com/communications
Amplifiers
Data Converters
DLP® Products
DSP
Computers and Peripherals
Consumer Electronics
Energy and Lighting
Industrial
www.ti.com/computers
www.ti.com/consumer-apps
www.ti.com/energy
dsp.ti.com
Clocks and Timers
Interface
www.ti.com/clocks
interface.ti.com
logic.ti.com
www.ti.com/industrial
www.ti.com/medical
Medical
Logic
Security
www.ti.com/security
Power Mgmt
Microcontrollers
RFID
power.ti.com
Space, Avionics and Defense
Video and Imaging
www.ti.com/space-avionics-defense
www.ti.com/video
microcontroller.ti.com
www.ti-rfid.com
www.ti.com/omap
OMAP Applications Processors
Wireless Connectivity
TI E2E Community
e2e.ti.com
www.ti.com/wirelessconnectivity
Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265
Copyright © 2013, Texas Instruments Incorporated
相关型号:
UL1042
UL1042 - Uk砤d zr體nowa縪nego mieszacza iloczynowegoWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV201
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14
IC-SM-VIDEO AMPWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14TA
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
ZXFV201N14TC
QUAD VIDEO AMPLIFIERWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
Warning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV302N16
IC-SM-4:1 MUX SWITCHWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ETC
ZXFV4089
VIDEO AMPLIFIER WITH DC RESTORATIONWarning: Undefined variable $rtag in /www/wwwroot/website_ic37/www.icpdf.com/pdf/pdf/index.php on line 217
-
ZETEX
©2020 ICPDF网 联系我们和版权申明