SN75ALS1177N-00 [TI]

LINE TRANSCEIVER, PDIP16;
SN75ALS1177N-00
型号: SN75ALS1177N-00
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LINE TRANSCEIVER, PDIP16

驱动 光电二极管 接口集成电路 驱动器
文件: 总16页 (文件大小:508K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B – MARCH 1993 – REVISED FEBRUARY 2001  
SN75ALS1177 . . . N OR NS PACKAGE  
(TOP VIEW)  
Meet or Exceed Standards TIA/EIA-422-B  
and TIA/EIA-485-A  
Designed for Multipoint Bus Transmission  
on Long Bus Lines in Noisy Environments  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
1B  
1A  
V
CC  
1D  
1Y  
1Z  
DE  
2Z  
2Y  
2D  
Low Supply-Current Requirement  
50 mA Max  
1R  
RE  
2R  
Driver Positive- and Negative-Current  
Limiting  
2A  
2B  
Driver Common-Mode Output Voltage  
Range of –7 V to 12 V  
GND  
Thermal Shutdown Protection  
SN75ALS1178 . . . N OR NS PACKAGE  
(TOP VIEW)  
Driver 3-State Outputs Active-High Enable  
Receiver Common-Mode Input Voltage  
Range of –12 V to 12 V  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
11  
10  
9
V
CC  
1B  
1A  
Receiver Input Sensitivity . . . ±200 mV  
1D  
1Y  
1Z  
Receiver Hysteresis . . . 50 mV Typ  
1R  
1DE  
2R  
Receiver High Input  
Impedance . . . 12 kMin  
2DE  
2Z  
2A  
Receiver 3-State Outputs Active-Low  
Enable for SN75ALS1177 Only  
2Y  
2D  
2B  
GND  
Operate From Single 5-V Supply  
description  
The SN75ALS1177 and SN75ALS1178 dual differential drivers and receivers are integrated circuits designed  
for bidirectional data communication on multipoint bus transmission lines. They are designed for balanced  
transmission lines and meet standards TIA/EIA-422-B and TIA/EIA-485-A.  
The SN75ALS1177 combines dual 3-state differential line drivers and dual 3-state differential input line  
receivers, both of which operate from a single 5-V power supply. The drivers and receivers have active-high  
and active-low enables, respectively, which can be externally connected together to function as direction  
control. The SN75ALS1178 drivers each have an individual active-high enable. Fail-safe design ensures that  
when the receiver inputs are open, the receiver outputs are always high.  
The SN75ALS1177 and SN75ALS1178 are characterized for operation from 0°C to 70°C.  
AVAILABLE OPTIONS  
PACKAGED DEVICES  
PLASTIC  
DIP  
PLASTIC  
SMALL OUTLINE  
(NS)  
T
A
(N)  
SN75ALS1177N  
SN75ALS1178N  
SN75ALS1177NSR  
SN75ALS1178NSR  
0°C to 70°C  
The NS package is only available taped and reeled. Add the  
suffix R to the device type (e.g., SN75ALS1177NSR).  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
Function Tables  
SN75ALS1177, SN75ALS1178  
(each driver)  
OUTPUTS  
INPUT  
D
ENABLE  
DE  
Y
H
L
Z
L
H
L
H
H
L
H
Z
X
Z
SN75ALS1177  
(each receiver)  
DIFFERENTIAL  
ENABLE OUTPUT  
AB  
RE  
Y
H
?
V
0.2 V  
L
ID  
0.2 V < V < 0.2 V  
L
ID  
V
ID  
0.2 V  
L
L
X
H
L
Z
H
Open  
SN75ALS1178  
(each receiver)  
DIFFERENTIAL  
OUTPUT  
AB  
Y
V
0.2 V  
H
ID  
0.2 V < V < 0.2 V  
?
ID  
0.2 V  
V
L
H
ID  
Open  
High level,  
H
=
L
=
Low level,  
? = Indeterminate, X = Irrelevant,  
Z = High impedance (off)  
logic symbol  
SN75ALS1177  
EN1  
SN75ALS1178  
EN  
12  
4
1DE  
15  
14  
13  
DE  
1Y  
1Z  
1A  
1B  
4
EN2  
1D  
RE  
2
1
3
14  
13  
2
1R  
15  
1
1
1Y  
1Z  
1D  
12  
9
10  
11  
6
2DE  
2D  
EN  
2Y  
2Z  
1A  
1B  
3
1
1R  
2
2
2A  
2B  
10  
11  
5
7
9
2Y  
2Z  
2R  
1
1
2D  
6
7
2A  
2B  
5
2R  
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
logic diagram (positive logic)  
SN75ALS1177  
SN75ALS1178  
4
1DE  
12  
4
DE  
RE  
14  
1Y  
1Z  
15  
1D  
13  
2
1A  
1B  
3
14  
13  
1R  
2DE  
2D  
1Y  
1Z  
1
15  
3
1D  
1R  
2D  
2R  
12  
9
10  
11  
6
2
1
2Y  
2Z  
1A  
1B  
2A  
2B  
5
10  
11  
2R  
2Y  
2Z  
7
9
6
7
2A  
2B  
5
equivalent schematics  
EQUIVALENT OF DRIVER OR ENABLE INPUT  
EQUIVALENT OF RECEIVER INPUT  
V
CC  
V
CC  
35 kNOM  
Input  
1.7 kΩ  
NOM  
17 kΩ  
NOM  
Input  
288 kΩ  
NOM  
1.7 kΩ  
NOM  
V
(A)  
CC  
or  
GND (B)  
GND  
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
schematics of outputs  
TYPICAL OF DRIVER OUTPUTS  
TYPICAL OF RECEIVER OUTPUTS  
V
CC  
V
CC  
70 NOM  
Output  
Output  
GND  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V (DE, RE, and D inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Output voltage range, V (driver) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 V to 14 V  
O
Input voltage range, receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V to 14 V  
Receiver differential-input voltage range (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 V to 14 V  
Receiver low-level output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Package thermal impedance, θ (see Note 3): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W  
JA  
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
stg  
Stresses beyond those listed under absolute maximum ratingsmay cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditionsis not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values, except differential input voltage, are with respect to the network ground terminal.  
2. Differential input voltage is measured at the noninverting terminal with respect to the inverting terminal.  
3. The package thermal impedance is calculated in accordance with JESD 51-7.  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
recommended operating conditions  
MIN NOM  
4.75 5  
MAX  
5.25  
±12  
12  
UNIT  
V
V
V
V
V
V
V
Supply voltage  
CC  
Differential input voltage  
Common-mode output voltage  
Common-mode input voltage  
High-level input voltage  
Low-level input voltage  
Receiver  
Driver  
V
ID  
7  
V
OC  
IC  
Receiver  
DE, RE, D  
DE, RE, D  
Driver  
±12  
V
2
V
IH  
0.8  
60  
400  
60  
V
IL  
mA  
µA  
I
High-level output current  
OH  
Receiver  
Driver  
I
Low-level output current  
mA  
OL  
Receiver  
8
T
A
Operating free-air temperature  
0
70  
°C  
The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode  
output and threshold voltage level only.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
DRIVER SECTION  
electrical characteristics over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
UNIT  
V
V
V
Input clamp voltage  
I = 18 mA  
1.5  
V
V
V
V
IK  
I
High-level output voltage  
Low-level output voltage  
Differential output voltage  
V
= 2 V,  
= 2 V,  
V
V
= 0.8 V,  
= 0.8 V,  
I
I
= 33 mA  
3.3  
1.1  
OH  
OL  
IH  
IH  
IL  
OH  
V
= 33 mA  
IL  
OL  
|V  
|V  
|V  
|
|
|
I
O
= 0  
1.5  
6
OD1  
OD2  
OD3  
1/2 V  
OD1  
V
CC  
= 5 V,  
R
= 100 ,  
L
See Figure 1  
or 2  
Differential output voltage  
Differential output voltage  
V
R
= 54 ,  
See Figure 1  
1.5  
1.5  
2.5  
5
5
L
See Note 4  
V
V
V
Change in magnitude of  
differential output voltage (see Note 5)  
|V  
|
R
R
= 54 or 100 ,  
See Figure 1  
See Figure 1  
±0.2  
OD  
L
L
§
1  
V
OC  
Common-mode output voltage  
= 54 or 100 ,  
= 54 or 100 ,  
3
Change in magnitude of  
common-mode output voltage  
(see Note 5)  
|V  
|
R
See Figure 1  
±0.2  
V
OC  
L
I
I
I
I
Output current with power off  
High-impedance-state output current  
High-level input current  
V
V
V
V
V
V
V
V
= 0,  
V = 7 V to 12 V  
O
±100  
±100  
100  
100  
250  
250  
250  
150  
50  
µA  
µA  
µA  
µA  
O(OFF)  
CC  
= 7 V to 12 V  
= 2.7 V  
OZ  
O
IH  
IL  
O
O
O
O
IH  
Low-level input current  
= 0.4 V  
IL  
= 7 V  
= V  
CC  
I
I
Short-circuit output current  
mA  
mA  
OS  
CC  
= 12 V  
= 0 V  
Outputs enabled  
Outputs disabled  
35  
20  
Supply current (total package)  
No load  
50  
§
All typical values are at V  
= 5 V and T = 25°C.  
A
CC  
with a 100-load is either 1/2 V  
The minimum V  
or 2 V, whichever is greater.  
OD2  
OD1  
The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode  
output and threshold voltage levels only.  
NOTES: 4. See TIA/EIA-485-A Figure 3.5, test termination measurement 2.  
5. |V | and |V | are the changes in magnitude of V and V , respectively, that occur when the input is changed from a high  
OC  
OD  
OC  
OD  
level to a low level.  
switching characteristics at V  
= 5 V, T = 25°C (unless otherwise noted)  
CC  
A
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX  
UNIT  
R
= 60 , C = C = 100 pF,  
L1 L2  
L
t
t
t
Propagation delay time, high- to low-level output  
9
15  
22  
ns  
PLH  
PHL  
sk  
See Figure 3  
R
= 60 , C = C = 100 pF,  
L1 L2  
L
Propagation delay time, low- to high-level output  
Output-to-output skew  
9
0
15  
2
22  
8
ns  
ns  
See Figure 3  
R
= 60 , C = C = 100 pF,  
L1 L2  
L
See Figure 3  
t
t
t
t
Output enable time to high level  
Output enable time to low level  
Output disable time from high level  
Output disable time from low level  
C
C
C
C
= 100 pF,  
= 100 pF,  
= 15 pF,  
= 15 pF,  
See Figure 4  
See Figure 5  
See Figure 4  
See Figure 5  
30  
5
35  
15  
15  
15  
50  
25  
30  
30  
ns  
ns  
ns  
ns  
PZH  
PZL  
PHZ  
PLZ  
L
L
L
L
7
7
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
RECEIVER SECTION  
electrical characteristics over recommended ranges of common-mode input voltage, supply  
voltage, and operating free-air temperature (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
UNIT  
V
V
IT+  
V
IT–  
V
hys  
V
IK  
Positive-going input threshold voltage  
Negative-going input threshold voltage  
V
V
= 2.7 V,  
= 0.5 V,  
I
I
= 0.4 mA  
0.2  
O
O
0.2  
= 8 mA  
V
O
O
Input hysteresis voltage (V  
IT+  
V  
)
50  
mV  
V
IT–  
Enable input clamp voltage  
SN75ALS1177 I = 18 mA  
1.5  
I
V
= 200 mV, I  
= 400 µA,  
ID  
See Figure 2  
OH  
V
OH  
V
OL  
High-level output voltage  
2.7  
V
V
= 200 mV, I  
= 8 mA,  
ID  
See Figure 2  
OL  
Low-level output voltage  
0.45  
V
I
High-impedance-state output current  
Line input current (see Note 6)  
SN75ALS1177  
V
= 0.4 V to 2.4 V  
±20  
1
µA  
OZ  
O
V = 12 V  
I
I
I
Other input at 0 V  
mA  
V = 7 V  
I
0.8  
20  
I
I
High-level input current, RE  
Low-level input current, RE  
Input resistance  
SN75ALS1177  
SN75ALS1177  
V
V
= 2.7 V  
= 0.4 V  
µA  
µA  
IH  
IH  
100  
IL  
IL  
r
12  
kΩ  
mA  
mA  
i
I
I
Short-circuit output current  
Supply current (total package)  
V
O
= 0 V,  
See Note 7  
15  
85  
OS  
No load,  
Outputs enabled  
35  
50  
CC  
All typical values are at V  
= 5 V and T = 25°C.  
A
CC  
The algebraic convention, where the less positive (more negative) limit is designated as minimum, is used in this data sheet for common-mode  
output and threshold voltage levels only.  
NOTES: 6. Refer to TIA/EIA-422-B, TIA/EIA-423-A, and TIA/EIA-485-A for exact conditions.  
7. Not more than one output should be shorted at a time.  
switching characteristics at V  
= 5 V, T = 25°C (unless otherwise noted)  
CC  
A
PARAMETER  
TEST CONDITIONS  
MIN  
15  
15  
10  
10  
3.5  
5
TYP  
25  
MAX  
37  
UNIT  
ns  
t
t
t
t
t
t
Propagation delay time, low- to high-level output  
Propagation delay time, high- to low-level output  
C
C
C
C
C
C
= 15 pF,  
= 15 pF,  
= 100 pF,  
= 100 pF,  
= 15 pF,  
= 15 pF,  
See Figure 6  
See Figure 6  
See Figure 7  
See Figure 7  
See Figure 7  
See Figure 7  
PLH  
PHL  
PZH  
PZL  
PHZ  
PLZ  
L
L
L
L
L
L
25  
37  
ns  
Output enable time to high level  
Output enable time to low level  
Output disable time from high level  
Output disable time from low level  
SN75ALS1177  
20  
30  
ns  
SN75ALS1177  
SN75ALS1177  
SN75ALS1177  
20  
30  
ns  
12  
16  
ns  
12  
16  
ns  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
PARAMETER MEASUREMENT INFORMATION  
V
ID  
RL  
2
I
OH  
V
OH  
V
OD2  
V
OL  
I
OL  
RL  
2
V
OC  
Figure 1. Driver Test Circuit, V  
and V  
Figure 2. Receiver Test Circuit, V  
and V  
OD  
OC  
OH OL  
3 V  
0 V  
Driver  
Input  
1.5 V  
1.5 V  
C
= 100 pF  
L1  
(see Note A)  
t
t
PHL  
PLH  
O
1/2 V  
O
1/2 V  
60 Ω  
Generator  
(see Note B)  
Z Output  
50 Ω  
C
= 100 pF  
L2  
(see Note A)  
V
O
Y Output  
t
t
sk  
sk  
3 V  
DRIVER TEST CIRCUIT  
C includes probe and jig capacitance.  
L
DRIVER VOLTAGE WAVEFORMS  
NOTES: A.  
B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, t 10 ns, t 10 ns.  
r
f
Figure 3. Driver Propagation Delay Times  
Output  
S1  
3 V  
0 V  
3 V or 0 V  
Input  
1.5 V  
1.5 V  
C
R
= 500 Ω  
L
L
t
t
PHZ  
PZH  
(see Note A)  
Generator  
(see Note B)  
V
OH  
50 Ω  
Output  
2.3 V  
0 V  
0.5 V  
DRIVER TEST CIRCUIT  
DRIVER VOLTAGE WAVEFORMS  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, t 10 ns, t 10 ns.  
r
f
Figure 4. Driver Enable and Disable Times  
8
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
PARAMETER MEASUREMENT INFORMATION  
V
CC  
R
= 500 Ω  
L
S1  
3 V  
0 V  
Output  
1.5 V  
1.5 V  
Input  
3 V or 0 V  
C
L
t
t
PLZ  
PZL  
(see Note A)  
0.5 V  
Generator  
(see Note B)  
50 Ω  
0 V  
2.3 V  
Output  
V
OL  
DRIVER TEST CIRCUIT  
C includes probe and jig capacitance.  
L
DRIVER VOLTAGE WAVEFORMS  
NOTES: A.  
B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, t 10 ns, t 10 ns.  
r
f
Figure 5. Driver Enable and Disable Times  
Output  
Generator  
(see Note B)  
1 kΩ  
50 Ω  
V
CC  
0 V  
C
L
(see Note A)  
1N916 or  
Equivalent  
1 kΩ  
0 V  
(SN75ALS1177 only)  
RECEIVER TEST CIRCUIT  
2.5 V  
2.5 V  
0 V  
0 V  
Input  
t
t
PLH  
PHL  
V
V
OH  
1.5 V  
1.5 V  
Output  
OL  
DRIVER VOLTAGE WAVEFORMS  
NOTES: A.  
C
includes probe and jig capacitance.  
L
B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, t 10 ns, t 10 ns.  
r
f
Figure 6. Receiver Propagation Delay Times  
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN75ALS1177, SN75ALS1178  
DUAL DIFFERENTIAL DRIVERS AND RECEIVERS  
SLLS154B MARCH 1993 REVISED FEBRUARY 2001  
PARAMETER MEASUREMENT INFORMATION  
S1  
Output  
1.5 V  
S2  
1 kΩ  
V
CC  
1.5 V  
C
L
(see Note A)  
1N916 or  
1 kΩ  
Equivalent  
Generator  
(see Note B)  
50 Ω  
S3  
RECEIVER TEST CIRCUIT  
3 V  
0 V  
1.5 V  
1.5 V  
Input  
S1 to 1.5 V  
S1 to 1.5 V  
t
t
S2 Closed  
S3 Closed  
S2 Closed  
S3 Closed  
PZL  
PLZ  
0.5 V  
5 V  
1.5 V  
V
OL  
S1 to 1.5 V  
S2 Open  
S3 Closed  
Output  
t
PZH  
V
OH  
1.5 V  
S1 to 1.5 V  
S2 Open  
S3 Closed  
0 V  
t
PHZ  
0.5 V  
RECEIVER VOLTAGE WAVEFORMS  
C includes probe and jig capacitance.  
L
NOTES: A.  
B. The pulse generator has the following characteristics: PRR 1 MHz, 50% duty cycle, t 10 ns, t 10 ns.  
r
f
Figure 7. Receiver Output Enable and Disable Times  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
4-Jun-2007  
PACKAGING INFORMATION  
Orderable Device  
SN75ALS1177N  
Status (1)  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
PDIP  
N
16  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN75ALS1177NE4  
PDIP  
N
16  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN75ALS1177NSLE  
SN75ALS1177NSR  
OBSOLETE  
ACTIVE  
SO  
SO  
NS  
NS  
16  
16  
TBD  
Call TI  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN75ALS1177NSRE4  
SN75ALS1177NSRG4  
SN75ALS1178N  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
SO  
SO  
NS  
NS  
N
16  
16  
16  
16  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
PDIP  
PDIP  
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN75ALS1178NE4  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN75ALS1178NSLE  
SN75ALS1178NSR  
OBSOLETE  
ACTIVE  
SO  
SO  
NS  
NS  
16  
16  
TBD  
Call TI  
Call TI  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN75ALS1178NSRG4  
ACTIVE  
SO  
NS  
16  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0 (mm)  
B0 (mm)  
K0 (mm)  
P1  
W
Pin1  
Diameter Width  
(mm) W1 (mm)  
(mm) (mm) Quadrant  
SN75ALS1177NSR  
SN75ALS1178NSR  
SO  
SO  
NS  
NS  
16  
16  
2000  
2000  
330.0  
330.0  
16.4  
16.4  
8.2  
8.2  
10.5  
10.5  
2.5  
2.5  
12.0  
12.0  
16.0  
16.0  
Q1  
Q1  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
11-Mar-2008  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN75ALS1177NSR  
SN75ALS1178NSR  
SO  
SO  
NS  
NS  
16  
16  
2000  
2000  
346.0  
346.0  
346.0  
346.0  
33.0  
33.0  
Pack Materials-Page 2  
IMPORTANT NOTICE  
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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard  
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