SN75HVD05_技术文档

SN65HVD05,SN65HVD06,SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

HIGH OUTPUT RS-485 TRANSCEIVERS

FEATURES

DESCRIPTION

D

Minimum Differential Output Voltage of 2.5 V

Into a 54-Ω Load

The SN65HVD05, SN75HVD05, SN65HVD06,

SN75HVD06, SN65HVD07, andSN75HVD07combine

a 3-state differential line driver and differential line

receiver. They are designed for balanced data

Open-Circuit, Short-Circuit, and Idle-Bus

Failsafe Receiver

th

transmission

and

interoperate

with

ANSI

1/8 Unit-Load Option Available (Up to 256

TIA/EIA-485-A and ISO 8482E standard-compliant

devices. The driver is designed to provide a differential

output voltage greater than that required by these

standards for increased noise margin. The drivers and

receivers have active-high and active-low enables

respectively, which can be externally connected

together to function as direction control.

Nodes on the Bus)

Bus-Pin ESD Protection Exceeds 16 kV HBM

Driver Output Slew Rate Control Options

Electrically Compatible With ANSI

TIA/EIA-485-A Standard

D

Low-Current Standby Mode . . . 1 µA Typical

D

Glitch-Free Power-Up and Power-Down

Protection for Hot-Plugging Applications

The driver differential outputs and receiver differential

inputs connect internally to form a differential input/

output (I/O) bus port that is designed to offer minimum

loadingto the bus whenever the driver is disabled or not

powered. These devices feature wide positive and

negative common-mode voltage ranges, making them

suitable for party-line applications.

D

Pin Compatible With Industry Standard

SN75176

APPLICATIONS

D

Data Transmission Over Long or Lossy Lines

or Electrically Noisy Environments

D OR P PACKAGE

(TOP VIEW)

Profibus Line Interface

Industrial Process Control Networks

Point-of-Sale (POS) Networks

Electric Utility Metering

Building Automation

R

RE

DE

D

V

B

A

1

2

3

4

8

7

6

5

CC

GND

Digital Motor Control

DIFFERENTIAL OUTPUT VOLTAGE

vs

LOGIC DIAGRAM

(POSITIVE LOGIC)

DIFFERENTIAL OUTPUT CURRENT

5

T

= 25°C

A

4.5

4

DE at V

CC

1

D at V

CC

= 5 V

60 Ω Load

Line

R

V

CC

3.5

30 Ω Load

Line

2

3

RE

2.5

2

3

4

DE

D

1.5

6

7

A

B

1

0.5

0

20

40

60

80

100

120

I

– Differential Output Current – mA

OD

Pleasebe aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments

semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products

conform to specifications per the terms of Texas Instruments standard warranty.

Production processing does not necessarily include testing of all parameters.

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

Thesedeviceshavelimitedbuilt-inESDprotection.Theleadsshouldbeshortedtogetherorthedeviceplacedinconductivefoamduring

storageor handling to prevent electrostatic damage to the MOS gates.

(1)

ORDERING INFORMATION

MARKED AS

DRIVER

OUTPUT SLOPE

CONTROL

PLASTIC

SIGNALING

RATE

UNIT

LOAD

SMALL OUTLINE

IC (SOIC)

(2)

PART NUMBER

T

A

DUAL-IN-LINE

PACKAGE

(PDIP)

PACKAGE

40 Mbps

10 Mbps

1 Mbps

1/2

1/8

1/2

1/8

No

Yes

No

SN65HVD05D SN65HVD05P

SN65HVD06D SN65HVD06P

SN65HVD07D SN65HVD07P

SN75HVD05D SN75HVD05P

SN75HVD06D SN75HVD06P

SN75HVD07D SN75HVD07P

65HVD05

65HVD06

65HVD07

75HVD05

75HVD06

75HVD07

VP05

VP06

VP07

VN05

VN06

VN07

–40°C to 85°C

–0°C to 70°C

40 Mbps

10 Mbps

1 Mbps

Yes

(1)

(2)

For the most current specification and package information, refer to our web site at www.ti.com.

The D package is available taped and reeled. Add an R suffix to the device type (i.e., SN65HVD05DR).

PACKAGE DISSIPATION RATINGS (SEE FIGURE 12 AND FIGURE 13)

(1)

DERATING FACTOR

T

≤ 25°C

T

= 70°C

T = 85°C POWER

A

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING

RATING

A

(2)

(3)

D

710 mW

5.7 mW/°C

10.3 mW/°C

8.0 mW/°C

455 mW

369 mW

667 mW

520 mW

D

1282 mW

821 mW

P

1000 mW

640 mW

(1)

(2)

(3)

This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.

Tested in accordance with the Low-K thermal metric definitions of EIA/JESD51-3

Tested in accordance with the High-K thermal metric definitions of EIA/JESD51-7

ABSOLUTE MAXIMUM RATINGS

overoperating free-air temperature range unless otherwise noted

(1) (2)

SN65HVD05, SN65HVD06, SN65HVD07

SN75HVD05, SN75HVD06, SN75HVD07

Supply voltage range, V

Voltage range at A or B

–0.3 V to 6 V

–9 V to 14 V

CC

Input voltage range at D, DE, R or RE

–0.5 V to V + 0.5 V

CC

Voltage input range, transient pulse, A and B, through 100 Ω (see Figure 11)

–50 V to 50 V

A, B, and GND

16 kV

(3)

Human body model

All pins

4 kV

1 kV

Electrostaticdischarge

(4)

Charged-devicemodel

Continuoustotalpowerdissipation

See Dissipation Rating Table

–65°C to 150°C

260°C

Storage temperature range, T

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds

(1)

Stressesbeyondthoselistedunder“absolutemaximumratings”maycausepermanentdamagetothedevice. Thesearestressratingsonly,and

functionaloperation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied.Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.

Tested in accordance with JEDEC Standard 22, Test Method A114-A.

(2)

(3)

(4)

Tested in accordance with JEDEC Standard 22, Test Method C101.

2

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

RECOMMENDED OPERATING CONDITIONS

MIN NOM

MAX UNIT

Supply voltage, V

4.5

5.5

12

V

CC

Voltage at any bus terminal (separately or common mode) V or V

(1)

–7

I

IC

High-level input voltage, V

IH

D, DE, RE

2

Low-level input voltage, V

IL

D, DE, RE

0.8

12

Differential input voltage, V (see Figure 7)

ID

–12

–100

–8

Driver

High-level output current, I

mA

OH

Receiver

Driver

100

8

Low-level output current, I

OL

Receiver

SN65HVD05

SN65HVD06

SN65HVD07

SN75HVD05

SN75HVD06

SN75HVD07

–40

85

70

°C

Operatingfree-airtemperature, T

A

0

(1)

The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

DRIVER ELECTRICAL CHARACTERISTICS

overoperating free-air temperature range unless otherwise noted

(1)

MIN TYP

PARAMETER

TEST CONDITIONS

MAX

UNIT

V

IK

Input clamp voltage

I = –18 mA

I

–1.5

V

No Load

V

CC

R

= 54 Ω, See Figure 1

2.5

2.2

|V

|

Differentialoutputvoltage

V

L

OD

V

test

= –7 V to 12 V, See Figure 2

Change in magnitude of differential

outputvoltage

∆|V

|

See Figure 1 and Figure 2

See Figure 3

–0.2

2.2

0.2

3.3

0.1

V

OD

Steady-statecommon-modeoutput

voltage

V

OC(SS)

Change in steady-state

common-modeoutputvoltage

∆V

–0.1

OC(SS)

HVD05

600

500

900

Peak-to-peakcommon-

modeoutputvoltage

HVD06

V

See Figure 3

mV

OC(PP)

HVD07

I

High-impedanceoutputcurrent

See receiver input currents

OZ

D

–100

0

Inputcurrent

DE

µA

I

100

250

Short-circuitoutputcurrent

–7 V ≤ V ≤ 12 V

–250

mA

pF

OS

O

C

Differentialoutputcapacitance

V

= 0.4 sin (4E6πt) + 0.5 V, DE at 0 V

16

9

(diff)

ID

RE at V

,

Receiver disabled and

CC

15

5

mA

D & DE at V , No load driverenabled

CC

Receiver disabled and

driverdisabled

(standby)

RE at V , D at V

DE at 0 V, No load

CC

1

9

µA

I

Supplycurrent

CC

RE at 0 V,

Receiver enabled and

15

mA

D & DE at V , No load driverenabled

CC

(1)

All typical values are at 25°C and with a 5-V supply.

3

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

DRIVER SWITCHING CHARACTERISTICS NIL

overoperating free-air temperature range unless otherwise noted

TEST

CONDITIONS

(1)

MIN TYP

PARAMETER

MAX

UNIT

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

6.5

27

11

40

t

Propagationdelaytime,low-to-high-leveloutput

Propagationdelaytime,high-to-low-leveloutput

Differential output signal rise time

ns

PLH

PHL

r

250

6.5

27

400

11

40

250

3.6

28

400

6

2.7

18

R

C

= 54 Ω,

= 50 pF,

L

55

See Figure 4

150

2.7

18

300

3.6

28

450

6

55

Differential output signal fall time

f

150

300

450

2

2.5

10

Pulse skew (|t

– t |)

PHL PLH

sk(p)

sk(pp)

PZH1

PHZ

PZL1

PLZ

3.5

14

(2)

Part-to-partskew

100

25

45

Propagationdelaytime,high-impedance-to-high-leveloutput

Propagationdelaytime,high-level-to-high-impedanceoutput

Propagationdelaytime,high-impedance-to-low-leveloutput

Propagationdelaytime,low-level-to-high-impedanceoutput

RE at 0 V,

= 110 Ω,

250

25

R

L

See Figure 5

60

250

15

45

RE at 0 V,

200

14

R

L

= 110 Ω,

See Figure 6

90

550

R

= 110 Ω,

L

t

Propagationdelaytime,standby-to-high-leveloutput

Propagationdelaytime,standby-to-low-leveloutput

RE at 3 V,

6

µs

PZH2

See Figure 5

R

= 110 Ω,

L

RE at 3 V,

PZL2

See Figure 6

(1)

(2)

All typical values are at 25°C and with a 5-V supply.

is the magnitude of the differenceinpropagation delay times between any specified terminals of two devices when both devices operate

t

sk(pp)

with the same supply voltages, at the same temperature, and have identical packages and test circuits.

4

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

RECEIVER ELECTRICAL CHARACTERISTICS

overoperating free-air temperature range unless otherwise noted

(1)

MIN TYP

PARAMETER

TEST CONDITIONS

MAX

UNIT

Positive-goinginputthreshold

voltage

V

I

= –8 mA

–0.01

V

IT+

O

Negative-goinginputthreshold

voltage

= 8 mA

–0.2

V

IT–

O

V

Hysteresis voltage (V

IT+

– V

)

IT–

35

mV

V

hys

IK

Enable-inputclampvoltage

High-leveloutputvoltage

Low-leveloutputvoltage

I = –18 mA

–1.5

I

V

= 200 mV,

I

= –8 mA,

See Figure 7

4

V

OH

OL

ID

OH

OL

V

= –200 mV,

= 8 mA,

0.4

1

V

High-impedance-state output

current

I

V

O

= 0 or V

RE at V

–1

µA

OZ

CC

V

or V = 12 V

0.23

0.3

0.5

A

B

V

A

V

A

V

A

V

A

V

A

V

A

V

A

or V = 12 V,

V

CC

V

CC

V

CC

V

CC

= 0 V

Otherinput

at 0 V

B

HVD05

mA

or V = –7 V

–0.4

–0.13

–0.15

0.06

B

or V = –7 V,

B

I

Bus input current

or V = 12 V

0.1

B

or V = 12 V,

0.08

0.13

HVD06,

HVD07

Otherinput

at 0 V

B

mA

or V = –7 V

–0.1

–0.05

–60

–0.05

–0.03

–26.4

–27.4

16

B

or V = –7 V,

B

I

High-level input current, RE

Low-level input current, RE

Differentialinputcapacitance

V

= 2 V

µA

pF

IH

= 0.8 V

–60

IL

C

V = 0.4 sin (4E6πt) + 0.5 V,

DE at 0 V

(diff)

I

RE at 0 V,

D & DE at 0 V,

No load

Receiver enabled and driver disabled

5

1

9

10

5

mA

RE at V

,

CC

DE at 0 V,

D at V

Receiverdisabled and driver disabled

(standby)

µA

I

Supplycurrent

CC

,

CC

No load

RE at 0 V,

D & DE at V

No load

,

Receiver enabled and driver enabled

15

mA

CC

(1)

All typical values are at 25°C and with a 5-V supply.

5

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

RECEIVER SWITCHING CHARACTERISTICS

overoperating free-air temperature range unless otherwise noted

(1)

MIN TYP

PARAMETER

TEST CONDITIONS

MAX

25

70

2

UNIT

t

Propagation delay time, low-to-high-level output 1/2 UL

Propagation delay time, high-to-low-level output 1/2 UL

HVD05

HVD06

HVD07

HVD06

HVD07

HVD05

HVD06

HVD07

HVD05

HVD06

HVD07

14.6

55

ns

PLH

PHL

t

Propagation delay time, low-to-high-level output 1/8 UL

Propagation delay time, high-to-low-level output 1/8 UL

ns

PLH

PHL

55

V

C

= –1.5 V to 1.5 V,

= 15 pF,

ID

L

55

t

See Figure 8

55

4.5

6.5

14

3

t

Pulse skew (|t

– t

|)

ns

sk(p)

PHL PLH

(2)

t

Part-to-partskew

ns

sk(pp)

t

Output signal rise time

Output signal fall time

2

r

C = 15 pF,

L

See Figure 8

3

f

Output enable time to high level

10

15

6

PZH1

PZL1

PHZ

PLZ

PZH2

PZL2

C

= 15 pF,

L

Output enable time to low level

DE at 3 V,

See Figure 9

ns

Output disable time from high level

Output disable time from low level

Propagationdelaytime,standby-to-high-leveloutput

Propagationdelaytime,standby-to-low-leveloutput

C

L

= 15 pF, DE at 0,

µs

See Figure 10

6

(1)

(2)

All typical values are at 25°C and with a 5-V supply.

is the magnitude of the differenceinpropagation delay times between any specified terminals of two devices when both devices operate

t

sk(pp)

with the same supply voltages, at the same temperature, and have identical packages and test circuits.

6

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

PARAMETER MEASUREMENT INFORMATION

375 Ω ±1%

60 Ω ±1%

V

CC

I

DE

OA

DE

I

A

B

A

B

D

V

OD

0 or 3 V

V

OD

54 Ω ±1%

0 or 3 V

+ –7 V < V

(test)

OB

_

< 12 V

V

I

375 Ω ±1%

V

OB OA

Figure 2. Driver V

With Common-Mode

OD

Figure 1. Driver V

and Voltage and Current Definitions

Test Circuit

OD

Loading Test Circuit

V

A

B

A

V

CC

27 Ω ± 1%

V

B

DE

A

B

D

V

OC(PP)

∆V

OC(SS)

Input

V

OC

V

C

L

= 50 pF ±20%

OC

C

Includes Fixture and

L

Instrumentation Capacitance

Input: PRR = 500 kHz, 50% Duty Cycle,t <6ns, t <6ns, Z = 50 Ω

r

f

O

Figure 3. Test Circuit and Definitions for the Driver Common-Mode Output Voltage

3 V

0 V

V

CC

1.5 V

V

t

I

DE

C

= 50 pF ±20%

L

A

B

V

D

OD

t

Includes Fixture

andInstrumentation

Capacitance

PLH

PHL

L

≈ 2 V

Input

Generator

R

± 1%

= 54 Ω

90%

L

V

I

50 Ω

0 V

10%

0 V

10%

V

OD

≈ –2 V

t

r

t

f

Generator: PRR = 500 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω

r

f

o

Figure 4. Driver Switching Test Circuit and Voltage Waveforms

3 V

0 V

A

S1

D

V

O

V

1.5 V

I

3 V

B

L

DE

0.5 V

R

± 1%

= 110 Ω

C

= 50 pF ±20%

t

L

PZH(1 & 2)

Input

Generator

V

OH

V

I

C

L

Includes Fixture

andInstrumentation

Capacitance

50 Ω

V

O

2.3 V

≈ 0 V

t

PHZ

Generator: PRR = 100 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω

r

f

o

Figure 5. Driver High-Level Enable and Disable Time Test Circuit and Voltage Waveforms

7

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

V

CC

R

± 1%

= 110 Ω

L

≈ 3 V

A

V

I

1.5 V

S1

D

V

O

3 V

0 V

B

L

t

PZL(1 & 2)

PLZ

DE

V

C

= 50 pF ±20%

CC

OL

Input

Generator

V

I

50 Ω

0.5 V

C

L

Includes Fixture

andInstrumentation

Capacitance

V

2.3 V

O

V

Generator: PRR = 100 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω

r

f

o

Figure 6. Driver Low-Level Output Enable and Disable Time Test Circuit and Voltage Waveforms

I

A

B

I

O

R

V

A

V

I

ID

V

B

V

IC

V

O

V

A

+ V

2

B

Figure 7. Receiver Voltage and Current Definitions

A

B

3 V

V

O

R

Input

Generator

1.5 V

V

I

50 Ω

1.5 V

0 V

C

= 15 pF ±20%

0 V

V

L

t

RE

PLH

PHL

Includes Fixture

andInstrumentation

Capacitance

L

OH

90% 90%

V

O

1.5 V

10%

1.5 V

10%

V

OL

Generator: PRR = 100 kHz, 50% Duty Cycle, t <6 ns, t <6 ns, Z = 50 Ω

r

f

o

t

r

t

f

Figure 8. Receiver Switching Test Circuit and Voltage Waveforms

8

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

A

B

D

0 V or 3 V

Generator: PRR = 100 kHz,

50% Duty Cycle,

DE

RE

3 V

t <6 ns, t <6 ns, Z = 50 Ω

r

f

o

Input

Generator

V

I

50 Ω

A

V

CC

V

O

R

S1

B

1 kΩ ± 1%

C

= 15 pF ±20%

L

Includes Fixture and

Instrumentation Capacitance

L

3 V

V

I

1.5 V

0 V

V

t

PHZ

PZH(1)

OH D at 3 V

S1 to B

V

OH

–0.5 V

1.5 V

V

O

≈ 0 V

t

PLZ

PZL(1)

V

CC

D at 0 V

S1 to A

1.5 V

V

O

V

OL

+0.5 V

V

OL

Figure 9. Receiver Enable and Disable Time Test Circuit and Voltage Waveforms With Drivers Enabled

9

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

Generator: PRR = 100 kHz,

50% Duty Cycle,

DE

RE

t <6 ns, t <6 ns, Z = 50 Ω

0 V

r

f

o

Input

Generator

V

I

50 Ω

A

B

A

0 V or 1.5 V

1.5 V or 0 V

V

CC

V

O

R

S1

B

1 kΩ ± 1%

C

= 15 pF ±20%

L

Includes Fixture and

Instrumentation Capacitance

L

3 V

1.5 V

V

I

0 V

V

t

PZH(2)

OH

A at 1.5 V

B at 0 V

S1 to B

1.5 V

V

O

GND

t

PZL(2)

V

CC

A at 0 V

B at 1.5 V

S1 to A

1.5 V

V

O

V

OL

Figure 10. Receiver Enable Time From Standby (Driver Disabled)

0 V or 3 V

RE

A

R

B

100 Ω

± 1%

PulseGenerator,

D

15 µs Duration,

1% Duty Cycle

+

_

t , t ≤ 100 ns

r

f

DE

3 V or 0 V

NOTE: This test is conducted to test survivability only. Data stability at the R output is not specified.

Figure 11. Test Circuit, Transient Over Voltage Test

10

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

FUNCTION TABLES

DRIVER

INPUT

D

ENABLE

DE

OUTPUTS

A

B

H

L

X

Open

X

H

L

H

Open

H

L

Z

H

Z

L

H

Z

L

Z

RECEIVER

DIFFERENTIALINPUTS

= V – V

ENABLE

RE

OUTPUT

R

V

ID

A

B

V

≤ –0.2 V

L

H

L

?

ID

–0.2 V < V < –0.01 V

ID

–0.01 V ≤ V

H

Z

H

Z

ID

X

Open Circuit

Short Circuit

X

L

Open

H = high level; L = low level; Z = high impedance; X = irrelevant;

?=indeterminate

11

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

EQUIVALENT INPUT AND OUTPUT SCHEMATIC DIAGRAMS

D and RE Inputs

DE Input

V

CC

V

CC

100 kΩ

1 kΩ

Input

100 kΩ

9 V

A Input

B Input

V

CC

V

CC

16 V

100 kΩ

16 V

R1

R3

R2

R3

Input

100 kΩ

16 V

R2

16 V

A and B Outputs

R Output

V

CC

V

CC

16 V

5 Ω

Output

9 V

Output

16 V

R1/R2

9 kΩ

R3

45 kΩ

180 kΩ

SN65HVD05

SN65HVD06

SN65HVD07

36 kΩ

12

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

TYPICAL CHARACTERISTICS

HVD06

MAXIMUM RECOMMENDED STILL-AIR

OPERATING TEMPERATURE

vs

HVD05

MAXIMUM RECOMMENDED STILL-AIR

OPERATING TEMPERATURE

vs

SIGNALING RATE

(D – PACKAGE)

SIGNALING RATE

(D – PACKAGE)

85

25

85

25

High K Board

Low K Board

1

10

1

10

40

SignalingRate – Mbps

Signaling Rate – Mbps

Figure 12

Figure 13

HVD05

RMS SUPPLY CURRENT

vs

HVD06

RMS SUPPLY CURRENT

vs

SIGNALING RATE

120

100

80

120

T

= 25°C

R

C

V

= 54 Ω

= 50 pF

= 5 V

T

= 25°C

R

C

V

= 54 Ω

= 50 pF

= 5 V

A

L

CC

A

L

CC

RE at V

DE at V

RE at V

DE at V

CC

110

100

90

80

70

60

50

60

40

30

0

2.5

5

7.5

10

0

5

10

15

20

25

30

35

40

Signaling Rate – Mbps

Figure 14

Figure 15

13

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

HVD07

RMS SUPPLY CURRENT

vs

BUS INPUT CURRENT

vs

BUS INPUT VOLTAGE

SIGNALING RATE

250

200

110

T

= 25°C

R

C

= 54 Ω

= 50 pF

= 5 V

A

L

T

= 25°C

A

RE at V

DE at V

CC

DE at 0 V

= 5 V

V

CC

V

100

90

80

70

60

CC

150

100

HVD05

50

0

HVD06

HVD07

–50

–100

50

40

–150

–200

–7 –6–5 –4–3 –2–1 0 1 2 3 4 5 6 7 8 9 1011 12

100

400

700

1000

V – Bus Input Voltage – V

I

Signaling Rate – kbps

Figure 16

Figure 17

DRIVER HIGH-LEVEL OUTPUT CURRENT

DRIVER LOW-LEVEL OUTPUT CURRENT

vs

HIGH-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT VOLTAGE

160

140

0

T

= 25°C

A

T

= 25°C

A

DE at V

CC

D at 0 V

= 5 V

DE at V

D at V

V

–20

CC

= 5 V

V

CC

120

–40

–60

100

80

–80

60

–100

–120

–140

–160

40

20

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

0

0.5

1

1.5

2

2.5

3

3.5

4

4.5

5

V

O

– High-Level Output Voltage – V

V

O

– Low-Level Output Voltage – V

Figure 18

Figure 19

14

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

DIFFERENTIAL OUTPUT VOLTAGE

vs

DRIVER OUTPUT CURRENT

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

4

70

60

DE at V

D at V

CC

T = 25°C

A

3.8

3.6

3.4

3.2

3

DE at V

D at V

CC

R = 54 Ω

L

CC

V

R

= 5 V

= 54 Ω

CC

L

50

40

30

20

2.8

2.6

2.4

10

0

2.2

2

–40

–15

0

0.6 1.2 1.8 2.4

3

3.6 4.2 4.8 5.4

10

35

60

85

V

CC

– Supply Voltage – V

T

A

– Free-Air Temperature – °C

Figure 20

Figure 21

DIFFERENTIAL OUTPUT VOLTAGE

vs

DIFFERENTIAL OUTPUT CURRENT

5

4.5

4

T

= 25°C

A

DE at V

D at V

V

CC

= 5 V

CC

60 Ω Load

Line

3.5

30 Ω Load

Line

3

2.5

2

1.5

1

0.5

0

20

40

60

80

100

120

I

– Differential Output Current – mA

OD

Figure 22

15

SN65HVD05,SN65HVD06, SN65HVD07

SN75HVD05,SN75HVD06,SN75HVD07

SLLS533B – MAY 2002 – REVISED MAY 2003

www.ti.com

APPLICATION INFORMATION

R

T

R

T

Device

HVD05

HVD06

HVD07

Number of Devices on Bus

64

256

NOTE: Thelineshouldbeterminatedatbothendswithitscharacteristicimpedance(R = Z ).Stublengthsoffthemainlineshouldbekeptasshort

T

O

as possible.

Figure 23. Typical Application Circuit

16

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8)

PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

8

5

0.260 (6,60)

0.240 (6,10)

1

4

0.070 (1,78) MAX

0.325 (8,26)

0.300 (7,62)

0.020 (0,51) MIN

0.015 (0,38)

Gage Plane

0.200 (5,08) MAX

Seating Plane

0.010 (0,25) NOM

0.125 (3,18) MIN

0.100 (2,54)

0.021 (0,53)

0.430 (10,92)

MAX

0.010 (0,25)

M

0.015 (0,38)

4040082/D 05/98

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice.

C. Falls within JEDEC MS-001

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

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型号：	SN75HVD05
厂家：	TEXAS INSTRUMENTS
描述：	HIGH OUTPUT RS-485 TRANSCEIVERS 高输出RS -485收发器输出元件
文件：	总19页 (文件大小：218K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

SN75HVD05 [TI]

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