SN75LBC174ADWR [TI]

QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS; 四路RS - 485差动线路驱动器
SN75LBC174ADWR
型号: SN75LBC174ADWR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

QUADRUPLE RS-485 DIFFERENTIAL LINE DRIVERS
四路RS - 485差动线路驱动器

驱动器
文件: 总19页 (文件大小:480K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
ꢀꢁꢂ ꢃ ꢄ ꢅꢆꢇ ꢈ ꢉ ꢊꢋ ꢀꢁꢈ ꢃ ꢄ ꢅꢆ ꢇꢈ ꢉꢊ  
ꢌ ꢍꢊꢎꢏ ꢍꢐꢄ ꢑ ꢏꢀꢒ ꢉꢓ ꢃ ꢎꢔ ꢕꢕ ꢑꢏ ꢑꢁꢖ ꢔꢊ ꢄ ꢄ ꢔꢁꢑ ꢎ ꢏꢔ ꢗ ꢑꢏ ꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
D
D
D
D
Designed for TIA/EIA-485, TIA/EIA-422 and  
ISO 8482 Applications  
D
D
Driver Positive- and Negative-Current  
Limiting  
Signaling Rates up to 30 Mbps  
Power-Up and Power-Down Glitch-Free for  
Line Insertion Applications  
Propagation Delay Times < 11 ns  
D
Thermal Shutdown Protection  
Low Standby Power Consumption  
1.5 mA Max  
D
Industry Standard Pin-Out, Compatible  
With SN75174, MC3487, DS96174, LTC487,  
and MAX3042  
D
Output ESD Protection Exceeds 13 kV  
description  
The SN65LBC174A and SN75LBC174A are quadruple differential line drivers with 3-state outputs, designed  
for TIA/EIA-485 (RS-485), TIA/EIA-422 (RS-422), and ISO 8482 applications.  
These devices are optimized for balanced multipoint bus transmission at signalling rates up to 30 million bits  
per second. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate  
rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise  
coupling to the environment.  
N PACKAGE  
(TOP VIEW)  
16-DW PACKAGE  
(TOP VIEW)  
logic diagram (positive logic)  
2
1Y  
1
2
3
4
5
6
7
8
16  
1
4
7
1A  
1Y  
1Z  
V
CC  
4A  
4Y  
4Z  
3,4EN  
3Z  
3Y  
1A  
1Y  
V
CC  
4A  
1
2
3
4
5
6
7
8
16  
15  
14  
13  
12  
1A  
1,2EN  
2A  
3
15  
14  
13  
12  
11  
10  
9
1Z  
1Z  
4Y  
6
5
2Y  
2Z  
1,2EN  
2Z  
2Y  
2A  
GND  
1,2EN  
2Z  
4Z  
3,4EN  
2Y  
11 3Z  
10 3Y  
10  
11  
3Y  
3Z  
9
2A  
3A  
3,4EN  
4A  
3A  
GND  
9
3A  
12  
15  
14  
13  
4Y  
4Z  
20-DW PACKAGE  
(TOP VIEW)  
logic diagram (positive logic)  
2
1
2
3
4
5
6
7
8
9
10  
20  
1A  
1Y  
NC  
1Z  
V
CC  
4A  
4Y  
NC  
4Z  
3,4EN  
3Z  
NC  
3Y  
1Y  
1
1A  
19  
18  
17  
16  
15  
14  
13  
12  
11  
4
1Z  
5
1,2EN  
8
2Y  
9
2A  
1,2EN  
2Z  
NC  
2Y  
2A  
GND  
6
2Z  
12  
3Y  
11  
3A  
14  
3Z  
15  
3,4EN  
3A  
18  
4Y  
19  
4A  
16  
4Z  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).  
ꢖꢤ  
Copyright 2001 − 20003, Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢮ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢩ  
1
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ꢌꢍ ꢊ ꢎꢏ ꢍ ꢐꢄ ꢑ ꢏꢀ ꢒꢉ ꢓ ꢃ ꢎꢔ ꢕ ꢕꢑ ꢏꢑ ꢁꢖ ꢔ ꢊꢄ ꢄꢔ ꢁꢑ ꢎꢏꢔ ꢗꢑ ꢏꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
description (continued)  
Each driver features current limiting and thermal-shutdown circuitry making it suitable for high-speed multipoint  
applications in noisy environments. These devices are designed using LinBiCMOSt, facilitating low power  
consumption and robustness.  
The two EN inputs provide pair-wise driver enabling, or can be externally tied together to provide enable control  
of all four drivers with one signal. When disabled or powered off, the driver outputs present a high-impedance  
to the bus for reduced system loading.  
The SN75LBC174A is characterized for operation over the temperature range of 0°C to 70°C. The  
SN65LBC174A is characterized for operation over the temperature range of −40°C to 85°C.  
AVAILABLE OPTIONS  
PACKAGE  
16-PIN PLASTIC  
SMALL OUTLINE  
(JEDEC MS-013)  
20-PIN PLASTIC  
SMALL OUTLINE  
(JEDEC MS-013)  
16-PIN PLASTIC  
THROUGH-HOLE  
(JEDEC MS-001)  
T
A
SN75LBC174A16DW  
SN65LBC174A16DW  
SN75LBC174ADW  
Marked as 75LBC174A  
SN65LBC174ADW  
SN75LBC174AN  
0°C to 70°C  
SN65LBC174AN  
40°C to 85°C  
Marked as 65LBC174A  
Add R suffix for taped and reeled version.  
FUNCTION TABLE  
(EACH DRIVER)  
INPUT  
ENABLE  
OUTPUTS  
A
G
Y
L
Z
H
L
L
H
H
H
OPEN  
L
H
H
L
H
L
OPEN  
OPEN  
OPEN  
L
H
L
H
H
H
Z
OPEN  
X
L
Z
H = high level, L = low level, X = irrelevant,  
Z = high impedance (off)  
LinBiCMOS is a trademark of Texas Instruments.  
2
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
equivalent input and output schematic diagrams  
Y or Z Output  
A or EN Input  
V
CC  
V
CC  
16 V  
16 V  
20 V  
100 kΩ  
1 kΩ  
Input  
Output  
16 V  
16 V  
17 V  
9 V  
absolute maximum ratings  
Supply voltage range, V  
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V  
CC  
Voltage range at any bus (DC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −10 V to 15 V  
Voltage range at any bus (transient pulse through 100 , see Figure 8) . . . . . . . . . . . . . . . . . . . . . −30 V to 30 V  
Input voltage range at any A or EN terminal, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V  
+ 0.5 V  
I
CC  
Electrostatic discharge: Human body model (see Note 2)  
Y, Z, and GND . . . . . . . . . . . . . . . . . . . . . 13 kV  
All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 kV  
Charged-device model (see Note 3) All pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV  
Storage temperature range, T  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C  
stg  
Continuous power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table  
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to GND.  
2. Tested in accordance with JEDEC standard 22, Test Method A114-A.  
3. Tested in accordance with JEDEC standard 22, Test Method C101.  
DISSIPATION RATING TABLE  
JEDEC  
BOARD  
MODEL  
T
A
25°C  
DERATING FACTOR  
T
= 70°C  
T = 85°C  
A
A
PACKAGE  
POWER RATING  
ABOVE T = 25°C  
POWER RATING POWER RATING  
A
Low K  
High K  
Low K  
High K  
Low K  
1200 mW  
2240 mW  
1483 mW  
2753 mW  
1150 mW  
9.6 mW/°C  
17.9 mW/°C  
11.86 mW/°C  
22 mW/°C  
769 mW  
1434 mW  
949 mW  
1762 mW  
736 mW  
625 mW  
1165 mW  
771 mW  
1432 mW  
598 mW  
16-PIN DW  
20-PIN DW  
16-PIN N  
9.2 mW/°C  
This is the inverse of the junction-to-ambient thermal resistance when board-mounted with no air flow.  
3
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ꢌꢍ ꢊ ꢎꢏ ꢍ ꢐꢄ ꢑ ꢏꢀ ꢒꢉ ꢓ ꢃ ꢎꢔ ꢕ ꢕꢑ ꢏꢑ ꢁꢖ ꢔ ꢊꢄ ꢄꢔ ꢁꢑ ꢎꢏꢔ ꢗꢑ ꢏꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
recommended operating conditions  
MIN NOM  
MAX  
5.25  
12  
UNIT  
V
Supply voltage, V  
CC  
4.75  
−7  
2
5
Voltage at any bus terminal  
High-level input voltage, V  
Y, Z  
V
V
CC  
0.8  
IH  
A, EN  
V
Low-level input voltage, V  
0
IL  
Output current  
−60  
0
60  
70  
85  
mA  
SN75LBC174A  
SN65LBC174A  
Operating free-air temperature, T  
°C  
A
−40  
electrical characteristics over recommended operating conditions  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
UNIT  
V
V
V
Input clamp voltage  
Open-circuit output voltage  
I = −18 mA  
−1.5 −0.77  
IK  
I
Y or Z, No load  
0
3
V
V
V
O
CC  
No load (open circuit)  
CC  
2.5  
Steady-state differential output  
voltage magnitude  
R
= 54 , See Figure 1  
1
1
1.6  
1.6  
V  
OD(SS)  
V
L
With common-mode loading, See Figure 2  
2.5  
Change in steady-state differential  
output voltage between logic  
states  
V  
OD(SS)  
See Figure 1  
−0.1  
2
0.1  
V
V
V
Steady-state common-mode  
output voltage  
V
See Figure 3  
2.4  
2.8  
OC(SS)  
Change in steady-state  
common-mode output voltage  
between logic states  
V  
OC(SS)  
See Figure 3  
A, G, G  
−0.02  
0.02  
I
I
Input current  
−50  
50  
µA  
I
V = 0 V  
I
Short-circuit output current  
−200  
200  
mA  
OS  
V = V  
I CC  
V
= −7 V to 12 V,  
High-impedance-state output  
current  
TEST  
See Figure 7  
I
I
EN at 0 V  
= 0 V  
−50  
−10  
50  
OZ  
µA  
Output current with power off  
V
10  
23  
O(OFF)  
CC  
All drivers enabled  
All drivers disabled  
V = 0 V or V  
I
No load  
CC,  
I
Supply current  
mA  
CC  
1.5  
All typical values are at V  
The minimum V  
OD  
of lower output signal into account in determining the maximum signal transmission distance.  
= 5 V and 25°C.  
may not fully comply with TIA/EIA-485-A at operating temperatures below 0°C. System designers should take the possibly  
CC  
4
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
switching characteristics over recommended operating conditions  
PARAMETER  
TEST CONDITIONS  
MIN  
5.5  
5.5  
3
TYP  
8
MAX  
11  
11  
11  
11  
2
UNIT  
ns  
t
t
t
t
Propagation delay time, low-to-high level output  
Propagation delay time, high-to-low level output  
Differential output voltage rise time  
PLH  
8
ns  
PHL  
7.5  
7.5  
0.6  
0.6  
ns  
r
f
Differential output voltage fall time  
3
ns  
R
= 54 , C = 50 pF,  
L
See Figure 4  
L
t
Pulse skew |t  
– t  
|
ns  
sk(p)  
PLH PHL  
2
t
t
t
t
t
t
2
ns  
ns  
ns  
ns  
ns  
ns  
Output skew  
sk(o)  
sk(pp)  
PZH  
PHZ  
PZL  
3
Part-to-part skew  
Propagation delay time, high-impedance-to-high-level output  
Propagation delay time, high-level-output-to-high impedance  
Propagation delay time, high-impedance-to-low-level output  
Propagation delay time, low-level-output-to-high impedance  
25  
25  
30  
20  
See Figure 5  
See Figure 6  
PLZ  
Output skew (t  
Part-to-part skew (t  
sk(pp)  
) is the magnitude of the time delay difference between the outputs of a single device with all of the inputs connected together.  
sk(o)  
) is the magnitude of the difference in propagation delay times between any specified terminals of two devices when  
both devices operate with the same input signals, the same supply voltages, at the same temperature, and have identical packages and test  
circuits.  
5
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
PARAMETER MEASUREMENT INFORMATION  
I
OY  
Y
Z
I
I
A
V
V
OD  
54 Ω  
I
V
OY  
OZ  
GND  
V
I
OZ  
Figure 1. Test Circuit, V  
Without Common-Mode Loading  
OD  
375 Ω  
Y
A
V
OD  
V
TEST  
= −7 V to 12 V  
Input  
60 Ω  
375 Ω  
Z
V
TEST  
V
I
Figure 2. Test Circuit, V  
With Common-Mode Loading  
OD  
27 Ω  
Y
A
27 Ω  
Z
V
Signal  
Generator  
OC  
= 50 pF  
C
50 Ω  
L
PRR = 1 MHz, 50% duty cycle, t < 6 ns, t < 6 ns, Z = 50 Ω  
Includes probe and jig capacitance  
r
f
O
Figure 3. V  
Test Circuit  
OC  
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
PARAMETER MEASUREMENT INFORMATION  
Y
A
C = 50 pF  
L
V
OD  
R
= 54 Ω  
L
Z
Signal  
Generator  
50 Ω  
PRR = 1 MHz, 50% duty cycle, t < 6 ns, t < 6 ns, Z = 50 Ω  
Includes probe and jig capacitance  
r
f
O
3 V  
1.5 V  
0 V  
Input  
t
t
PHL  
PLH  
1.5 V  
90%  
0 V  
10%  
Output  
−1.5 V  
t
t
f
r
Figure 4. Output Switching Test Circuit and Waveforms  
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
PARAMETER MEASUREMENT INFORMATION  
Y
S1  
A
Output  
3 V or 0 V w  
Z
C
= 50 pF  
R = 110 Ω  
L
L
Input  
EN  
Signal  
Generator  
50 Ω  
§
PRR = 1 MHz, 50% duty cycle, t < 6 ns, t < 6 ns, Z = 50 Ω  
Includes probe and jig capacitance  
3 V if testing Y output, 0 V if testing Z output  
r
f
O
3 V  
1.5 V  
0 V  
Input  
t
0.5 V  
PZH  
V
OH  
2.3 V  
0 V  
Output  
t
PHZ  
Figure 5. Enable Timing Test Circuit and Waveforms, t  
and t  
PHZ  
PZH  
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
PARAMETER MEASUREMENT INFORMATION  
5 V  
R
= 110 Ω  
L
Y
S1  
A
Output  
0 V or 3 V w  
Z
= 50 pF  
C
L
Input  
EN  
Signal  
Generator  
50 Ω  
§
PRR = 1 MHz, 50% duty cycle, t < 6 ns, t < 6 ns, Z = 50 Ω  
Includes probe and jig capacitance  
3 V if testing Y output, 0 V if testing Z output  
r
f
O
3 V  
1.5 V  
0 V  
Input  
t
PZL  
t
PLZ  
5 V  
Output  
2.3 V  
V
OL  
0.5 V  
Figure 6. Enable Timing Test Circuit and Waveforms, t  
and t  
PLZ  
PZL  
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SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
PARAMETER MEASUREMENT INFORMATION  
Y
I
O
V
I
Z
V
TEST  
Voltage Source  
= −7 V to 12 V  
V
TEST  
Slew Rate 1.2 V/µs  
Figure 7. Test Circuit, Short-Circuit Output Current  
Y
Z
V
TEST  
100 Ω  
0 V  
15 µs  
−V  
TEST  
Pulse Generator  
15 µs Duration,  
1% Duty Cycle  
1.5 ms  
Figure 8. Test Circuit Waveform, Transient Over-Voltage Test  
10  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄ ꢅꢆꢇ ꢈ ꢉ ꢊꢋ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊ  
ꢌ ꢍꢊꢎꢏ ꢍꢐꢄ ꢑ ꢏꢀ ꢒꢉꢓ ꢃ ꢎꢔ ꢕꢕ ꢑꢏ ꢑꢁꢖ ꢔꢊ ꢄ ꢄ ꢔꢁꢑ ꢎ ꢏꢔ ꢗ ꢑꢏ ꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
TYPICAL CHARACTERISTICS  
DIFFERENTIAL OUTPUT VOLTAGE  
DIFFERENTIAL OUTPUT VOLTAGE  
vs  
vs  
OUTPUT CURRENT  
FREE-AIR TEMPERATURE  
4
2.5  
3.5  
3
V
CC  
= 5.25 V  
2
V
CC  
= 5 V  
V
CC  
= 5.25 V  
2.5  
2
1.5  
V
CC  
= 5 V  
V
CC  
= 4.75 V  
1
0.5  
0
1.5  
1
V
= 4.75 V  
CC  
0.5  
0
0
20  
40  
60  
80  
100  
−60 −40 −20  
0
20  
40  
60  
80  
100  
I
O
− Output Current − mA  
T
A
− Free-Air Temperature − °C  
Figure 9  
Figure 10  
PROPAGATION DELAY TIME  
vs  
SUPPLY CURRENT (FOUR CHANNELS)  
vs  
FREE-AIR TEMPERATURE  
SIGNALING RATE  
8.5  
144  
142  
140  
138  
136  
134  
132  
130  
128  
R
C
= 54 Ω  
= 50 pF  
L
L
8
(Each Channel)  
V
= 5.25 V  
CC  
7.5  
V
= 4.75 V  
CC  
7
6.5  
6
5.5  
5
−40  
−20  
0
20  
40  
60  
80  
1
10  
100  
T
A
− Free-Air Temperature − °C  
Signaling Rate − Mbps  
Figure 11  
Figure 12  
11  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆ ꢇꢈ ꢉꢊ ꢋ ꢀ ꢁꢈ ꢃ ꢄꢅꢆ ꢇ ꢈꢉ ꢊ  
ꢌꢍ ꢊ ꢎꢏ ꢍ ꢐꢄ ꢑ ꢏꢀ ꢒꢉ ꢓ ꢃ ꢎꢔ ꢕ ꢕꢑ ꢏꢑ ꢁꢖ ꢔ ꢊꢄ ꢄꢔ ꢁꢑ ꢎꢏꢔ ꢗꢑ ꢏꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
TYPICAL CHARACTERISTICS  
DIFFERENTIAL OUTPUT VOLTAGE  
vs  
SUPPLY VOLTAGE  
3
R
= 54 Ω  
L
2.5  
2
1.5  
1
0.5  
0
0
0.5  
1
1.5  
2
2.5  
3
3.5  
4
4.5  
5
5.5 6  
V
CC  
− Supply Voltage − V  
Figure 13  
R
C
= 54 Ω  
= 50 pF  
L
L
Figure 14. Eye Pattern, Pseudorandom Data at 30 Mbps  
12  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
ꢀꢁꢂ ꢃ ꢄ ꢅꢆꢇ ꢈ ꢉ ꢊꢋ ꢀꢁ ꢈꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢊ  
ꢌ ꢍꢊꢎꢏ ꢍꢐꢄ ꢑ ꢏꢀ ꢒꢉꢓ ꢃ ꢎꢔ ꢕꢕ ꢑꢏ ꢑꢁꢖ ꢔꢊ ꢄ ꢄ ꢔꢁꢑ ꢎ ꢏꢔ ꢗ ꢑꢏ ꢀ  
SLLS446C − OCTOBER 2000 − REVISED MAY 2003  
APPLICATION INFORMATION  
TMS320F243  
DSP  
SN65LBC174A  
SN65LBC175A  
TMS320F241  
DSP  
(Controller)  
(Embedded  
Application)  
SPISIMO  
SPISIMO  
IOPA1  
IOPA1  
(Enable)  
SPISTE  
SPISTE  
SPICLK  
SPICLK  
IOPA2  
IOPA0  
IOPA2  
(Enable)  
IOPA0  
(Handshake  
/Status)  
SPISOMI  
SPISOMI  
Figure 15. Typical Application Circuit, DSP-to-DSP Link via Serial Peripheral Interface  
13  
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jan-2007  
PACKAGING INFORMATION  
Orderable Device  
SN65LBC174A16DW  
SN65LBC174A16DWG4  
SN65LBC174A16DWR  
SN65LBC174A16DWRG4  
SN65LBC174ADW  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
SOIC  
DW  
16  
16  
16  
16  
20  
20  
20  
20  
16  
16  
16  
16  
20  
20  
20  
20  
16  
16  
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
DW  
DW  
DW  
DW  
DW  
DW  
DW  
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN65LBC174ADWG4  
SN65LBC174ADWR  
SN65LBC174ADWRG4  
SN65LBC174AN  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25  
Pb-Free  
(RoHS)  
CU NIPD  
N / A for Pkg Type  
SN75LBC174A16DW  
SN75LBC174A16DWR  
SN75LBC174A16DWRG4  
SN75LBC174ADW  
DW  
DW  
DW  
DW  
DW  
DW  
DW  
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN75LBC174ADWG4  
SN75LBC174ADWR  
SN75LBC174ADWRG4  
SN75LBC174AN  
25 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
25  
Pb-Free  
(RoHS)  
CU NIPD  
N / A for Pkg Type  
SN75LBC174ANE4  
N
25  
Pb-Free  
(RoHS)  
CU NIPD  
N / A for Pkg Type  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
29-Jan-2007  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
Addendum-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,  
enhancements, improvements, and other changes to its products and services at any time and to  
discontinue any product or service without notice. Customers should obtain the latest relevant information  
before placing orders and should verify that such information is current and complete. All products are sold  
subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment.  
TI warrants performance of its hardware products to the specifications applicable at the time of sale in  
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent  
TI deems necessary to support this warranty. Except where mandated by government requirements, testing  
of all parameters of each product is not necessarily performed.  
TI assumes no liability for applications assistance or customer product design. Customers are responsible  
for their products and applications using TI components. To minimize the risks associated with customer  
products and applications, customers should provide adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent  
right, copyright, mask work right, or other TI intellectual property right relating to any combination, machine,  
or process in which TI products or services are used. Information published by TI regarding third-party  
products or services does not constitute a license from TI to use such products or services or a warranty or  
endorsement thereof. Use of such information may require a license from a third party under the patents or  
other intellectual property of the third party, or a license from TI under the patents or other intellectual  
property of TI.  
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without  
alteration and is accompanied by all associated warranties, conditions, limitations, and notices.  
Reproduction of this information with alteration is an unfair and deceptive business practice. TI is not  
responsible or liable for such altered documentation.  
Resale of TI products or services with statements different from or beyond the parameters stated by TI for  
that product or service voids all express and any implied warranties for the associated TI product or service  
and is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.  
Following are URLs where you can obtain information on other Texas Instruments products and application  
solutions:  
Products  
Amplifiers  
Data Converters  
DSP  
Interface  
Applications  
Audio  
Automotive  
Broadband  
Digital Control  
Military  
amplifier.ti.com  
dataconverter.ti.com  
dsp.ti.com  
interface.ti.com  
logic.ti.com  
www.ti.com/audio  
www.ti.com/automotive  
www.ti.com/broadband  
www.ti.com/digitalcontrol  
www.ti.com/military  
Logic  
Power Mgmt  
Microcontrollers  
Low Power Wireless  
power.ti.com  
microcontroller.ti.com  
www.ti.com/lpw  
Optical Networking  
Security  
Telephony  
Video & Imaging  
Wireless  
www.ti.com/opticalnetwork  
www.ti.com/security  
www.ti.com/telephony  
www.ti.com/video  
www.ti.com/wireless  
Mailing Address:  
Texas Instruments  
Post Office Box 655303 Dallas, Texas 75265  
Copyright © 2007, Texas Instruments Incorporated  

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