SN75LBC180DR [TI]

LOW-POWER RS-485 LINE DRIVER AND RECEIVER PAIRS; 低功耗RS - 485线路驱动器和接收器对
SN75LBC180DR
型号: SN75LBC180DR
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

LOW-POWER RS-485 LINE DRIVER AND RECEIVER PAIRS
低功耗RS - 485线路驱动器和接收器对

驱动器
文件: 总24页 (文件大小:877K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN55LBC180  
SN65LBC180  
SN75LBC180  
RSA−16  
D−14  
N−14  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
LOW-POWER RS-485 LINE DRIVER AND RECEIVER PAIRS  
1
FEATURES  
RSA PACKAGE  
(TOP VIEW)  
D OR N PACKAGE  
(TOP VIEW)  
2
Designed for High-Speed Multipoint Data  
Transmission Over Long Cables  
NC  
V
V
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
CC  
Operate With Pulse Durations as Low as 30 ns  
Low Supply Current . . . 5 mA Max  
R
RE  
CC  
16 15 14 13  
A
Meet or Exceed the Requirements of ANSI  
Standard RS-485 and ISO 8482:1987(E)  
1
A
B
Z
NC  
R
12  
DE  
B
2
3
4
11  
10  
9
D
Z
RE  
DE  
GND  
GND  
Y
3-State Outputs for Party-Line Buses  
Y
8
NC  
5
6 7 8  
Common-Mode Voltage Range of –7 V to 12 V  
Thermal Shutdown Protection Prevents  
Driver Damage From Bus Contention  
NC − No internal connection  
Pins 6 and 7 are connected together internally  
Pins 13 and 14 are connected together internally  
Positive and Negative Output Current  
Limiting  
Pin Compatible With the SN75ALS180  
logic diagram (positive logic)  
4
DESCRIPTION  
DE  
9
The SN55LBC180, SN65LBC180 and SN75LBC180  
differential driver and receiver pairs are monolithic  
integrated circuits designed for bidirectional data  
communication over long cables that take on the  
characteristics of transmission lines. They are  
balanced, or differential, voltage mode devices that  
meet or exceed the requirements of industry  
standards ANSI RS-485 and ISO 8482:1987(E).  
These devices are designed using TI's proprietary  
LinBiCMOS™ with the low-power consumption of  
CMOS and the precision and robustness of bipolar  
transistors in the same circuit.  
5
3
Y
D
10  
Z
RE  
12  
11  
2
A
B
R
this deviceinfo section is for space between the para and table  
ORDERING INFORMATION  
TA  
PACKAGE  
PDIP  
PART NUMBER  
SN75LBC180N  
SN75LBC180D  
SN75LBC180RSA  
SN65LBC180N  
SN65LBC180D  
SN65LBC180RSA  
SN55LBC180RSA  
PART MARKING  
SN75LBC180N  
7LB180  
0°C to 70°C  
SOIC  
QFN  
LB180  
PDIP  
65LBC180N  
6LB180  
–40°C to 85°C  
–55°C to 125°C  
SOIC  
QFN  
BL180  
QFN  
SN55LBC180  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
LinBiCMOS is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 1994–2009, Texas Instruments Incorporated  
SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam  
during storage or handling to prevent electrostatic damage to the MOS gates.  
DESCRIPTION (CONTINUED)  
The SN55LBC180, SN65LBC180 and SN75LBC180 combine a differential line driver and receiver with 3-state  
outputs and operate from a single 5-V supply. The driver and receiver have active-high and active-low enables,  
respectively, which can be externally connected to function as a direction control. The driver differential outputs  
and the receiver differential inputs are connected to separate terminals for full-duplex operation and are designed  
to present minimum loading to the bus whether disabled or powered off (VCC = 0). These parts feature a wide  
common-mode voltage range making them suitable for point-to-point or multipoint data-bus applications.  
The devices also provide positive and negative output-current limiting and thermal shutdown for protection from  
line fault conditions. The line driver shuts down at a junction temperature of approximately 172°C.  
The SN75LBC180 is characterized for operation over the commercial temperature range of 0°C to 70°C. The  
SN65LBC180 is characterized over the industrial temperature range of –40°C to 85°C.  
The SN55LBC180 is characterized for operation over the military temperature range of –55°C to 125°C.  
FUNCTION TABLES(1)  
DRIVER  
INPUT  
D
ENABLE  
DE  
OUTPUTS  
Y
H
L
Z
H
L
H
H
L
L
H
Z
X
Z
RECEIVER  
DIFFERENTIAL INPUTS  
A–B  
ENABLE  
RE  
OUTPUT  
R
V
ID 0.2 V  
L
L
L
H
L
H
?
–0.2 V < VID < 0.2 V  
VID –0.2 V  
L
X
Z
H
Open circuit  
(1) H = high level, L = low level, ? = Indeterminate, X = irrelevant,  
Z = high impedance (off)  
2
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Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
ABSOLUTE MAXIMUM RATINGS(1)  
UNIT  
(2)  
VCC  
Supply voltage range  
–0.3 to 7  
V
V
V
VBUS  
Bus voltage range (A, B, Y, Z)(2)  
Voltage range at D, R, DE, RE(2)  
Continuous total power dissipation(3)  
Total power dissipation  
–10 to 15  
–0.3 to VCC + 0.5  
Internally limited  
See Dissipation Rating Table  
Tstg  
IO  
Storage temperature range  
Receiver output current range  
–65 to 150  
–50 to 50  
±4  
°C  
mA  
kV  
V
HBM (Human Body Model) EIA/JESD22-A114  
ESD  
Electrostatic discharge  
MM (Machine Model) EIA/JESD22-A115  
400  
CDM (Charge Device Model) EIA/JESD22-C101  
1.5  
kV  
(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings  
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating  
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
(2) All voltage values are with respect to GND.  
(3) The maximum operating junction temperature is internally limited. Use the dissipation rating table to operate below this temperature.  
DISSIPATION RATING TABLE  
T
A 25°C  
DERATING FACTOR  
ABOVE TA = 25°C  
TA = 70°C  
POWER RATING  
TA = 85°C  
POWER RATING  
TA = 125°C  
POWER RATING  
PACKAGE(1)  
POWER RATING  
D
N
950 mW  
7.6 mW/°C  
9.2 mW/°C  
608 mW  
736 mW  
2133 mW  
494 mW  
598 mW  
1733 mW  
1150 mW  
RSA  
3333 mW  
26.67 mW/°C  
400 mW  
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI  
Web site at www.ti.com.  
RECOMMENDED OPERATING CONDITIONS  
MIN NOM  
MAX UNIT  
VCC  
Supply voltage  
4.75  
2
5
5.25  
V
V
V
V
V
VIH  
High-level input voltage  
D, DE, and RE  
D, DE, and RE  
VIL  
Low-level input voltage  
0.8  
6
VID  
Differential input voltage  
6(1)  
–7(1)  
VO, VI, or VIC  
Voltage at any bus terminal (separately or common mode)  
A, B, Y, or Z  
Y or Z  
12  
–60  
–8  
60  
8
IOH  
High-level output current  
Low-level output current  
mA  
mA  
R
Y or Z  
IOL  
R
SN55LBC180  
SN65LBC180  
SN75LBC180  
–55  
–40  
0
125  
85  
70  
TA  
Operating free-air temperature  
°C  
(1) The algebraic convention where the least positive (more negative) limit is designated minimum, is used in this data sheet for the  
differential input voltage, voltage at any bus terminal, operating temperature, input threshold voltage, and common-mode output voltage.  
Copyright © 1994–2009, Texas Instruments Incorporated  
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3
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
DRIVER SECTION  
ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
Input clamp voltage  
TEST CONDITIONS  
II = -18 mA  
MIN TYP(1)  
MAX UNIT  
VIK  
–1.5  
V
SN55LBC180  
SN65LBC180  
SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
1
1.1  
1.5  
1
2.5  
2.5  
2.5  
2.5  
2
5
RL = 54 ,  
See Figure 1  
5
5
5
| VOD  
|
Differential output voltage magnitude(2)  
V
RL = 60 ,  
See Figure 2  
1.1  
1.5  
5
2
5
Δ| VOD  
|
|
Change in magnitude of differential output voltage(3) See Figure 1 and Figure 2  
±0.2  
3
V
V
VOC  
Common-mode output voltage  
1
2.5  
RL = 54 ,  
See Figure 1  
Change in magnitude of common-mode output  
voltage(3)  
Δ| VOC  
±0.2  
V
IO  
Output current with power off  
High-impedance-state output current  
High-level input current  
VCC = 0,  
VO = –7 V to 12 V  
±100  
±100  
100  
100  
±250  
5
µA  
µA  
µA  
µA  
mA  
IOZ  
IIH  
IIL  
VO = –7 V to 12 V  
VI = 2.4 V  
Low-level input current  
VI = 0.4 V  
IOS  
Short-circuit output current  
–7 V VO 12 V  
Outputs enabled  
Outputs disabled  
ICC  
Supply current  
Receiver disabled  
mA  
3
(1) All typical values are at VCC = 5 V and TA = 25°C.  
(2) The minimum VOD specification may not fully comply with ANSI RS-485 at operating temperatures below 0°C. System designers should  
take the possibly lower output signal into account in determining the maximum signal-transmission distance.  
(3) Δ|VOD| and Δ|VOC| are the changes in the steady-state magnitude of VOD and VOC, respectively, that occur when the input is changed  
from a high level to a low level.  
SWITCHING CHARACTERISTICS  
VCC = 5 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
18  
UNIT  
ns  
td(OD)  
tt(OD)  
tPZH  
tPZL  
Differential output delay time  
7
5
12  
10  
RL = 54 ,  
See Figure 3  
Differential output transition time  
Output enable time to high level  
Output enable time to low level  
Output disable time from high level  
Output disable time from low level  
20  
ns  
RL = 110 ,  
RL = 110 ,  
RL = 110 ,  
RL = 110 ,  
See Figure 4  
See Figure 5  
See Figure 4  
See Figure 5  
35  
ns  
35  
ns  
tPHZ  
tPLZ  
50  
ns  
35  
ns  
SWITCHING CHARACTERISTICS (SN55LBC180)  
VCC = 5 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX  
UNIT  
ns  
td(OD)  
tt(OD)  
tPZH  
tPHZ  
tPZL  
Differential output delay time  
15  
21  
32  
55  
32  
20  
RL = 54 ,  
See Figure 3  
See Figure 4  
See Figure 5  
Differential output transition time  
Output enable time to high level  
Output disable time from high level  
Output enable time to low level  
Output disable time from low level  
ns  
RL = 110 ,  
RL = 110 ,  
ns  
ns  
tPLZ  
4
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Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
RECEIVER SECTION  
ELECTRICAL CHARACTERISTICS  
over recommended operating conditions (unless otherwise noted)  
PARAMETER  
TEST CONDITIONS  
MIN  
TYP  
MAX UNIT  
VIT+ Positive-going input threshold voltage  
VIT– Negative-going input threshold voltage  
IO = –8 mA  
IO = 8 mA  
0.2  
V
V
–0.2  
Vhys Hysteresis voltage (VIT+ – VIT–  
)
45  
mV  
V
VIK Enable-input clamp voltage  
II = –18 mA  
-1.5  
3.5  
VOH High-level output voltage  
VOL Low-level output voltage  
VID = 200 mV,  
IOH = –8 mA  
IOL = 8 mA  
4.5  
0.3  
V
VID = –200 mV,  
VO = 0 V to VCC  
VIH = 2.4 V  
0.5  
V
IOZ  
IIH  
IIL  
High-impedance-state output current  
High-level enable-input current  
Low-level enable-input current  
±20  
µA  
A
–50  
VIL = 0.4 V  
–100  
µA  
VI = 12 V, VCC = 5 V,  
VI = 12 V, VCC = 0 V,  
VI = -7 V, VCC = 5 V,  
VI = -7 V, VCC = 0 V,  
Other input at 0 V  
Other input at 0 V  
Other input at 0 V  
Other input at 0 V  
Outputs enabled  
Outputs disabled  
0.7  
0.8  
1
1
II  
Bus input current  
Supply current  
mA  
mA  
–0.8  
–0.8  
-0.5  
–0.5  
5
3
ICC  
Driver disabled  
SWITCHING CHARACTERISTICS  
VCC = 5 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX UNIT  
tPHL  
tPLH  
tsk(p)  
tt  
Propagation delay time, high- to low-level output  
11  
11  
22  
22  
3
33  
33  
6
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
Propagation delay time, low- to high-level output  
Pulse skew (| tPHL – tPLH|)  
VID = –1.5 V to 1.5 V,  
See Figure 6  
Transition time  
5
8
tPZH  
tPZL  
tPHZ  
tPLZ  
Output enable time to high level  
Output enable time to low level  
Output disable time from high level  
Output disable time from low level  
35  
30  
35  
30  
See Figure 7  
SWITCHING CHARACTERISTICS (SN55LBC180)  
VCC = 5 V, TA = 25°C  
PARAMETER  
TEST CONDITIONS  
MIN TYP  
MAX UNIT  
tPHL  
tPLH  
tsk(p)  
tsk(p)t  
tPZH  
tPHZ  
tPZL  
tPLZ  
Propagation delay time, high- to low-level output  
Propagation delay time, low- to high-level output  
Pulse skew (| tPHL – tPLH|)  
26  
23  
3
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
VID = –1.5 V to 1.5 V,  
See Figure 6  
Transition time  
4
Output enable time to high level  
Output disable time from high level  
Output enable time to low level  
Output disable time from low level  
30  
26  
30  
30  
See Figure 4  
Copyright © 1994–2009, Texas Instruments Incorporated  
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Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
PARAMETER MEASUREMENT INFORMATION  
Y
R
L
2
D
V
OD  
0 V or 3 V  
R
L
2
V
OC  
DE at 3 V  
Z
Figure 1. Differential and Common-Mode Output Voltages  
V
test  
–7 V < V  
< 12 V  
test  
R1  
375  
Y
D
R
L
= 60 Ω  
V
OD  
0 V or 3 V  
Z
DE at 3 V  
R2  
375 Ω  
V
test  
Figure 2. Driver VOD Test Circuit  
3 V  
0 V  
Input  
t
1.5 V  
1.5 V  
Y
C
= 50 pF  
L
t
d(OD)  
d(OD)  
(see Note B)  
2.5 V  
90%  
50%  
10%  
90%  
Generator  
R
L
= 54  
Output  
50%  
10%  
Output  
50 Ω  
(see Note A)  
– 2.5 V  
Z
DE at 3 V  
t
t
t(OD)  
t(OD)  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR > 1 MHz, 50% duty cycle, t 6 ns, t 6 ns,  
r
f
Z
O
= 50 .  
B. C includes probe and jig capacitance.  
L
Figure 3. Driver Test Circuit and Differential Output Delay and Transition Time Voltage Waveforms  
6
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Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
PARAMETER MEASUREMENT INFORMATION (continued)  
3 V  
Y
S1  
1.5 V  
1.5 V  
D
Input  
Output  
0 V or 3 V  
Z
0 V  
0.5 V  
t
PZH  
DE  
R
L
= 110 Ω  
V
C
= 50 pF  
OH  
L
Input  
Generator  
(see Note A)  
(see Note B)  
Output  
50 Ω  
2.3 V  
V
off  
0  
t
PHZ  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
Figure 4. Driver Test Circuit and Enable and Disable Time Waveforms  
5 V  
3 V  
0 V  
1.5 V  
1.5 V  
Input  
Y
Z
R
L
= 110  
S1  
D
Output  
0 V or 3 V  
t
PZL  
C
= 50 pF  
L
DE  
t
PLZ  
Input  
(see Note B)  
Generator  
(see Note A)  
5 V  
50 Ω  
0.5 V  
2.3 V  
Output  
V
OL  
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
Figure 5. Driver Test Circuit and Enable and Disable Time Voltage Waveforms  
3 V  
Input  
1.5 V  
1.5 V  
Input  
A
B
0 V  
R
Generator  
(see Note A)  
t
t
PHL  
Output  
PLH  
50  
V
V
RE  
1.5 V  
OH  
90%  
1.3 V  
10%  
90%  
C
= 15 pF  
(see Note B)  
L
1.3 V  
10%  
Output  
0 V  
OL  
t
t
t
t
TEST CIRCUIT  
VOLTAGE WAVEFORMS  
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t 6 ns, t 6 ns,  
r
f
Z
O
= 50 .  
B. C includes probe and jig capacitance.  
L
Figure 6. Receiver Test Circuit and Propagation Delay Time Voltage Waveforms  
Copyright © 1994–2009, Texas Instruments Incorporated  
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SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
PARAMETER MEASUREMENT INFORMATION (continued)  
Output  
S1  
1.5 V  
A
B
S2  
R
2 k  
− 1.5 V  
5 V  
IN916 or Equivalent  
(4 places)  
C
= 15 pF  
RE  
L
5 kΩ  
(see Note B)  
Input  
Generator  
(see Note A)  
50 Ω  
S3  
TEST CIRCUIT  
3 V  
S1 to − 1.5 V  
S2 Closed  
S3 Open  
3 V  
S1 to 1.5 V  
S2 Open  
Input  
Input  
1.5 V  
1.5 V  
S3 Closed  
0 V  
0 V  
t
PZH  
t
PZL  
V
OH  
4.5 V  
Output  
Output  
1.5 V  
0 V  
1.5 V  
V
OL  
3 V  
3 V  
0 V  
S1 to − 1.5 V  
S2 Closed  
S3 Closed  
S1 to 1.5 V  
S2 Closed  
S3 Closed  
Input  
Input  
1.5 V  
1.5 V  
0 V  
t
PHZ  
t
PLZ  
V
OH  
1.3 V  
Output  
Output  
0.5 V  
1.3 V  
V
OL  
0.5 V  
VOLTAGE WAVEFORMS  
NOTES: A. The input pulse is supplied by a generator having the following characteristics: PRR 1 MHz, 50% duty cycle, t 6 ns, t 6 ns,  
r
f
Z
O
= 50 .  
B. C includes probe and jig capacitance.  
L
Figure 7. Receiver Output Enable and Disable Times  
8
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Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
TYPICAL CHARACTERISTICS  
SCHEMATICS OF INPUTS AND OUTPUTS  
EQUIVALENT OF D, DE, AND RE INPUTS  
RECEIVER A INPUT  
V
CC  
V
CC  
100 k  
NOM  
18 kΩ  
3 kΩ  
22 kΩ  
NOM  
NOM  
Input  
Input  
12 kΩ  
1.1 kΩ  
NOM  
DRIVER OUTPUT  
TYPICAL OF RECEIVER OUTPUT  
V
RECEIVER B INPUT  
V
CC  
CC  
V
CC  
3 kΩ  
NOM  
18 kΩ  
NOM  
Input  
R Output  
Output  
100 kΩ  
12 kΩ  
NOM  
1.1 kΩ  
NOM  
Copyright © 1994–2009, Texas Instruments Incorporated  
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Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
DRIVER  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
DRIVER  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT CURRENT  
LOW-LEVEL OUTPUT CURRENT  
5
4.5  
4
5
4.5  
4
V
= 5 V  
V
= 5 V  
CC  
CC  
T = 25°C  
A
T = 25°C  
A
3.5  
3.5  
3
3
2.5  
2.5  
2
2
1.5  
1.5  
1
1
0.5  
0
0.5  
0
0
10 20 30 40 50 60 70 80 90 100  
0
20  
40  
60  
80  
100  
120  
I
− High-Level Output Current − mA  
I
− Low-Level Output Current − mA  
OH  
OL  
Figure 8.  
Figure 9.  
DRIVER  
DRIVER  
DIFFERENTIAL OUTPUT VOLTAGE  
DIFFERENTIAL OUTPUT VOLTAGE  
vs  
vs  
OUTPUT CURRENT  
FREE-AIR TEMPERATURE  
4
3.5  
3
2.4  
2.3  
2.2  
2.1  
2
V
= 5 V  
CC  
T = 25°C  
A
2.5  
2
1.9  
1.8  
1.5  
1
1.7  
1.6  
1.5  
0.5  
0
0
10 20 30 40 50 60 70 80 90 100  
-60 -40 -20  
T
0 20 40 60 80 100 120  
- Ambient Temperature - °C  
I
O
− Output Current − mA  
A
Figure 10.  
Figure 11.  
10  
Submit Documentation Feedback  
Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
DRIVER  
DIFFERENTIAL DELAY TIMES  
vs  
DRIVER  
OUTPUT CURRENT  
vs  
FREE-AIR TEMPERATURE  
SUPPLY VOLTAGE  
20  
80  
60  
R
L
= 54  
18  
16  
I
OL  
40  
20  
14  
12  
10  
0
−20  
−40  
−60  
−80  
8
6
I
OH  
-60 -40 -20  
T
0 20 40 60 80 100 120  
- Ambient Temperature - °C  
0
1
2
3
4
5
6
A
V
CC  
− Supply Voltage − V  
Figure 12.  
Figure 13.  
RECEIVER  
RECEIVER  
HIGH-LEVEL OUTPUT VOLTAGE  
vs  
LOW-LEVEL OUTPUT VOLTAGE  
vs  
HIGH-LEVEL OUTPUT CURRENT  
LOW-LEVEL OUTPUT CURRENT  
6
1
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0
V
ID  
= 200 mV  
V
CC  
= 5 V  
T
A
= 25°C  
V
ID  
= − 200 mV  
5
4
3
2
1
0
0
5
10  
15  
20  
25  
30  
35  
40  
0
−10  
− 20  
− 30  
− 40  
− 50  
I
− Low-Level Output Current − mA  
OL  
I
− High-Level Output Current − mA  
OH  
Figure 14.  
Figure 15.  
Copyright © 1994–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
11  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
SLLS174GFEBRUARY 1994REVISED APRIL 2009................................................................................................................................................... www.ti.com  
RECEIVER  
OUTPUT VOLTAGE  
vs  
AVERAGE SUPPLY CURRENT  
vs  
DIFFERENTIAL INPUT VOLTAGE  
FREQUENCY  
60  
55  
50  
45  
40  
35  
30  
25  
6
5
T
V
= 25°C  
A
= 5 V  
CC  
DRVR and RCVR Enabled  
Driver Load = Receiver Inputs  
Receiver Load = 50 pF  
V
= 12 V  
IC  
4
3
2
V
IC  
= 0 V  
20  
15  
10  
5
V
= −7 V  
IC  
1
0
0
10 k  
− 80 − 60 − 40 − 20  
0
20  
40  
60  
80  
100 k  
1 M  
10 M  
100 M  
V
ID  
− Differential Input Voltage − mV  
f − Frequency − Hz  
Figure 17.  
Figure 16.  
RECEIVER  
BUS INPUT CURRENT  
vs  
RECEIVER  
PROPAGATION DELAY TIME  
vs  
INPUT VOLTAGE  
(COMPLEMENTARY INPUT AT 0 V)  
FREE-AIR TEMPERATURE  
30  
29  
28  
27  
1
0.8  
T
V
= 25°C  
A
= 5 V  
CC  
0.6  
0.4  
0.2  
26  
25  
0
− 0.2  
− 0.4  
− 0.6  
− 0.8  
− 1  
24  
23  
22  
21  
20  
The shaded region of this graph represents  
more than 1 unit load per RS-485.  
− 8 − 6 − 4 − 2  
0
2
4
6
8
10 12  
-60 -40 -20  
T
0 20 40 60 80 100 120  
- Ambient Temperature - °C  
V − Input Voltage − V  
I
A
Figure 18.  
Figure 19.  
12  
Submit Documentation Feedback  
Copyright © 1994–2009, Texas Instruments Incorporated  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
SN55LBC180  
SN65LBC180  
SN75LBC180  
www.ti.com................................................................................................................................................... SLLS174GFEBRUARY 1994REVISED APRIL 2009  
APPLICATION INFORMATION  
Master Node  
Slave Node  
Slave Node  
Slave Node  
Figure 20. Full Duplex Application Circuit  
Copyright © 1994–2009, Texas Instruments Incorporated  
Submit Documentation Feedback  
13  
Product Folder Link(s): SN55LBC180 SN65LBC180 SN75LBC180  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Jul-2009  
PACKAGING INFORMATION  
Orderable Device  
SN55LBC180RSAR  
SN55LBC180RSAT  
SN65LBC180D  
Status (1)  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
ACTIVE  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
Drawing  
QFN  
RSA  
16  
16  
14  
14  
14  
14  
14  
14  
16  
16  
16  
16  
14  
14  
14  
14  
14  
14  
16  
16  
16  
16  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
QFN  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
QFN  
QFN  
QFN  
QFN  
SOIC  
SOIC  
SOIC  
SOIC  
PDIP  
PDIP  
QFN  
QFN  
QFN  
QFN  
RSA  
D
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN65LBC180DG4  
SN65LBC180DR  
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN65LBC180DRG4  
SN65LBC180N  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN65LBC180NE4  
SN65LBC180RSAR  
SN65LBC180RSARG4  
SN65LBC180RSAT  
SN65LBC180RSATG4  
SN75LBC180D  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
RSA  
RSA  
RSA  
RSA  
D
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN75LBC180DG4  
SN75LBC180DR  
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
SN75LBC180DRG4  
SN75LBC180N  
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM  
no Sb/Br)  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
SN75LBC180NE4  
SN75LBC180RSAR  
SN75LBC180RSARG4  
SN75LBC180RSAT  
SN75LBC180RSATG4  
N
25  
Pb-Free  
(RoHS)  
CU NIPDAU N / A for Pkg Type  
RSA  
RSA  
RSA  
RSA  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
3000 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
250 Green (RoHS & CU NIPDAU Level-2-260C-1 YEAR  
no Sb/Br)  
(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
Addendum-Page 1  
PACKAGE OPTION ADDENDUM  
www.ti.com  
17-Jul-2009  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check  
http://www.ti.com/productcontent for the latest availability information and additional product content details.  
TBD: The Pb-Free/Green conversion plan has not been defined.  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and  
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS  
compatible) as defined above.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame  
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder  
temperature.  
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is  
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the  
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take  
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on  
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited  
information may not be available for release.  
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI  
to Customer on an annual basis.  
OTHER QUALIFIED VERSIONS OF SN55LBC180, SN65LBC180, SN75LBC180 :  
Automotive: SN65LBC180-Q1  
NOTE: Qualified Version Definitions:  
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects  
Addendum-Page 2  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
TAPE AND REEL INFORMATION  
*All dimensions are nominal  
Device  
Package Package Pins  
Type Drawing  
SPQ  
Reel  
Reel  
A0  
B0  
K0  
P1  
W
Pin1  
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant  
(mm) W1 (mm)  
SN55LBC180RSAR  
SN55LBC180RSAT  
SN65LBC180DR  
QFN  
QFN  
SOIC  
QFN  
QFN  
SOIC  
QFN  
QFN  
RSA  
RSA  
D
16  
16  
14  
16  
16  
14  
16  
16  
3000  
250  
330.0  
180.0  
330.0  
330.0  
180.0  
330.0  
330.0  
180.0  
12.4  
12.4  
16.4  
12.4  
12.4  
16.4  
12.4  
12.4  
4.25  
4.25  
6.5  
4.25  
4.25  
9.0  
1.15  
1.15  
2.1  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
8.0  
12.0  
12.0  
16.0  
12.0  
12.0  
16.0  
12.0  
12.0  
Q2  
Q2  
Q1  
Q2  
Q2  
Q1  
Q2  
Q2  
2500  
3000  
250  
SN65LBC180RSAR  
SN65LBC180RSAT  
SN75LBC180DR  
RSA  
RSA  
D
4.25  
4.25  
6.5  
4.25  
4.25  
9.0  
1.15  
1.15  
2.1  
2500  
3000  
250  
SN75LBC180RSAR  
SN75LBC180RSAT  
RSA  
RSA  
4.25  
4.25  
4.25  
4.25  
1.15  
1.15  
Pack Materials-Page 1  
PACKAGE MATERIALS INFORMATION  
www.ti.com  
14-Jul-2012  
*All dimensions are nominal  
Device  
Package Type Package Drawing Pins  
SPQ  
Length (mm) Width (mm) Height (mm)  
SN55LBC180RSAR  
SN55LBC180RSAT  
SN65LBC180DR  
QFN  
QFN  
SOIC  
QFN  
QFN  
SOIC  
QFN  
QFN  
RSA  
RSA  
D
16  
16  
14  
16  
16  
14  
16  
16  
3000  
250  
367.0  
210.0  
333.2  
367.0  
210.0  
333.2  
367.0  
210.0  
367.0  
185.0  
345.9  
367.0  
185.0  
345.9  
367.0  
185.0  
35.0  
35.0  
28.6  
35.0  
35.0  
28.6  
35.0  
35.0  
2500  
3000  
250  
SN65LBC180RSAR  
SN65LBC180RSAT  
SN75LBC180DR  
RSA  
RSA  
D
2500  
3000  
250  
SN75LBC180RSAR  
SN75LBC180RSAT  
RSA  
RSA  
Pack Materials-Page 2  
IMPORTANT NOTICE  
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other  
changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest  
issue. Buyers should obtain the latest relevant information before placing orders and should verify that such information is current and  
complete. All semiconductor products (also referred to herein as “components”) are sold subject to TI’s terms and conditions of sale  
supplied at the time of order acknowledgment.  
TI warrants performance of its components to the specifications applicable at the time of sale, in accordance with the warranty in TI’s terms  
and conditions of sale of semiconductor products. Testing and other quality control techniques are used to the extent TI deems necessary  
to support this warranty. Except where mandated by applicable law, testing of all parameters of each component is not necessarily  
performed.  
TI assumes no liability for applications assistance or the design of Buyers’ products. Buyers are responsible for their products and  
applications using TI components. To minimize the risks associated with Buyers’ products and applications, Buyers should provide  
adequate design and operating safeguards.  
TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or  
other intellectual property right relating to any combination, machine, or process in which TI components or services are used. Information  
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documentation. Information of third parties may be subject to additional restrictions.  
Resale of TI components or services with statements different from or beyond the parameters stated by TI for that component or service  
voids all express and any implied warranties for the associated TI component or service and is an unfair and deceptive business practice.  
TI is not responsible or liable for any such statements.  
Buyer acknowledges and agrees that it is solely responsible for compliance with all legal, regulatory and safety-related requirements  
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In some cases, TI components may be promoted specifically to facilitate safety-related applications. With such components, TI’s goal is to  
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requirements. Nonetheless, such components are subject to these terms.  
No TI components are authorized for use in FDA Class III (or similar life-critical medical equipment) unless authorized officers of the parties  
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have not been so designated are neither designed nor intended for automotive use; and TI will not be responsible for any failure of such  
components to meet such requirements.  
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dataconverter.ti.com  
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DLP® Products  
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Copyright © 2012, Texas Instruments Incorporated  

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