SNJ54AHCT00FKR [TI]
AHCT/VHCT/VT SERIES, QUAD 2-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20;
| 型号： | SNJ54AHCT00FKR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | AHCT/VHCT/VT SERIES, QUAD 2-INPUT NAND GATE, CQCC20, CERAMIC, LCC-20 输入元件 逻辑集成电路 |
| 文件： | 总26页 (文件大小：1182K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54AHCT00, SN74AHCT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS229K − OCTOBER 1995 − REVISED JULY 2003
D
D
Inputs Are TTL-Voltage Compatible
D
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
Latch-Up Performance Exceeds 250 mA Per
JESD 17
SN54AHCT00 . . . J OR W PACKAGE
SN74AHCT00 . . . D, DB, DGV, N, NS,
OR PW PACKAGE
SN74AHCT00 . . . RGY PACKAGE
(TOP VIEW)
SN54AHCT00 . . . FK PACKAGE
(TOP VIEW)
(TOP VIEW)
1
14
1A
1B
1Y
2A
2B
VCC
13 4B
3
2
1
20 19
18
1
2
3
4
5
6
7
14
4A
NC
4Y
1Y
NC
2A
NC
2B
4
5
6
7
8
1B
1Y
2A
2B
2Y
13 4B
12 4A
2
3
4
5
6
17
16
12
11
10
9
4A
4Y
3B
3A
3Y
11
10
9
4Y
3B
3A
15 NC
14
9 10 11 12 13
3B
2Y
GND
7
8
8
NC − No internal connection
description/ordering information
The ’AHCT00 devices perform the Boolean function Y = A • B or Y = A + B in positive logic.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
T
A
PACKAGE
QFN − RGY
PDIP − N
Tape and reel
Tube
SN74AHCT00RGYR
SN74AHCT00N
HB00
SN74AHCT00N
Tube
SN74AHCT00D
SOIC − D
AHCT00
Tape and reel
Tape and reel
Tape and reel
Tube
SN74AHCT00DR
SN74AHCT00NSR
SN74AHCT00DBR
SN74AHCT00PW
SN74AHCT00PWR
SN74AHCT00DGVR
SNJ54AHCT00J
−40°C to 85°C
SOP − NS
AHCT00
HB00
SSOP − DB
TSSOP − PW
HB00
Tape and reel
Tape and reel
Tube
TVSOP − DGV
CDIP − J
HB00
SNJ54AHCT00J
SNJ54AHCT00W
SNJ54AHCT00FK
CFP − W
Tube
SNJ54AHCT00W
SNJ54AHCT00FK
−55°C to 125°C
LCCC − FK
Tube
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines
are available at www.ti.com/sc/package.
FUNCTION TABLE
(each gate)
INPUTS
OUTPUT
Y
A
B
H
X
L
H
L
L
H
H
X
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2003, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT00, SN74AHCT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS229K − OCTOBER 1995 − REVISED JULY 2003
logic diagram, each gate (positive logic)
A
B
Y
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
Input voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
I
Output voltage range, V (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to V + 0.5 V
O
CC
Input clamp current, I (V < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA
IK
I
Output clamp current, I (V < 0 or V > V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O
O
CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
O
O
CC
Continuous current through V or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
CC
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
JA
(see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96°C/W
(see Note 2): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 127°C/W
(see Note 2): N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
(see Note 2): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
(see Note 2): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113°C/W
(see Note 3): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3. The package thermal impedance is calculated in accordance with JESD 51-5.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT00, SN74AHCT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS229K − OCTOBER 1995 − REVISED JULY 2003
recommended operating conditions (see Note 4)
SN54AHCT00 SN74AHCT00
UNIT
MIN
4.5
2
MAX
MIN
4.5
2
MAX
V
V
V
V
V
Supply voltage
5.5
5.5
V
V
CC
IH
IL
I
High-level input voltage
Low-level input voltage
Input voltage
0.8
5.5
0.8
5.5
V
0
0
0
0
V
Output voltage
V
CC
V
CC
V
O
I
I
High-level output current
Low-level output current
Input transition rise or fall rate
Operating free-air temperature
−8
−8
mA
mA
ns/V
°C
OH
OL
8
8
20
85
Δt/Δv
20
T
−55
125
−40
A
NOTE 4: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T = 25°C
SN54AHCT00 SN74AHCT00
A
PARAMETER
TEST CONDITIONS
V
UNIT
V
CC
MIN
4.4
TYP
MAX
MIN
4.4
MAX
MIN
4.4
MAX
I
I
I
I
= −50 mA
4.5
OH
OH
OL
OL
V
4.5 V
4.5 V
OH
OL
= −8 mA
= 50 mA
= 8 mA
3.94
3.8
3.8
0.1
0.36
0.1
2
0.1
0.44
1*
0.1
0.44
1
V
V
I
I
V = 5.5 V or GND
0 V to 5.5 V
5.5 V
mA
mA
I
I
V = V or GND,
I = 0
O
20
20
CC
I
CC
One input at 3.4 V,
Other inputs at V or GND
†
5.5 V
5 V
1.35
10
1.5
1.5
10
mA
pF
ΔI
CC
CC
C
V = V or GND
2
i
I
CC
* On products compliant to MIL-PRF-38535, this parameter is not production tested at V = 0 V.
CC
†
This is the increase in supply current for each input at one of the specified TTL voltage levels, rather than 0 V or V
.
CC
switching characteristics over recommended operating free-air temperature range,
VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1)
T = 25°C
SN54AHCT00 SN74AHCT00
FROM
(INPUT)
TO
(OUTPUT)
LOAD
CAPACITANCE
A
PARAMETER
UNIT
ns
MIN
TYP
5**
MAX
6.9**
6.9**
7.9
MIN
1**
1**
1
MAX
8**
8**
9
MIN
1
MAX
t
t
t
t
8
8
9
9
PLH
PHL
PLH
PHL
A or B
A or B
Y
Y
C = 15 pF
L
5**
1
5.5
5.5
1
C = 50 pF
L
ns
7.9
1
9
1
** On products compliant to MIL-PRF-38535, this parameter is not production tested.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT00, SN74AHCT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS229K − OCTOBER 1995 − REVISED JULY 2003
noise characteristics, VCC = 5 V, CL = 50 pF, TA = 25°C (see Note 5)
SN74AHCT00
PARAMETER
UNIT
MIN
TYP
0.4
MAX
V
OL(P)
V
OL(V)
V
OH(V)
V
IH(D)
V
IL(D)
Quiet output, maximum dynamic V
0.8
V
V
V
V
V
OL
Quiet output, minimum dynamic V
Quiet output, minimum dynamic V
High-level dynamic input voltage
Low-level dynamic input voltage
−0.4
4.5
−0.8
OL
OH
2
0.8
NOTE 5: Characteristics are for surface-mount packages only.
operating characteristics, VCC = 5 V, TA = 25°C
PARAMETER
TEST CONDITIONS
No load, f = 1 MHz
TYP
UNIT
C
Power dissipation capacitance
10.5
pF
pd
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AHCT00, SN74AHCT00
QUADRUPLE 2-INPUT POSITIVE-NAND GATES
SCLS229K − OCTOBER 1995 − REVISED JULY 2003
PARAMETER MEASUREMENT INFORMATION
V
CC
S1
Open
GND
R = 1 kΩ
L
TEST
/t
S1
From Output
Under Test
Test
Point
From Output
Under Test
t
t
Open
PLH PHL
t
C
C
L
/t
V
CC
L
PLZ PZL
(see Note A)
(see Note A)
/t
GND
PHZ PZH
Open Drain
V
CC
LOAD CIRCUIT FOR
LOAD CIRCUIT FOR
TOTEM-POLE OUTPUTS
3-STATE AND OPEN-DRAIN OUTPUTS
3 V
0 V
1.5 V
Timing Input
t
w
t
h
3 V
t
su
3 V
0 V
1.5 V
1.5 V
Input
Input
1.5 V
1.5 V
Data Input
0 V
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
3 V
0 V
3 V
Output
Control
1.5 V
1.5 V
1.5 V
1.5 V
0 V
t
t
t
t
t
PZL
PLZ
PLH
PHL
Output
Waveform 1
V
≈V
OH
CC
In-Phase
Output
50% V
50% V
50% V
CC
50% V
CC
CC
S1 at V
CC
V
V
+ 0.3 V
OL
V
OL
V
OL
(see Note B)
t
t
t
PHL
PLH
PZH
PHZ
Output
Waveform 2
S1 at GND
V
OH
V
OH
Out-of-Phase
Output
− 0.3 V
OH
50% V
50% V
CC
CC
CC
≈0 V
V
OL
(see Note B)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t ≤ 3 ns, t ≤ 3 ns.
O
r
f
D. The outputs are measured one at a time with one input transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
5962-9682301Q2A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
5962-
9682301Q2A
SNJ54AHCT
00FK
5962-9682301QCA
5962-9682301QDA
SN74AHCT00D
ACTIVE
ACTIVE
ACTIVE
CDIP
CFP
J
14
14
14
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
-55 to 125
-55 to 125
-40 to 85
5962-9682301QC
A
SNJ54AHCT00J
W
D
5962-9682301QD
A
SNJ54AHCT00W
SOIC
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
AHCT00
SN74AHCT00DBLE
SN74AHCT00DBR
OBSOLETE
ACTIVE
SSOP
SSOP
DB
DB
14
14
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HB00
SN74AHCT00DBRE4
SN74AHCT00DBRG4
SN74AHCT00DE4
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SSOP
SSOP
SOIC
DB
DB
D
14
14
14
14
14
14
14
14
14
14
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
HB00
Green (RoHS
& no Sb/Br)
HB00
Green (RoHS
& no Sb/Br)
AHCT00
AHCT00
HB00
SN74AHCT00DG4
SOIC
D
50
Green (RoHS
& no Sb/Br)
SN74AHCT00DGVR
SN74AHCT00DGVRE4
SN74AHCT00DGVRG4
SN74AHCT00DR
TVSOP
TVSOP
TVSOP
SOIC
DGV
DGV
DGV
D
2000
2000
2000
2500
2500
2500
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
HB00
Green (RoHS
& no Sb/Br)
HB00
Green (RoHS
& no Sb/Br)
AHCT00
AHCT00
AHCT00
SN74AHCT00DRE4
SN74AHCT00DRG4
SOIC
D
Green (RoHS
& no Sb/Br)
SOIC
D
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
SN74AHCT00N
SN74AHCT00NE4
SN74AHCT00NSR
SN74AHCT00NSRE4
SN74AHCT00NSRG4
SN74AHCT00PW
ACTIVE
PDIP
PDIP
SO
N
14
14
14
14
14
14
14
14
25
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
SN74AHCT00N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
N
25
2000
2000
2000
90
Pb-Free
(RoHS)
N / A for Pkg Type
SN74AHCT00N
AHCT00
AHCT00
AHCT00
HB00
NS
NS
NS
PW
PW
PW
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
SO
Green (RoHS
& no Sb/Br)
SO
Green (RoHS
& no Sb/Br)
TSSOP
TSSOP
TSSOP
Green (RoHS
& no Sb/Br)
SN74AHCT00PWE4
SN74AHCT00PWG4
90
Green (RoHS
& no Sb/Br)
HB00
90
Green (RoHS
& no Sb/Br)
HB00
SN74AHCT00PWLE
SN74AHCT00PWR
OBSOLETE
ACTIVE
TSSOP
TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
-40 to 85
-40 to 85
2000
2000
2000
3000
3000
1
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
HB00
HB00
HB00
HB00
HB00
SN74AHCT00PWRE4
SN74AHCT00PWRG4
SN74AHCT00RGYR
SN74AHCT00RGYRG4
SNJ54AHCT00FK
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
VQFN
VQFN
LCCC
PW
PW
14
14
14
14
20
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
POST-PLATE
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-2-260C-1 YEAR
Level-2-260C-1 YEAR
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-55 to 125
Green (RoHS
& no Sb/Br)
RGY
RGY
FK
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
TBD
5962-
9682301Q2A
SNJ54AHCT
00FK
SNJ54AHCT00J
SNJ54AHCT00W
ACTIVE
ACTIVE
CDIP
CFP
J
14
14
1
1
TBD
TBD
A42
A42
N / A for Pkg Type
N / A for Pkg Type
-55 to 125
-55 to 125
5962-9682301QC
A
SNJ54AHCT00J
W
5962-9682301QD
A
SNJ54AHCT00W
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF SN54AHCT00, SN74AHCT00 :
Catalog: SN74AHCT00
•
Enhanced Product: SN74AHCT00-EP, SN74AHCT00-EP
•
Military: SN54AHCT00
•
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
25-Sep-2013
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
•
•
Enhanced Product - Supports Defense, Aerospace and Medical Applications
Military - QML certified for Military and Defense Applications
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
SN74AHCT00DBR
SN74AHCT00DGVR
SN74AHCT00DR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
2000
2000
2500
2000
2000
3000
330.0
330.0
330.0
330.0
330.0
330.0
16.4
12.4
16.4
16.4
12.4
12.4
8.2
6.8
6.5
8.2
6.9
3.75
6.6
4.0
2.5
1.6
2.1
2.5
1.6
1.15
12.0
8.0
16.0
12.0
16.0
16.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
9.0
8.0
SN74AHCT00NSR
SN74AHCT00PWR
SN74AHCT00RGYR
SO
NS
10.5
5.6
12.0
8.0
TSSOP
VQFN
PW
RGY
3.75
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
14-Jul-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
SN74AHCT00DBR
SN74AHCT00DGVR
SN74AHCT00DR
SSOP
TVSOP
SOIC
DB
DGV
D
14
14
14
14
14
14
2000
2000
2500
2000
2000
3000
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
367.0
38.0
35.0
38.0
38.0
35.0
35.0
SN74AHCT00NSR
SN74AHCT00PWR
SN74AHCT00RGYR
SO
NS
TSSOP
VQFN
PW
RGY
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,23
0,13
M
0,07
0,40
24
13
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–ā8°
0,75
1
12
0,50
A
Seating Plane
0,08
0,15
0,05
1,20 MAX
PINS **
14
16
20
24
38
48
56
DIM
A MAX
A MIN
3,70
3,50
3,70
3,50
5,10
4,90
5,10
4,90
7,90
7,70
9,80
9,60
11,40
11,20
4073251/E 08/00
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
D. Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
M
0,15
15
0,25
0,09
5,60
5,00
8,20
7,40
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
0,10
2,00 MAX
0,05 MIN
PINS **
14
16
20
24
28
30
38
DIM
6,50
5,90
6,50
5,90
7,50
8,50
7,90
10,50
9,90
10,50 12,90
A MAX
A MIN
6,90
9,90
12,30
4040065 /E 12/01
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-150
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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