SNJ54AS574J [TI]
具有三态输出的八路边沿触发式 D 型触发器 | J | 20 | -55 to 125;
| 型号： | SNJ54AS574J |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 具有三态输出的八路边沿触发式 D 型触发器 | J | 20 | -55 to 125 触发器 锁存器 |
| 文件： | 总8页 (文件大小：132K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
SN54ALS574B, SN54AS574 . . . J OR W PACKAGE
SN74ALS574B, SN74AS574 . . . DW OR N PACKAGE
(TOP VIEW)
• 3-State Buffer-Type Noninverting Outputs
Drive Bus Lines Directly
• Bus-Structured Pinout
• Buffered Control Inputs
OE
1D
2D
3D
4D
5D
6D
7D
8D
V
CC
1
2
3
4
5
6
7
8
9
10
20
19 1Q
18 2Q
17
16
15
14
13
12
11
• SN74ALS575A and ′AS575 Have
3Q
4Q
5Q
6Q
7Q
8Q
CLK
Synchronous Clear
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), Standard Plastic (N, NT)
and Ceramic (J, JT) 300-mil DIPs, and
Ceramic Flat (W) Packages
GND
SN54ALS574B, SN54AS574 . . . FK PACKAGE
(TOP VIEW)
description
These octal D-type edge-triggered flip-flops
feature 3-state outputs designed specifically for
bus driving. They are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
3
9
2
1 20 19
18 2Q
3D
4D
5D
6D
7D
4
5
6
7
8
17
16
15
14
3Q
4Q
5Q
6Q
The eight flip-flops enter data on the low-to-high
transition of the clock (CLK) input. The
SN74ALS575A, SN54AS575, and SN74AS575
may be synchronously cleared by taking the clear
(CLR) input low.
10 11 1213
SN54AS575 . . . JT OR W PACKAGE
SN74ALS575A, SN74AS575 . . . DW OR NT PACKAGE
(TOP VIEW)
The output-enable (OE) input does not affect
internal operations of the flip-flops. Old data can
be retained or new data can be entered while the
outputs are in the high-impedance state.
1
2
3
4
5
6
7
8
24
23
22
21
20
19
18
17
16
15
14
13
CLR
OE
1D
V
CC
NC
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
CLK
NC
2D
3D
4D
5D
6D
7D
8D
The
SN54ALS574B,
SN54AS574,
and
SN54AS575 are characterized for operation over
the full military temperature range of –55°C to
125°C. The SN74ALS574B, SN74ALS575A,
SN74AS574, and SN74AS575 are characterized
for operation from 0°C to 70°C.
9
10
11
12
NC
GND
SN54AS575 . . . FK PACKAGE
(TOP VIEW)
4
3
2
1 28 27 26
5
6
7
8
9
25
24
23
22
21
20
19
2D
3D
4D
NC
5D
6D
7D
2Q
3Q
4Q
NC
5Q
6Q
7Q
10
11
1213
18
14 15 16 17
NC – No internal connection
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
Function Tables
SN54ALS574B, SN74ALS574B, SN54AS574, SN74AS574
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLK
D
H
L
↑
↑
H
L
L
L
L
X
X
X
Q
0
H
Z
SN74ALS575A, SN54AS575, SN74AS575
(each flip-flop)
INPUTS
OUTPUT
Q
OE
L
CLR
CLK
D
X
H
L
L
H
H
H
X
↑
↑
L
H
L
L
L
↑
L
L
H
X
X
Q
0
H
Z
†
logic symbols
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
SN74ALS575A, SN54AS575,
SN74AS575
1
2
EN
C1
OE
EN
C1
1R
OE
11
14
1
CLK
CLK
CLR
2
3
4
5
6
7
8
9
19
1D
2D
3D
4D
5D
6D
7D
8D
1D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
18
17
16
15
14
13
12
3
22
21
20
19
18
17
16
15
1D
2D
3D
4D
5D
6D
7D
8D
1D
1Q
2Q
3Q
4Q
5Q
6Q
7Q
8Q
4
5
6
7
8
9
10
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
Pin numbers shown are for the DW, J, JT, N, and NT packages.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
logic diagrams (positive logic)
SN54ALS574B, SN74ALS574B,
SN54AS574, SN74AS574
SN74ALS575A, SN54AS575,
SN74AS575
1
2
OE
OE
14
1
11
2
CLK
CLK
CLR
1D
C1
1D
19
1Q
1D
C1
1D
22
1Q
3
To Seven Other Channels
To Seven Other Channels
Pin numbers shown are for the DW, J, JT, N, and NT packages.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54ALS574B . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74ALS574B, SN74ALS575A . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN74ALS574B
SN74ALS575A
SN54ALS574B
MIN NOM MAX
UNIT
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
IH
0.7
–1
12
28
0.8
–2.6
24
V
IL
I
mA
mA
OH
OL
I
′ALS574B
0
16.5
15
0
0
35
f
t
t
t
Clock frequency
MHz
ns
clock
SN74ALS575A
30
′ALS574B, CLK high or low
SN74ALS575A, CLK high or low
Data
14
16.5
15
15
0
Pulse duration
w
ns
Setup time before CLK↑
su
h
SN74ALS575A, CLR
Data
4
ns
Hold time after CLK↑
SN74ALS575A, CLR
0
T
A
Operating free-air temperature
–55
125
0
70
°C
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN74ALS574B
SN54ALS574B
SN74ALS575A
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
= –0.4 mA
= –1 mA
= –2.6 mA
= 12 mA
= 24 mA
= 2.7 V
V
–2
V
CC
–2
CC
OH
OH
OH
OL
OL
CC
2.4
3.3
V
OH
V
= 4.5 V
= 4.5 V
CC
CC
2.4
3.2
0.25
0.35
0.25
0.4
0.4
0.5
20
V
OL
V
V
I
I
I
I
I
I
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
20
–20
0.1
20
µA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–20
0.1
20
V = 7 V
I
mA
µA
V = 2.7 V
I
IH
V = 0.4 V
I
–0.2
–112
18
–0.2
–112
18
mA
mA
IL
‡
V
O
= 2.25 V
–20
–30
O
Outputs high
Outputs low
11
17
17
10
15
16
11
17
17
10
15
16
′ALS574B
V
= 5.5 V
= 5.5 V
27
27
CC
CC
Outputs disabled
Outputs high
Outputs low
28
28
I
mA
CC
17
17
SN74ALS575A
V
24
24
Outputs disabled
30
30
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
§
= MIN to MAX
SN54ALS574B SN74ALS574B SN74ALS575A
MIN
28
4
MAX
MIN
35
3
MAX
MIN
30
4
MAX
f
t
t
t
t
t
t
MHz
ns
max
PLH
PHL
PZH
PZL
PHZ
PLZ
22
17
21
26
16
25
14
14
18
18
10
12
14
14
18
18
10
13
CLK
Q
Q
Q
4
4
4
4
3
4
ns
ns
OE
OE
4
4
4
2
1
2
2
2
3
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
CC
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V
Operating free-air temperature range, T : SN54AS574, SN54AS575 . . . . . . . . . . . . . . . . . . –55°C to 125°C
A
SN74AS574, SN74AS575 . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
recommended operating conditions
SN54AS574
SN54AS575
SN74AS574
SN74AS575
UNIT
MIN NOM
MAX
MIN NOM
MAX
V
V
V
Supply voltage
4.5
2
5
5.5
4.5
2
5
5.5
V
V
CC
High-level input voltage
Low-level input voltage
High-level output current
Low-level output current
Clock frequency
IH
0.8
–12
32
0.8
–15
48
V
IL
I
I
f
mA
mA
MHz
OH
OL
clock
*
0
5
100
0
5.5
5.5
5.5
6.5
3
90
CLK high
t *
w
Pulse duration
ns
ns
CLK low
4
Data
3
t
su
*
Setup time before CLK↑
′AS575, CLR high or low
Data
6.5
3
t *
h
ns
Hold time after CLK↑
′AS575, CLR
0
0
T
A
Operating free-air temperature
–55
125
0
70
°C
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54AS574
SN54AS575
SN74AS574
SN74AS575
PARAMETER
TEST CONDITIONS
UNIT
†
†
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= 4.5 V,
I = –18 mA
–1.2
–1.2
V
IK
CC
I
= 4.5 V to 5.5 V,
I
I
I
I
I
= –2 mA
= –12 mA
= –15 mA
= 32 mA
= 48 mA
= 2.7 V
V
–2
CC
2.4
V
–2
CC
OH
OH
OH
OL
OL
CC
3.2
V
OH
V
= 4.5 V
= 4.5 V
CC
CC
2.4
3.3
0.29
0.5
V
OL
V
V
0.34
0.5
50
I
I
I
I
V
CC
V
CC
V
CC
V
CC
= 5.5 V,
= 5.5 V,
= 5.5 V,
= 5.5 V,
V
50
–50
0.1
µA
µA
mA
µA
OZH
OZL
I
O
O
V
= 0.4 V
–50
0.1
V = 7 V
I
V = 2.7 V
I
20
20
IH
OE, CLK, CLR
–0.5
–3
–0.5
–2
I
V
= 5.5 V,
= 5.5 V,
V = 0.4 V
mA
mA
IL
CC
CC
I
D
‡
I
O
V
V
O
= 2.25 V
–30
–112
116
134
134
126
142
142
–30
–112
116
134
134
126
142
142
Outputs high
Outputs low
73
85
84
78
89
88
73
85
84
78
89
88
′AS574
′AS575
V
= 5.5 V
= 5.5 V
CC
CC
Outputs disabled
Outputs high
Outputs low
I
mA
CC
V
Outputs disabled
†
‡
All typical values are at V
= 5 V, T = 25°C.
A
CC
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I
.
OS
switching characteristics (see Figure 1)
V
C
= 4.5 V to 5.5 V,
= 50 pF,
CC
L
R1 = 500 Ω,
R2 = 500 Ω,
T
A
FROM
TO
(OUTPUT)
§
= MIN to MAX
PARAMETER
(INPUT)
UNIT
SN54AS574
SN54AS575
SN74AS574
SN74AS575
MIN
100
3
MAX
MIN
90
3
MAX
f
t
t
t
t
t
t
*
MHz
ns
max
11
11
7
8
9
PLH
PHL
PZH
PZL
PHZ
PLZ
CLK
Any Q
Any Q
Any Q
4
4
2
2
6
ns
ns
OE
OE
3
11
7
3
10
6
2
2
2
7
2
6
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS574B, SN54AS574, SN54AS575
SN74ALS574B, SN74ALS575A, SN74AS574, SN74AS575
OCTAL D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS
SDAS165B – JUNE 1982 – REVISED JULY 1995
PARAMETER MEASUREMENT INFORMATION
SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7 V
R
= R1 = R2
V
CC
L
S1
R1
R
L
Test
Point
From Output
Under Test
From Output
Under Test
Test
Point
Test
Point
From Output
Under Test
C
C
L
R
L
R2
L
C
L
(see Note A)
(see Note A)
(see Note A)
LOAD CIRCUIT FOR
BI-STATE
TOTEM-POLE OUTPUTS
LOAD CIRCUIT
FOR OPEN-COLLECTOR OUTPUTS
LOAD CIRCUIT
FOR 3-STATE OUTPUTS
3.5 V
3.5 V
Timing
Input
High-Level
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
0.3 V
t
h
t
w
t
su
3.5 V
3.5 V
0.3 V
Data
Input
Low-Level
1.3 V
1.3 V
1.3 V
1.3 V
Pulse
0.3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATIONS
3.5 V
0.3 V
Output
Control
(low-level
enabling)
1.3 V
1.3 V
3.5 V
t
PZL
Input
1.3 V
1.3 V
t
PLZ
0.3 V
PHL
3.5 V
t
Waveform 1
S1 Closed
(see Note B)
t
PLH
1.3 V
V
OH
In-Phase
Output
1.3 V
1.3 V
1.3 V
V
OL
0.3 V
V
OL
t
PHZ
t
PLH
t
PZH
t
PHL
V
OH
V
Waveform 2
S1 Open
(see Note B)
OH
OL
Out-of-Phase
Output
(see Note C)
1.3 V
1.3 V
0.3 V
V
0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A.
C includes probe and jig capacitance.
L
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, t = t = 2 ns, duty cycle = 50%.
r
f
E. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuits and Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue
any product or service without notice, and advise customers to obtain the latest version of relevant information
to verify, before placing orders, that information being relied on is current and complete. All products are sold
subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those
pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
CERTAIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF
DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL
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