SNJ54AS873A [TI]

DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS; 双4位D类锁存器具有三态输出
SNJ54AS873A
型号: SNJ54AS873A
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS
双4位D类锁存器具有三态输出

锁存器 输出元件
文件: 总9页 (文件大小:138K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
SN54ALS873B, SN54AS873A . . . JT PACKAGE  
SN74ALS873B, SN74AS873A . . . DW OR NT PACKAGE  
(TOP VIEW)  
3-State Buffer-Type Outputs Drive Bus  
Lines Directly  
Bus-Structured Pinout  
1CLR  
1OE  
1D1  
1D2  
1D3  
1D4  
2D1  
2D2  
2D3  
V
CC  
1
2
3
4
5
6
7
8
9
24  
Package Options Include Plastic  
Small-Outline (DW) Packages, Ceramic  
Chip Carriers (FK), and Plastic (NT) and  
Ceramic (JT) DIPs  
23 1LE  
22 1Q1  
21 1Q2  
20 1Q3  
19 1Q4  
18 2Q1  
17 2Q2  
16 2Q3  
15 2Q4  
14 2LE  
13 2CLR  
description  
These dual 4-bit D-type latches feature 3-state  
outputs designed specifically for bus driving.  
These devices are particularly suitable for  
implementing buffer registers, I/O ports,  
bidirectional bus drivers, and working registers.  
2D4 10  
2OE 11  
GND 12  
The dual 4-bit latches are transparent D-type  
latches. While the latch-enable (LE) input is high,  
the Q outputs follow the data (D) inputs in true  
form, according to the function table. When LE is  
low, the outputs are latched. When the clear (CLR)  
SN54ALS873B, SN54AS873A . . . FK PACKAGE  
(TOP VIEW)  
input goes low, the  
Q
outputs go low  
independently of LE. The outputs are in the  
high-impedance state when the output-enable  
(OE) input is at a high logic level.  
4
3
2
1 28 27 26  
25  
1D2  
1D3  
1D4  
NC  
2D1  
2D2  
2D3  
1Q2  
1Q3  
1Q4  
NC  
2Q1  
2Q2  
2Q3  
5
6
7
8
9
24  
23  
22  
21  
20  
19  
The SN54ALS873B and SN54AS873A are  
characterized for operation over the full military  
temperature range of 55°C to 125°C. The  
SN74ALS873B  
and  
SN74AS873A  
are  
10  
11  
characterized for operation from 0°C to 70°C.  
12 13 14 15 16 17 18  
NC – No internal connection  
FUNCTION TABLE  
(each latch)  
INPUTS  
OUTPUT  
Q
OE  
L
LE  
X
D
X
H
L
CLR  
L
L
H
L
L
H
H
H
L
L
H
L
H
X
X
Q
0
H
X
X
Z
Copyright 1995, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
logic symbol  
logic diagram (each quad latch, positive logic)  
2
1OE  
OE  
EN  
C1  
C
23  
1LE  
1
1CLR  
LE  
3
22  
21  
20  
19  
1D1  
4
1D  
1Q1  
1Q2  
1Q3  
1Q4  
CLR  
1D2  
5
R
1D3  
6
C1  
1D  
Q1  
Q2  
Q3  
D1  
D2  
D3  
1D4  
R
11  
EN  
C1  
C
C1  
1D  
2OE  
14  
2LE  
13  
2CLR  
R
7
2D1  
8
18  
17  
16  
15  
C1  
1D  
1D  
2Q1  
2Q2  
2Q3  
2Q4  
2D2  
9
2D3  
10  
R
2D4  
C1  
1D  
Q4  
D4  
This symbol is in accordance with ANSI/IEEE Std 91-1984 and  
IEC Publication 617-12.  
Pin numbers shown are for the DW, JT, and NT packages.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V  
Operating free-air temperature range, T : SN54ALS873B . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
A
SN74ALS873B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN54ALS873B  
MIN NOM MAX  
SN74ALS873B  
MIN NOM MAX  
UNIT  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
IH  
0.7  
–1  
0.8  
2.6  
24  
V
IL  
I
I
mA  
mA  
°C  
OH  
OL  
12  
T
A
55  
125  
0
70  
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54ALS873B  
SN74ALS873B  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
= 4.5 V,  
I = 18 mA  
–1.2  
–1.2  
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
I
I
I
I
= 0.4 mA  
= 1 mA  
= 2.6 mA  
= 12 mA  
= 24 mA  
= 2.7 V  
V
– 2  
V
CC  
– 2  
CC  
OH  
OH  
OH  
OL  
OL  
CC  
2.4  
V
OH  
3.3  
V
V
= 4.5 V  
= 4.5 V  
CC  
CC  
2.4  
3.2  
0.25  
0.35  
0.25  
0.4  
0.4  
0.5  
V
OL  
V
V
I
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
V
20  
20  
0.1  
20  
µA  
µA  
OZH  
OZL  
I
O
O
V
= 0.4 V  
20  
0.1  
V = 7 V  
I
mA  
µA  
V = 2.7 V  
I
20  
20  
IH  
V = 0.4 V  
I
– 0.2  
112  
21  
– 0.2  
112  
21  
mA  
mA  
IL  
V
O
= 2.25 V  
20  
30  
O
Outputs high  
Outputs low  
11  
16  
20  
11  
16  
20  
I
V
CC  
= 5.5 V  
29  
29  
mA  
CC  
Outputs disabled  
31  
31  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
timing requirements over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Figure 1)  
SN54ALS873B SN74ALS873B  
UNIT  
MIN  
15  
10  
10  
7
MAX  
MIN  
15  
10  
10  
7
MAX  
CLR low  
LE high  
t
Pulse duration  
ns  
w
t
t
ns  
ns  
Setup time, data before LE↓  
Hold time, data after LE↓  
su  
h
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
switching characteristics (see Figure 1)  
V
C
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
R1 = 500 ,  
R2 = 500 ,  
T
A
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
= MIN to MAX  
SN54ALS873B SN74ALS873B  
MIN  
2
MAX  
23  
17  
31  
26  
27  
24  
23  
12  
30  
MIN  
2
MAX  
14  
14  
22  
21  
20  
18  
18  
10  
15  
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PLH  
PHL  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
ns  
2
2
8
8
LE  
CLR  
OE  
Q
Q
Q
ns  
ns  
ns  
8
8
6
6
4
4
4
4
2
2
OE  
Q
ns  
2
2
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)  
Supply voltage, V  
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
CC  
Input voltage, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V  
I
Voltage applied to a disabled 3-state output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5 V  
Operating free-air temperature range, T : SN54AS873A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55°C to 125°C  
A
SN74AS873A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C  
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and  
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not  
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.  
recommended operating conditions  
SN54AS873A  
MIN NOM MAX  
SN74AS873A  
MIN NOM MAX  
UNIT  
V
V
V
Supply voltage  
4.5  
2
5
5.5  
4.5  
2
5
5.5  
V
V
CC  
High-level input voltage  
Low-level input voltage  
High-level output current  
Low-level output current  
Operating free-air temperature  
IH  
0.8  
–12  
32  
0.8  
15  
48  
V
IL  
I
I
mA  
mA  
°C  
OH  
OL  
T
A
55  
125  
0
70  
4
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
electrical characteristics over recommended operating free-air temperature range (unless  
otherwise noted)  
SN54AS873A  
SN74AS873A  
PARAMETER  
TEST CONDITIONS  
UNIT  
MIN TYP  
MAX  
MIN TYP  
MAX  
V
V
V
= 4.5 V,  
I = 18 mA  
–1.2  
–1.2  
V
IK  
CC  
I
= 4.5 V to 5.5 V,  
I
I
I
I
I
= 2 mA  
= 12 mA  
= 15 mA  
= 32 mA  
= 48 mA  
= 2.7 V  
V
– 2  
V
CC  
– 2  
CC  
OH  
OH  
OH  
OL  
OL  
CC  
2.4  
V
OH  
3.2  
V
V
= 4.5 V  
= 4.5 V  
CC  
CC  
2.4  
3.3  
0.25  
0.5  
V
OL  
V
V
0.35  
0.5  
50  
I
I
I
I
I
I
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
V
CC  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
= 5.5 V,  
V
50  
50  
0.1  
µA  
µA  
OZH  
OZL  
I
O
O
V
= 0.4 V  
50  
0.1  
V = 7 V  
I
mA  
µA  
V = 2.7 V  
I
20  
20  
IH  
V = 0.4 V  
I
– 0.5  
112  
110  
– 0.5  
112  
110  
109  
129  
mA  
mA  
IL  
V
O
= 2.25 V  
30  
30  
O
Outputs high  
Outputs low  
68  
67  
80  
68  
67  
80  
I
V
CC  
= 5.5 V  
109  
129  
mA  
CC  
Outputs disabled  
All typical values are at V  
= 5 V, T = 25°C.  
A
CC  
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, I  
.
OS  
timing requirements over recommended ranges of supply voltage and operating free-air  
temperature (unless otherwise noted) (see Figure 1)  
SN54AS873A SN74AS873A  
UNIT  
MIN  
MAX  
MIN  
MAX  
CLR low  
LE high  
5
5
t *  
w
Pulse duration  
ns  
6
5
t
*
2
2
ns  
ns  
Setup time, data before LE↓  
Hold time, data after LE↓  
su  
t *  
4.5  
4.5  
h
* On products compliant to MIL-STD-883, Class B, this parameter is based on characterization data but is not production tested.  
5
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
switching characteristics (see Figure 1)  
V
C
= 4.5 V to 5.5 V,  
= 50 pF,  
CC  
L
R1 = 500 ,  
R2 = 500 ,  
T
A
FROM  
(INPUT)  
TO  
(OUTPUT)  
PARAMETER  
UNIT  
= MIN to MAX  
SN54AS873A SN74AS873A  
MIN  
3
MAX  
12.5  
8.5  
15.5  
9
MIN  
3
MAX  
9.5  
7.5  
13  
t
t
t
t
t
t
t
t
t
PLH  
PHL  
PLH  
PHL  
PHL  
PZH  
PZL  
PHZ  
PLZ  
D
Q
ns  
3
3
6
6
LE  
CLR  
OE  
Q
Q
Q
ns  
ns  
ns  
4
4
7.5  
9
3
10.5  
8
3
2
2
6.5  
10.5  
7.5  
7.5  
4
11  
4
2
8
2
OE  
Q
ns  
2
8.5  
2
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.  
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A  
DUAL 4-BIT D-TYPE LATCHES  
WITH 3-STATE OUTPUTS  
SDAS036D – APRIL 1982 – REVISED AUGUST 1995  
PARAMETER MEASUREMENT INFORMATION  
7 V  
SWITCH POSITION TABLE  
TEST  
S1  
Open  
t
Open  
Open  
Open  
Closed  
Open  
Closed  
S1  
PLH  
t
PHL  
PZH  
R1 = 500 Ω  
t
From Output  
Under Test  
t
PZL  
Test Point  
R2 = 500 Ω  
t
PHZ  
C
= 50 pF  
L
t
PLZ  
(see Note A)  
LOAD CIRCUIT FOR 3-STATE OUTPUTS  
3.5 V  
0.3 V  
1.3 V  
1.3 V  
High-Level  
Pulse  
1.3 V  
t
w
3.5 V  
Timing  
Input  
3.5 V  
0.3 V  
1.3 V  
Low-Level  
Pulse  
1.3 V  
0.3 V  
3.5 V  
0.3 V  
t
h
t
su  
VOLTAGE WAVEFORMS  
PULSE DURATION  
Data  
Input  
1.3 V  
1.3 V  
VOLTAGE WAVEFORMS  
SETUP AND HOLD TIMES  
3.5 V  
Output  
Control  
1.3 V  
1.3 V  
0.3 V  
3.5 V  
3.5 V  
t
1.3 V  
1.3 V  
PZL  
Input  
t
PLZ  
0.3 V  
PHL  
t
t
PLH  
Waveform 1  
S1 Closed  
(see Note B)  
1.3 V  
V
OH  
In-Phase  
Output  
1.3 V  
1.3 V  
V
OL  
V
OL  
0.3 V  
t
PHZ  
t
t
PZH  
PLH  
t
PHL  
V
OH  
V
Waveform 2  
S1 Open  
(see Note B)  
OH  
OL  
Out-of-Phase  
Output  
1.3 V  
1.3 V  
1.3 V  
0.3 V  
0 V  
V
VOLTAGE WAVEFORMS  
PROPAGATION DELAY TIMES  
VOLTAGE WAVEFORMS  
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS  
NOTES: A.  
C
L
includes probe and jig capacitance.  
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.  
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.  
C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, Z = 50 , t 2 ns, t 2 ns.  
O
r
f
D. The outputs are measured one at a time with one transition per measurement.  
Figure 1. Load Circuit and Voltage Waveforms  
7
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  
PACKAGE OPTION ADDENDUM  
www.ti.com  
28-Feb-2005  
PACKAGING INFORMATION  
Orderable Device  
Status (1)  
Package Package  
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)  
Qty  
Type  
LCCC  
CFP  
Drawing  
84032013A  
8403201KA  
ACTIVE  
OBSOLETE  
ACTIVE  
FK  
28  
24  
24  
24  
24  
1
None  
None  
None  
None  
Call TI  
Call TI  
Call TI  
Call TI  
Level-NC-NC-NC  
Call TI  
W
8403201LA  
CDIP  
CDIP  
SOIC  
JT  
1
1
Level-NC-NC-NC  
Level-NC-NC-NC  
SN54ALS873BJT  
SN74ALS873BDW  
ACTIVE  
JT  
ACTIVE  
DW  
25  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
SN74ALS873BDWR  
SN74ALS873BNT  
ACTIVE  
ACTIVE  
SOIC  
PDIP  
DW  
NT  
24  
24  
2000  
15  
Pb-Free  
(RoHS)  
CU NIPDAU Level-2-250C-1 YEAR/  
Level-1-235C-UNLIM  
Pb-Free  
(RoHS)  
CU NIPDAU Level-NC-NC-NC  
SN74ALS873BNT3  
SN74AS873ADW  
SN74AS873ADWR  
SN74AS873ANT  
SNJ54ALS873BFK  
SNJ54ALS873BJT  
SNJ54AS873AFK  
SNJ54AS873AJT  
SNJ54AS873AW  
OBSOLETE  
OBSOLETE  
OBSOLETE  
OBSOLETE  
ACTIVE  
PDIP  
SOIC  
SOIC  
PDIP  
LCCC  
CDIP  
LCCC  
CDIP  
CFP  
NT  
DW  
DW  
NT  
FK  
JT  
24  
24  
24  
24  
28  
24  
28  
24  
24  
None  
None  
None  
None  
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(1) The marketing status values are defined as follows:  
ACTIVE: Product device recommended for new designs.  
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.  
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in  
a new design.  
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.  
OBSOLETE: TI has discontinued the production of the device.  
(2)  
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional  
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None: Not yet available Lead (Pb-Free).  
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements  
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered  
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.  
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,  
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.  
(3)  
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder  
temperature.  
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IMPORTANT NOTICE  
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Copyright 2005, Texas Instruments Incorporated  

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