SNJ54HC148FK [TI]
8-LINE TO 3-LINE PRIORITY ENCODERS; 8号线到3线优先编码器
| 型号： | SNJ54HC148FK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 8-LINE TO 3-LINE PRIORITY ENCODERS |
| 文件： | 总17页 (文件大小：585K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢃꢇ
ꢇ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢐ ꢊꢋ ꢌꢁꢍ ꢑꢒ ꢌꢏ ꢒꢌꢎ ꢓ ꢍꢁꢅ ꢏ ꢔꢍ ꢒ ꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
SN54HC148 . . . J OR W PACKAGE
SN74HC148 . . . D, DW, N, OR NS PACKAGE
(TOP VIEW)
D
D
D
D
D
D
D
Wide Operating Voltage Range of 2 V to 6 V
Outputs Can Drive Up To 10 LSTTL Loads
Low Power Consumption, 80-µA Max I
CC
4
5
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Typical t = 16 ns
pd
4-mA Output Drive at 5 V
EO
GS
3
6
Low Input Current of 1 µA Max
Encode Eight Data Lines to 3-Line Binary
(Octal)
7
EI
2
A2
A1
GND
1
D
Applications Include:
− n-Bit Encoding
− Code Converters and Generators
0
A0
SN54HC148 . . . FK PACKAGE
(TOP VIEW)
description/ordering information
The ’HC148 devices feature priority decoding of
the inputs to ensure that only the highest-order
data line is encoded. These devices encode eight
data lines to 3-line (4-2-1) binary (octal).
Cascading circuitry (enable input EI and enable
output EO) has been provided to allow octal
expansion without the need for external circuitry.
Data inputs and outputs are active at the low logic
level.
3
2
1
20 19
18
GS
3
6
7
4
5
6
7
8
17
16
15
14
NC
2
NC
EI
1
A2
9 10 11 12 13
NC − No internal connection
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP − N
SOIC − D
Tube of 25
Tube of 40
Reel of 2500
Reel of 250
Reel of 2000
Reel of 2000
Tube of 25
Tube of 150
Tube of 55
SN74HC148N
SN74HC148N
SN74HC148D
SN74HC148DR
SN74HC148DT
SN74HC148DWR
SN74HC148NSR
SNJ54HC148J
SNJ54HC148W
SNJ54HC148FK
HC148
−40°C to 85°C
SOIC − DW
SOP − NS
CDIP − J
HC148
HC148
SNJ54HC148J
SNJ54HC148W
SNJ54HC148FK
−55°C to 125°C
CFP − W
LCCC − FK
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
ꢏ ꢘ ꢣ ꢛ ꢚꢦ ꢡꢠ ꢞꢟ ꢠꢚ ꢜꢣ ꢥꢗ ꢝꢘ ꢞ ꢞꢚ ꢭꢌ ꢋꢊ ꢑꢒ ꢮ ꢊꢐꢇꢂ ꢐꢂꢈ ꢝꢥꢥ ꢣꢝ ꢛ ꢝ ꢜꢢ ꢞꢢꢛ ꢟ ꢝ ꢛ ꢢ ꢞꢢ ꢟꢞꢢ ꢦ
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1
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ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ
ꢒ
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ꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
FUNCTION TABLE
INPUTS
OUTPUTS
EI
H
L
0
X
H
X
X
X
X
X
1
X
H
X
X
X
X
X
2
X
H
X
X
X
X
X
3
X
H
X
X
X
X
L
4
5
X
H
X
X
L
6
X
H
X
L
7
X
H
L
A2
H
H
L
A1
H
H
L
A0
H
H
L
GS
H
H
L
EO
H
L
X
H
X
X
X
L
L
H
H
H
H
H
L
H
H
H
H
L
L
H
L
L
L
H
H
H
L
H
H
L
L
L
H
H
L
H
L
L
L
H
H
L
L
L
L
X
X
L
X
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
L
H
H
H
L
L
L
L
H
H
H
H
H
2
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ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢃꢇ
ꢇ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢐ ꢊꢋ ꢌꢁꢍ ꢑꢒ ꢌꢏ ꢒꢌꢎ ꢓ ꢍꢁꢅ ꢏ ꢔꢍ ꢒ ꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
logic diagram (positive logic)
10
0
15
EO
14
GS
11
1
12
2
9
A0
13
3
1
4
7
A1
2
5
3
6
4
7
6
A2
5
EI
Pin numbers shown are for the D, DW, J, N, NS, and W packages.
3
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ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ
ꢇꢊ ꢋ ꢌ ꢁꢍ ꢎꢏ ꢐ ꢊꢋ ꢌ ꢁꢍ ꢑ ꢒꢌ ꢏ ꢒꢌ ꢎꢓ ꢍ ꢁꢅꢏ ꢔꢍ ꢒꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
CC
I
Input clamp current, I (V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
IK
I
CC
Output clamp current, I
(V < 0 or V > V ) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
OK
O O CC
Continuous output current, I (V = 0 to V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 mA
Continuous current through V
O
O
CC
CC
or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Package thermal impedance, θ (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W
JA
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC148
MIN NOM
SN74HC148
MIN NOM
UNIT
MAX
MAX
V
V
Supply voltage
2
1.5
5
6
2
1.5
5
6
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
V
CC
= 2 V
= 4.5 V
= 6 V
3.15
4.2
3.15
4.2
High-level input voltage
V
V
IH
= 2 V
0.5
1.35
1.8
0.5
1.35
1.8
= 4.5 V
= 6 V
V
IL
Low-level input voltage
V
V
Input voltage
0
0
V
V
0
0
V
V
V
V
I
CC
CC
Output voltage
O
CC
CC
V
CC
V
CC
V
CC
= 2 V
1000
500
400
125
1000
500
400
85
= 4.5 V
= 6 V
∆t/∆v
Input transition rise/fall time
ns
T
A
Operating free-air temperature
−55
−40
°C
NOTE 3: All unused inputs of the device must be held at V
or GND to ensure proper device operation. Refer to the TI application report,
CC
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢃꢇ
ꢇ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢐ ꢊꢋ ꢌꢁꢍ ꢑꢒ ꢌꢏ ꢒꢌꢎ ꢓ ꢍꢁꢅ ꢏ ꢔꢍ ꢒ ꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
T
= 25°C
SN54HC148
SN74HC148
A
PARAMETER
TEST CONDITIONS
V
UNIT
CC
MIN
TYP
MAX
MIN
1.9
4.4
5.9
3.7
5.2
MAX
MIN
1.9
MAX
2 V
4.5 V
6 V
1.9 1.998
4.4 4.499
5.9 5.999
4.4
I
= −20 µA
OH
5.9
V
V
V = V or V
IH
V
OH
OL
I
IL
I
I
= −4 mA
4.5 V
6 V
3.98
5.48
4.3
5.8
3.84
5.34
OH
= −5.2 mA
OH
2 V
0.002
0.001
0.001
0.17
0.15
0.1
0.1
0.1
0.1
0.26
0.26
100
8
0.1
0.1
0.1
0.1
4.5 V
6 V
I
= 20 µA
OL
0.1
0.1
V = V or V
V
I
IH
IL
I
I
= 4 mA
4.5 V
6 V
0.4
0.33
0.33
1000
80
OL
= 5.2 mA
0.4
OL
I
I
V = V
I
or 0
6 V
1000
160
10
nA
µA
pF
I
CC
V = V
I
or 0,
I
O
= 0
6 V
CC
CC
C
2 V to 6 V
3
10
10
i
switching characteristics over recommended operating free-air temperature range, C = 50 pF
L
(unless otherwise noted) (see Figure 1)
T
A
= 25°C
TYP
69
23
21
60
20
17
75
25
21
78
26
22
57
19
16
66
22
19
28
8
SN54HC148
SN74HC148
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
V
UNIT
CC
MIN
MAX
180
36
MIN
MAX
270
54
MIN
MAX
225
45
2 V
4.5 V
6 V
1−7
0−7
A0, A1, or A2
31
46
38
2 V
150
30
225
45
190
38
4.5 V
6 V
EO
GS
26
38
33
2 V
190
38
285
57
240
48
4.5 V
6 V
32
48
41
t
pd
ns
2 V
195
39
295
59
245
49
4.5 V
6 V
A0, A1, or A2
GS
33
50
42
2 V
145
29
220
44
180
36
4.5 V
6 V
EI
25
38
31
2 V
165
33
250
50
205
41
4.5 V
6 V
EO
28
43
35
2 V
75
110
22
95
t
t
Any
4.5 V
6 V
15
19
ns
6
13
19
16
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃꢄ ꢅ ꢆꢃ ꢇꢈ ꢀꢁ ꢉ ꢃ ꢄꢅꢆ ꢃ ꢇ
ꢇꢊ ꢋ ꢌ ꢁꢍ ꢎꢏ ꢐ ꢊꢋ ꢌ ꢁꢍ ꢑ ꢒꢌ ꢏ ꢒꢌ ꢎꢓ ꢍ ꢁꢅꢏ ꢔꢍ ꢒꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
operating characteristics, T = 25°C
A
PARAMETER
TEST CONDITIONS
TYP
UNIT
C
Power dissipation capacitance
No load
35
pF
pd
PARAMETER MEASUREMENT INFORMATION
V
CC
From Output
Under Test
Test
Point
Input
50%
50%
0 V
C
= 50 pF
L
t
t
PLH
PHL
90%
(see Note A)
V
V
OH
In-Phase
Output
90%
t
50%
10%
50%
10%
LOAD CIRCUIT
OL
t
r
f
f
t
t
PLH
PHL
90%
V
CC
V
V
90%
t
90%
OH
Input
50%
10%
50%
10%
90%
t
Out-of-Phase
Output
50%
10%
50%
10%
0 V
OL
t
r
f
t
r
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 6 ns, t = 6 ns.
C includes probe and test-fixture capacitance.
L
O
r
f
C. The outputs are measured one at a time, with one input transition per measurement.
D. and t are the same as t
t
.
PLH
PHL pd
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁꢂ ꢃ ꢄꢅ ꢆ ꢃꢇ ꢈ ꢀꢁꢉ ꢃꢄ ꢅꢆ ꢃꢇ
ꢇ ꢊꢋ ꢌꢁꢍ ꢎ ꢏ ꢐ ꢊꢋ ꢌꢁꢍ ꢑꢒ ꢌꢏ ꢒꢌꢎ ꢓ ꢍꢁꢅ ꢏ ꢔꢍ ꢒ ꢀ
SCLS109G − MARCH 1984 − REVISED APRIL 2004
APPLICATION INFORMATION
16-Line Data (active low)
0
0
1
1
2
2
3
3
4
4
5
5
6
6
7
8
0
9 10 11 12 13 14 15
Enable
(active low)
7 EI
1
2
3
4
5
6
7 EI
GS
’HC148
A1
’HC148
A1
EO A0
A2 GS
EO
A0
A2
’HC08
Priority Flag
(active low)
0
1
2
3
Encoded Data (active low)
16-Line Data (active low)
0
0
1
1
2
2
3
4
5
6
6
7
8
0
9 10 11 12 13 14 15
Enable
(active low)
3
4
5
7 EI
1
2
3
4
5
6
7 EI
GS
’HC148
A1
’HC148
A1
EO A0
A2 GS
EO
A0
A2
’HC00
Priority Flag
(active high)
0
1
2
3
Encoded Data (active high)
Figure 2. Priority Encoder for 16 Bits
Because the ’HC148 devices are combinational logic circuits, wrong addresses can appear during input transients.
Moreover, a change from high to low at EI can cause a transient low on GS when all inputs are high. This must be
considered when strobing the outputs.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
SOIC
Drawing
SN54HC148J
SN74HC148D
ACTIVE
ACTIVE
J
16
16
1
TBD
A42 SNPB
N / A for Pkg Type
D
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC148DE4
SN74HC148DR
SN74HC148DRE4
SN74HC148DT
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC148DTE4
250 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC148DW
SN74HC148DWR
OBSOLETE
ACTIVE
SOIC
SOIC
DW
DW
16
16
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN74HC148DWRE4
SN74HC148N
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
PDIP
SO
DW
N
16
16
16
16
16
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN74HC148NE4
SN74HC148NSR
SN74HC148NSRE4
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ54HC148FK
SNJ54HC148J
SNJ54HC148W
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CFP
FK
J
20
16
16
1
1
1
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB
A42
N / A for Pkg Type
N / A for Pkg Type
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
6-Dec-2006
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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