SNJ55451BFK [TI]
DUAL PERIPHERAL DRIVERS; DUAL外设驱动程序
| 型号： | SNJ55451BFK |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL PERIPHERAL DRIVERS |
| 文件： | 总17页 (文件大小：374K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
SN55451B, SN55452B,
SN55453B, SN55454B . . . JG PACKAGE
SN75451B, SN75452B,
SN75453B, SN75454B . . . D OR P PACKAGE
(TOP VIEW)
PERIPHERAL DRIVERS FOR
HIGH-CURRENT SWITCHING AT
VERY HIGH SPEEDS
Characterized for Use to 300 mA
High-Voltage Outputs
1A
1B
V
CC
1
2
3
4
8
7
6
5
No Output Latch-Up at 20 V (After
Conducting 300 mA)
2B
2A
2Y
1Y
High-Speed Switching
GND
Circuit Flexibility for Varied Applications
TTL-Compatible Diode-Clamped Inputs
Standard Supply Voltages
SN55451B, SN55452B
SN55453B, SN55454B . . . FK PACKAGE
(TOP VIEW)
Plastic DIP (P) With Copper Lead Frame
Provides Cooler Operation and Improved
Reliability
3
2
1
20 19
18
NC
2B
Package Options Include Plastic
Small-Outline Packages, Ceramic Chip
Carriers, and Standard Plastic and Ceramic
300-mil DIPs
NC
1B
4
5
6
7
8
17
16
15
14
NC
2A
NC
1Y
NC
NC
9 10 11 12 13
SUMMARY OF DEVICES
LOGIC OF
DEVICE
PACKAGES
COMPLETE CIRCUIT
NC – No internal connection
SN55451B
SN55452B
SN55453B
SN55454B
SN75451B
SN75452B
SN75453B
SN75454B
AND
NAND
OR
FK, JG
JG
FK, JG
JG
NOR
AND
NAND
OR
D, P
D, P
D, P
D, P
NOR
description
The SN55451B through SN55454B and SN75451B through SN75454B are dual peripheral drivers designed
for use in systems that employ TTL logic. This family is functionally interchangeable with and replaces the
SN75450 family and the SN75450A family devices manufactured previously. The speed of the devices is equal
to that of the SN75450 family, and the parts are designed to ensure freedom from latch-up. Diode-clamped
inputs simplify circuit design. Typical applications include high-speed logic buffers, power drivers, relay drivers,
lamp drivers, MOS drivers, line drivers, and memory drivers.
The SN55451B/SN75451B, SN55452B/SN75452B, SN55453B/SN75453B, and SN55454B/SN75454B are
dual peripheral AND, NAND, OR, and NOR drivers, respectively (assuming positive logic), with the output of
the logic gates internally connected to the bases of the npn output transistors.
The SN55’ drivers are characterized for operation over the full military range of –55°C to 125°C. The SN75’
drivers are characterized for operation from 0°C to 70°C.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
SN55’
7
SN75’
7
UNIT
V
Supply voltage, V
CC
(see Note 1)
Input voltage, V
5.5
5.5
30
5.5
5.5
30
V
I
Inter-emitter voltage (see Note 2)
Off-state output voltage, V
V
V
O
Continuous collector or output current, I
OK
(see Note 3)
400
500
400
500
mA
mA
Peak collector or output current, I (t ≤ 10 ms, duty cycle ≤ 50%, see Note 4)
I
w
Continuous total power dissipation
See Dissipation Rating Table
Operating free-air temperature range, T
–55 to 125
0 to 70
°C
°C
°C
°C
°C
A
Storage temperature range, T
stg
–65 to 150 –65 to 150
Case temperature for 60 seconds
FK package
JG package
D or P package
260
300
260
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
NOTES: 1. Voltage values are with respect to network GND, unless otherwise specified.
2. This is the voltage between two emitters of a multiple-emitter transistor.
3. This value applies when the base-emitter resistance (R ) is equal to or less than 500 Ω.
BE
4. Both halves of these dual circuits may conduct rated current simultaneously; however, power dissipation averaged over a short time
interval must fall within the continuous dissipation rating.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T = 125°C
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING POWER RATING
A
D
FK
JG
P
725 mW
5.8 mW/°C
11.0 mW/°C
8.4 mW/°C
8.0 mW/°C
464 mW
880 mW
672 mW
640 mW
—
1375 mW
275 mW
210 mW
—
1050 mW
1000 mW
recommended operating conditions
SN55’
SN75’
MIN NOM
UNIT
MIN NOM
MAX
MAX
Supply voltage, V
CC
4.5
2
5
5.5
4.75
2
5
5.25
V
V
High-level input voltage, V
IH
Low-level input voltage, V
0.8
0.8
70
V
IL
Operating free-air temperature, T
–55
125
0
°C
A
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
†
logic diagram (positive logic)
logic symbol
1
3
1A
2
&
3
5
1
2
1Y
1Y
2Y
1A
1B
1B
6
2A
7
5
4
6
7
2Y
2A
2B
2B
†
ThissymbolisinaccordancewithANSI/IEEEStd91-1984
and IEC publication 617-12.
GND
Pin numbers shown are for the D, JG, and P packages.
schematic (each driver)
FUNCTION TABLE
(each driver)
V
Y
CC
A
L
B
L
Y
4 kΩ
1.6 kΩ
130 Ω
L (on state)
L (on state)
L (on state)
H (off state)
L
H
L
H
H
H
A
B
positive logic:
Y = AB or A+B
500 Ω
1 kΩ
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
SN55451B
SN75451B
‡
PARAMETER
UNIT
TEST CONDITIONS
§
§
MIN TYP
MAX
MIN TYP
MAX
V
V
Input clamp voltage
V
V
= MIN,
= MIN,
= 100 mA
I = –12 mA
–1.2
–1.5
–1.2
–1.5
V
IK
CC
I
V
IL
V
IL
V
IH
= 0.8 V,
= 0.8 V,
= MIN,
CC
0.25
0.5
0.8
0.25
0.4
I
OL
Low-level output voltage
V
OL
V
= MIN,
CC
= 300 mA
0.5
0.5
0.7
I
OL
V
CC
V
OH
= MIN,
= 30 V
I
High-level output current
300
100
µA
OH
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1
7
–1.6
11
–1
7
–1.6
11
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 5 V
I
CCH
CCL
= MAX, V = 0
52
65
52
65
I
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
CC
A
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
18
18
5
MAX
25
25
8
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
Transition time, high-to-low-level output
7
12
SN55451B
SN75451B
V –6.5
S
V
= 20 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–6.5
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
†
logic diagram (positive logic)
logic symbol
3
5
1Y
2Y
1
1
1A
1A
1B
2A
2B
&
3
5
2
6
7
1Y
2Y
2
1B
6
2A
7
2B
4
†
GND
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
schematic (each driver)
Pin numbers shown are for the D, JG, and P packages.
V
CC
1.6 kΩ
4 kΩ
FUNCTION TABLE
(each driver)
130 Ω
1.6 kΩ
A
L
B
L
Y
H (off state)
H (off state)
H (off state)
L (on state)
Y
L
H
L
A
B
H
H
H
500 Ω
1 kΩ
1 kΩ
positive logic:
Y = AB or A+B
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
SN55452B
SN75452B
‡
PARAMETER
UNIT
TEST CONDITIONS
§
TYP
§
TYP
MIN
MAX MIN
MAX
V
V
Input clamp voltage
V
V
= MIN,
= MIN,
I = –12 mA
–1.2
0.25
–1.5
–1.2
0.25
–1.5
V
IK
CC
I
V
IH
V
IH
V
IL
= MIN,
= MIN,
= 0.8 V,
CC
0.5
0.8
0.4
0.7
I
= 100 mA
OL
Low-level output voltage
V
OL
V
= MIN,
CC
= 300 mA
0.5
0.5
I
OL
V
CC
V
OH
= MIN,
= 30 V
I
High-level output current
300
100
µA
OH
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1.1
11
–1.6
14
–1.1
11
–1.6
14
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 0
I
CCH
CCL
= MAX, V = 5 V
56
71
56
71
I
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
26
24
5
MAX
35
35
8
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
Transition time, high-to-low-level output
7
12
SN55452B
SN75452B
V –6.5
S
V
= 20 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–6.5
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
†
logic diagram (positive logic)
logic symbol
3
1
1
2
1Y
2Y
≥1
1A
2
3
5
1A
1B
1Y
2Y
1B
6
2A
7
5
4
6
7
2A
2B
2B
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
Pin numbers shown are for the D, JG, and P packages.
GND
V
schematic (each driver)
FUNCTION TABLE
(each driver)
CC
4 kΩ
1.6 kΩ
4 kΩ
130 Ω
A
L
B
L
Y
L (on state)
H (off state)
H (off state)
H (off state)
L
H
L
Y
H
H
A
B
H
positive logic:
Y = A+B or A B
500 Ω
1 kΩ
Resistor values shown are nominal.
GND
electrical characteristics over recommended operating free-air temperature range
SN55453B
SN75453B
‡
PARAMETER
UNIT
TEST CONDITIONS
§
TYP
§
TYP
MIN
MAX MIN
MAX
V
V
Input clamp voltage
V
V
= MIN,
= MIN,
I = –12 mA
–1.2
0.25
–1.5
–1.2
0.25
–1.5
V
IK
CC
I
V
IL
V
IL
V
IH
= 0.8 V,
= 0.8 V,
= MIN,
CC
0.5
0.8
0.4
0.7
I
= 100 mA
OL
Low-level output voltage
V
OL
V
= MIN,
= 300 mA
CC
0.5
0.5
I
OL
V
CC
V
OH
= MIN,
= 30 V
I
High-level output current
300
100
µA
OH
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX, V = 5.5 V
1
40
1
40
mA
µA
I
I
= MAX, V = 2.4 V
IH
I
Low-level input current
= MAX, V = 0.4 V
–1
8
–1.6
11
–1
8
–1.6
11
mA
mA
mA
IL
I
Supply current, outputs high
Supply current, outputs low
= MAX, V = 5 V
I
CCH
CCL
= MAX, V = 0
54
68
54
68
I
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
18
18
5
MAX
25
25
8
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
Transition time, high-to-low-level output
7
12
SN55453B
SN75453B
V –6.5
S
V
= 20 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–6.5
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
†
logic diagram (positive logic)
logic symbol
3
5
1
1A
1Y
2Y
1
≥1
1A
1B
2A
2B
3
5
2
2
6
7
1Y
2Y
1B
6
2A
7
2B
4
GND
†
This symbol is in accordance with ANSI/IEEE Std 91-1984
and IEC publication 617-12.
schematic (each driver)
Pin numbers shown are for the D, JG, and P packages.
V
CC
2 kΩ
2 kΩ
FUNCTION TABLE
(each driver)
1.6
kΩ
4 kΩ
4
kΩ
130 Ω
A
L
B
L
Y
H (off state)
L (on state)
L (on state)
L (on state)
Y
A
B
L
H
L
H
H
H
1 kΩ
1 kΩ
500 Ω
positive logic:
Y = A+B or AB
GND
Resistor values shown are nominal.
electrical characteristics over recommended operating free-air temperature range
SN55454B
SN75454B
‡
PARAMETER
Input clamp voltage
UNIT
TEST CONDITIONS
§
§
MIN TYP
MAX
MIN TYP
MAX
V
V
V
V
= MIN,
= MIN,
I = –12 mA
–1.2
0.25
–1.5
–1.2
0.25
–1.5
V
IK
CC
I
V
V
V
= MIN,
= MIN,
= 0.8 V,
CC
IH
IH
IL
0.5
0.8
0.4
0.7
I
= 100 mA
OL
Low-level output voltage
V
OL
V
I
= MIN,
CC
= 300 mA
0.5
0.5
OL
V
V
= MIN,
= 30 V
CC
OH
I
High-level output current
300
100
µA
OH
I
I
I
I
I
Input current at maximum input voltage
High-level input current
V
CC
V
CC
V
CC
V
CC
V
CC
= MAX,
= MAX,
= MAX,
= MAX,
= MAX,
V = 5.5 V
1
40
1
40
mA
µA
I
I
V = 2.4 V
I
IH
Low-level input current
V = 0.4 V
I
–1
13
61
–1.6
17
–1
13
61
–1.6
17
mA
mA
mA
IL
Supply current, outputs high
Supply current, outputs low
V = 0
I
CCH
CCL
V = 5 V
I
79
79
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
All typical values are at V
= 5 V, T = 25°C.
A
CC
switching characteristics, V
= 5 V, T = 25°C
A
CC
PARAMETER
TEST CONDITIONS
MIN
TYP
27
24
5
MAX
35
35
8
UNIT
t
t
t
t
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Transition time, low-to-high-level output
PLH
PHL
TLH
THL
I
R
≈ 200 mA,
= 50 Ω,
C = 15 pF,
L
See Figure 1
O
L
ns
Transition time, high-to-low-level output
7
12
SN55454B
SN75454B
V –6.5
S
V
= 20 V,
I
O
≈ 300 mA,
S
V
OH
High-level output voltage after switching
mV
See Figure 2
V
S
–6.5
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
PARAMETER MEASUREMENT INFORMATION
≤ 5 ns
90%
≤ 10 ns
3 V
Input
2.4 V
10 V
90%
1.5 V
Input
1.5 V
’451B
’453B
R
= 50 Ω
L
’451B
’452B
10%
90%
10%
0.5 µs
0 V
3 V
Output
Pulse
Generator
(see Note A)
≤ 5 ns
≤ 10 ns
Circuit
Under
Test
Input
’452B
’454B
90%
1.5 V
1.5 V
10%
10%
C
= 15 pF
0 V
L
t
t
(see Note B)
PHL
PLH
90%
’453B
’454B
GND SUB
V
OH
90%
50%
10%
50%
10%
Output
0.4 V
V
OL
TEST CIRCUIT
t
t
TLH
THL
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω.
O
B.
C includes probe and jig capacitance.
L
Figure 1. Test Circuit and Voltage Waveforms, Complete Drivers
V
S
= 20 V
≤ 5 ns
90%
≤ 10 ns
3 V
90%
1.5 V
Input
2 mH
1.5 V
Input
2.4 V
5 V
’451B
’453B
10%
10%
40 µs
0 V
3 V
1N3064
’451B
’452B
65 Ω
≤ 5 ns
90%
1.5 V
≤ 10 ns
Output
Pulse
Generator
(see Note A)
Input
’452B
’454B
90%
1.5 V
Circuit
Under
Test
10%
10%
C
= 15 pF
0 V
L
(see Note B)
V
OH
’453B
’454B
GND SUB
Output
0.4 V
V
OL
TEST CIRCUIT
VOLTAGE WAVEFORMS
NOTES: A. The pulse generator has the following characteristics: PRR ≤ 12.5 kHz, Z = 50 Ω.
O
B.
C includes probe and jig capacitance.
L
Figure 2. Test Circuit and Voltage Waveforms for Latch-Up Test of Complete Drivers
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN55451B, SN55452B, SN55453B, SN55454B
SN75451B, SN75452B, SN75453B, SN75454B
DUAL PERIPHERAL DRIVERS
SLRS021B – DECEMBER 1976 – REVISED SEPTEMBER 1999
TYPICAL CHARACTERISTICS
TRANSISTOR
COLLECTOR-EMITTER SATURATION VOLTAGE
vs
COLLECTOR CURRENT
0.6
I
I
C
= 10
B
See Note A
0.5
0.4
0.3
0.2
0.1
0
T
A
= 70°C
T
A
= 0°C
T
A
= 25°C
10
20
40
70 100
200
400
I
C
– Collector Current – mA
NOTE A: These parameters must be measured using pulse techniques,
t
w
= 300 µs, duty cycle ≤ 2%.
Figure 3
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
CDIP
SOIC
Drawing
5962-9563301Q2A
5962-9563301QPA
77049012A
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
FK
20
8
1
1
1
1
1
1
1
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
JG
FK
20
8
7704901PA
JG
77049022A
FK
20
8
7704902PA
JG
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
A42 SNPB
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
JM38510/12902BPA
JM38510/12903BPA
JM38510/12905BPA
SN55451BJG
JG
8
JG
8
JG
8
JG
8
SN55452BJG
JG
8
SN55453BJG
JG
8
SN55454BJG
JG
8
SN75451BD
D
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75451BDE4
SN75451BDR
SN75451BDRE4
SN75451BP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75451BPE4
SN75451BPSR
SN75451BPSRE4
SN75452BD
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PS
PS
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75452BDE4
SN75452BDR
SN75452BDRE4
SN75452BP
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75452BPE4
SN75452BPSR
SN75452BPSRE4
SN75453BD
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PS
PS
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
Orderable Device
SN75453BDE4
SN75453BDR
SN75453BDRE4
SN75453BP
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
PDIP
PDIP
SO
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75453BPE4
SN75453BPSR
SN75453BPSRE4
SN75454BD
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PS
PS
D
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SN75454BDE4
SN75454BDR
SN75454BDRE4
SN75454BP
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
SN75454BPE4
SN75454BPSR
SN75454BPSRE4
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
PS
PS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SNJ55451BFK
SNJ55451BJG
SNJ55452BFK
SNJ55452BJG
SNJ55453BFK
SNJ55453BJG
SNJ55454BFK
SNJ55454BJG
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
LCCC
CDIP
FK
JG
FK
JG
FK
JG
FK
JG
20
8
1
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42 SNPB N / A for Pkg Type
20
8
20
8
20
8
1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
12-Jan-2006
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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