TCA6507_16 [TI]
Low-Voltage 7-Bit I2C and SMBus LED Driver;
| 型号： | TCA6507_16 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | Low-Voltage 7-Bit I2C and SMBus LED Driver |
| 文件： | 总32页 (文件大小：721K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
1
FEATURES
•
Seven LED Driver Outputs: On, Off, Blinking,
Fading at Programmable Rates
•
Schmitt-Trigger Action Allows Slow Input
Transition and Better Switching Noise
Immunity at the Inputs
•
•
•
•
•
Open-Drain Outputs Directly Drive LEDs to
40 mA Max
–
–
–
Vhys = 0.18 V Typ at 1.8 V
Vhys = 0.25 V Typ at 2.5 V
Vhys = 0.33 V Typ at 3.3 V
Can Be Configured Into Two Independent
Banks of LED Drivers
Widely Programmable Blink Rates, Fade-On
and Fade-Off Rates and Maximum Intensity
•
•
5.5-V Tolerant Open-Drain Outputs
Low Standby Current with Shutdown
Capability for Additional Power Savings
LED Intensity Set Using Pulse Width
Modulation (PWM)
•
•
Internal Power-On Reset
Outputs Not Used as LED Drivers Can Be
Used as Regular General-Purpose Open-Drain
Outputs
Internal Oscillator Requires No External
Components
Programmed Through I2C Bus Interface Logic
Compatible With SMBus
400-kHz Fast I2C Bus
•
•
•
•
•
16 Steps of Maximum Intensity Control from
Fully-Off to Fully-On States
•
•
•
•
•
256 Intensity Levels During Fade-On or
Fade-Off for Smooth Perceived Transition
Noise Filter on SCL/SDA Inputs
No Glitch on Power Up
Operating Power-Supply Voltage Range of
1.65 V to 3.6 V
Supports Hot Insertion
ESD Protection Exceeds JESD 22
EVM Available
–
–
–
2000-V Human-Body Model (A114-A)
200-V Machine Model (A115-A)
1000-V Charged-Device Model (C101)
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
PW PACKAGE
(TOP VIEW)
ZXU PACKAGE
(TOP VIEW)
RUE PACKAGE
(TOP VIEW)
P6
C
B
A
V
1
2
3
4
5
6
7
14
13
12
11
10
9
P6
P5
P4
P3
P2
P1
P0
CC
V
12
1
2
3
4
5
11
10
9
P5
P4
P3
P2
P1
CC
SCL
SDA
EN
1
2
3
4
SCL
SDA
EN
GND
NC
8
6
7
GND
8
NC
P0
NC – No internal connection
DESCRIPTION/ORDERING INFORMATION
This 7-bit LED dimmer for the two-line bidirectional bus (I2C) is designed to control (or dim) LEDs via the I2C
interface [serial clock (SCL), serial data (SDA)]. Without this device, the microprocessor or microcontroller must
be actively involved in turning on and off the LEDs (per the required dimming rate), which uses valuable
processor time and the overloads I2C bus. The TCA6507 alleviates this issue by limiting the number of
operations required by the processor in blinking LEDs and, thus, helps to create a more efficient system.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
DESCRIPTION/ORDERING INFORMATION (CONTINUED)
ORDERING INFORMATION
TA
PACKAGE(1)(2)
ORDERABLE PART NUMBER
TCA6507ZXUR
TOP-SIDE MARKING
BGA – ZXU (Pb-free)
Reel of 2500
Reel of 3000
Reel of 2000
PH507
2M
–40°C to 85°C
QFN – RUE
TCA6507RUER
TSSOP – PW
TCA6507PWR
PH507
(1) Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
(2) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
website at www.ti.com.
This device can be used for driving LEDs and for general-purpose parallel output expansion. The TCA6507 has
three Select registers (Select0, Select1 and Select2), which can be used to configure each LED output into one
of seven different operating modes. At power on, the outputs are in high impedance.
When used to drive LEDs, the seven outputs can be configured into two banks of outputs (BANK0 and BANK1).
Each bank of outputs can be independently controlled for dimming rate and intensity through the I2C bus. The
dimming and blink rates are fully programmable. The intensity of each bank of LEDs is controlled by dynamically
varying the duty cycle of the signal, which has a period of approximately 8 ms and a pulse rate of 125 times per
second, driving the outputs. The TCA6507 has two independent dimming/blinking modules—PWM0 and
PWM1—driven by a single internal oscillator that supports these features. PWM0 determines the characteristics
of BANK0 and PWM1 determines the characteristics of BANK1.
The TCA6507 has a master intensity level known as the ambient light detection (ALD) value. The associated
pulse width modulation (PWM) signal for this value is PWMALD. The TCA6507 can be programmed such that
PWMALD overrides PWM0 or PWM1 so selected LEDs are on steadily at the master intensity level. Further, the
TCA6507 can be programmed such that the ALD value can override the maximum intensity values for PWM0
and PWM1. Thus, the ALD value can control the brightness of all LEDs whether they are on steadily or controlled
by one of the dimming modules. The ALD value is stored in the lower four bits of the One-Shot / Master Intensity
register.
When the I2C bus is idle, and intensity control is not used, the TCA6507 can be put into shutdown mode by
setting the enable (EN) pin low. This mode provides additional power savings, as it is a low-power mode where
the LEDs are off. A low signal on the EN pin also resets the registers and I2C/SMBus state machine in the
TCA6507 to their default state.
An initial setup command must be sent from the I2C master to the TCA6507 to program the dimming rate and
intensity (and intensity ramp if needed) for each bank of outputs. From then on, only one command from the bus
master is required to turn each individual output ON, OFF, or to cycle at the programmed dimming rate. The
default value for all time parameters is 256 ms so the default blink rate is approximately one per second.
The TCA6507 is optimized for 1.65 V to 3.6 V on the SDA/SCL side, but the LEDs can be driven by any voltage
up to 5.5 V. This allows the TCA6507 to interface with next-generation microprocessors and microcontrollers,
where supply levels are dropping down to conserve power.
This LED dimmer supports hot insertion.
ZXU PACKAGE TERMINAL ASSIGNMENTS
C
B
A
1
2
3
4
P1
P3
P4
P5
P2
EN
P0
P6
GND
SDA
SCL
VCC
2
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TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
TERMINAL FUNCTIONS
BALL
POSITION
PIN NO.
NAME
DESCRIPTION
BGA
(ZXU)
QFN
(RUE)
TSSOP
(PW)
A1
A2
A3
5
3
2
5
3
2
GND
SDA
SCL
Ground
Serial data bus. Connect to VCC through a pullup resistor.
Serial clock bus. Connect to VCC through a pullup resistor.
Supply voltage of I2C registers, oscillator and control logic. Connect directly to
A4
1
1
VCC
VCC of the external I2C master. Provides voltage-level translation.
B3
C1
B1
C2
C3
C4
B4
6
7
8
P0
P1
P2
P3
P4
P5
P6
P-port output 0. Open-drain design structure.
P-port output 1. Open-drain design structure.
P-port output 2. Open-drain design structure.
P-port output 3. Open-drain design structure.
P-port output 4. Open-drain design structure.
P-port output 5. Open-drain design structure.
P-port output 6. Open-drain design structure.
9
8
10
11
12
13
14
9
10
11
12
Enable input. If set to low, it puts the TCA6507 in shutdown mode and resets the
internal registers and I2C/SMBus state machine to their default states
B2
4
4
EN
FUNCTIONAL BLOCK DIAGRAM
SCL
I2C Bus
Control
Glitch
Filters
SDA
Select2
Register
Select1
Register
Select0
Register
Oscillator
PWMALD
PWM0
LED
Intensity
PWM1
Logic 0
Control
P6–P0
Shut
Down
EN
VCC
BRIGHT_F0
Fade/
Intensity
Control
Power-On
Reset
BRIGHT_F1
Logic 1
Registers
Figure 1. TCA6507 Functional Block Diagram
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TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
OUTPUT PORT SIMPLIFIED SCHEMATIC
Select2
Register
D
Q
FF
Select2
Pulse
CK
Q
Data From
Shift Register
Select1
Register
D
Q
Q
FF
CK
Select1
Pulse
Select0
Register
D
Q
Q
FF
CK
Select0
Pulse
Logic 1
A
B
C
BRIGHT_F0
P6–P0
BRIGHT_F1
A
B
ESD Protection
Diode
Logic 0
PWMALD
PWM0
A
B
C
D
GND
PWM1
4
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Product Folder Link(s): TCA6507
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
I2C Interface
The bidirectional I2C bus consists of the serial clock (SCL) and serial data (SDA) lines. Both lines must be
connected to a positive supply through a pullup resistor when connected to the output stages of a device. Data
transfer may be initiated only when the bus is not busy.
I2C communication with this device is initiated by a master sending a Start condition, a high-to-low transition on
the SDA input/output while the SCL input is high (see Figure 2). After the Start condition, the device address byte
is sent, most significant bit (MSB) first, including the data direction bit (R/W).
After receiving the valid address byte, this device responds with an acknowledge (ACK)–a low on the SDA
input/output during the high of the ACK-related clock pulse.
On the I2C bus, only one data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the high pulse of the clock period, as changes in the data line at this time are interpreted as control
commands (Start or Stop) (see Figure 3).
A Stop condition, a low-to-high transition on the SDA input/output while the SCL input is high, is sent by the
master (see Figure 2).
Any number of data bytes can be transferred from the transmitter to receiver between the Start and the Stop
conditions. Each byte of eight bits is followed by one ACK bit. The transmitter must release the SDA line before
the receiver can send an ACK bit. The device that acknowledges must pull down the SDA line during the ACK
clock pulse so that the SDA line is stable low during the high pulse of the ACK-related clock period (see
Figure 4). When a slave receiver is addressed, it must generate an ACK after each byte is received. Similarly,
the master must generate an ACK after each byte that it receives from the slave transmitter. Setup and hold
times must be met to ensure proper operation.
A master receiver signals an end of data to the slave transmitter by not generating an acknowledge (NACK) after
the last byte has been clocked out of the slave. This is done by the master receiver by holding the SDA line high.
In this event, the transmitter must release the data line to enable the master to generate a Stop condition.
SDA
SCL
S
P
Stop Condition
Start Condition
Figure 2. Definition of Start and Stop Conditions
SDA
SCL
Data Line
Change
Figure 3. Bit Transfer
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TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
Data Output
by Transmitter
NACK
Data Output
by Receiver
ACK
SCL From
Master
1
2
8
9
S
Clock Pulse for
Acknowledgment
Start
Condition
Figure 4. Acknowledgment on the I2C Bus
Table 1. Interface Definition
BIT
BYTE
7 (MSB)
6
0
5
0
4
0
3
1
2
1
1
0 (LSB)
I2C slave address
Px I/O data bus
1
X(1)
0
R/W
P0
P6
P5
P4
P3
P2
P1
(1) X = Don't care
Device Address
The address of the TCA6507 is shown in Figure 5.
Fixed Slave Address
1
0
0
0
1
0
1
R/W
Figure 5. TCA6507 Address
The last bit of the slave address defines the operation (read or write) to be performed. High (1) selects a read
operation, and low (0) selects a write operation.
Control Register and Command Byte
Following the successful acknowledgment of the address byte, the bus master sends a command byte, which is
stored in the control register. The last four bits (B0, B1, B2 and B3) of this command byte determine the internal
registers (Select0, Select1, Select2, Fade-On Time, Fully-On Time, Fade-Off Time, First Fully-Off Time, Second
Fully-Off Time, Maximum Intensity and Initialization) that are affected. The command byte is sent only during a
write transmission.
6
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TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
After the command byte is received, the I2C master starts sending data bytes. The first data byte goes into the
internal register defined by the command byte. Bit B4 in the command byte is used to determine the
programming mode. If B4 is low, all data bytes are written to the register defined by B0, B1, B2, and B3. If B4 is
high, the last four bits of the command byte are automatically incremented after the byte is written, and the next
data byte is stored in the corresponding register. Registers are written in the sequence shown in Table 3. Once
the Initialization register (register 10) is written to, the command byte returns to 0 (Select0 register). Registers 11
to 15 are reserved, and a command byte that references these registers is not acknowledged by the TCA6507.
The upper three bits (B7–B5) of the command byte must be programmed as zeroes for proper operation.
If a Stop condition occurs after the command byte is received, the TCA6507 stores the command byte and then
remains idle until the I2C master sends the next operation.
B7 B6 B5 B4 B3 B2 B1 B0
Figure 6. Control Register Bits
Table 2. Command Byte
BIT
B7
B6
B5
B4
B3
B2
B1
B0
FUNCTION
Reserved. Must be programmed as 0.
Reserved. Must be programmed as 0.
Reserved. Must be programmed as 0.
Auto increment
Register address 3
Register address 2
Register address 1
Register address 0
Table 3. Control Register Description
CONTROL REGISTER BITS
COMMAND
REGISTER
POWER-UP
DEFAULT
PROTOCOL
BYTE (HEX)
B3
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
B2
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
B1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
B0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0x00
0x01
0x02
0x03
0x04
0x05
0x06
0x07
0x08
0x09
0x10
0x11
0x12
0x13
0x14
0x15
Select0
Select1
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Read/write byte
Write byte
0000 0000
0000 0000
0000 0000
0100 0100
0100 0100
0100 0100
0100 0100
0100 0100
1111 1111
0000 1111
N/A
Select2
Fade-On Time
Fully-On Time
Fade-Off Time
First Fully-Off Time
Second Fully-Off Time
Maximum Intensity
One Shot / Master Intensity
Initialization
Reserved
N/A
N/A
Reserved
N/A
N/A
Reserved
N/A
N/A
Reserved
N/A
N/A
Reserved
N/A
N/A
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LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
Register Descriptions
The Select0 register (register 0), Select1 (register 1), and Select2 register (register 2) configure the state of each
of the outputs (see Table 4) .
Table 4. Select2, Select1, and Select0 Register States
SELECT2
SELECT1
SELECT0
STATE
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
LED off (high impedance)
LED off (high impedance)
LED on steadily with maximum intensity value of PWM0 (ALD value or BRIGHT_F0 value)
LED on steadily with maximum intensity value of PWM1 (ALD value or BRIGHT_F1 value)
LED fully on (output low). Can be used as general-purpose output
LED on at brightness set by One Shot / Master Intensity register
LED blinking with intensity characteristics of BANK0 (PWM0)
LED blinking with intensity characteristics of BANK1 (PWM1)
Table 5. Register 0 (Select0 Register)
BIT
S0-7
X(1)
S0-6
0
S0-5
0
S0-4
0
S0-3
0
S0-2
0
S0-1
0
S0-0
0
DEFAULT
(1) X = Don't care
Table 6. Register 1 (Select1 Register)
BIT
S1-7
X(1)
S1-6
0
S1-5
0
S1-4
0
S1-3
0
S1-2
0
S1-1
0
S1-0
0
DEFAULT
(1) X = Don't care
Table 7. Register 2 (Select2 Register)
BIT
S1-7
X(1)
S1-6
0
S1-5
0
S1-4
0
S1-3
0
S1-2
0
S1-1
0
S1-0
0
DEFAULT
(1) X = Don't care
To use a P port as a general-purpose output, Select1 and Select0 registers must be set low (or 0), then the
inverse of the data written to the Select2 bit appears on the open-drain output.
The intensity of each bank of LEDs can be customized by programming six registers: Fade-On Time, Fully-On
Time, Fade-Off Time, First Fully-Off Time, Second Fully-Off Time, and Maximum Intensity registers. Each bank is
designed to produce two identical intensity pulses per blink cycle. Both pulses have the same fade-on, fully-on
and fade-off times, but independent fully-off times to achieve a double-blink effect when desired.
The Fade-On Time register (register 3) defines the time from the fully-off state to the fully-on state for the LED
per region A in Figure 7. The first four bits (C7–C4) in this register set the fade-on time for BANK1, and the next
four bits (C3–C0) set the fade-on time for BANK0. The data for each bank is a binary number between 0 and 15.
For BANK1, the MSB is bit C7, while the least significant bit (LSB) is bit C4. For BANK0, the MSB is bit C3 while
the LSB is bit C0. See Table 13 for more information.
Table 8. Register 3 (Fade-On Time Register)
BANK
BIT
BANK1
BANK0
C7
0
C6
1
C5
0
C4
0
C3
0
C2
1
C1
0
C0
0
DEFAULT
8
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LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
The Fully-On Time register (register 4) defines the time spent at maximum intensity between the fade-on state
and fade-off state for the LED per region B in Figure 7. The first four bits (C7–C4) in this register set the fully-on
time for BANK1, and the next four bits (C3–C0) set the fully-on time for BANK0. The data for each bank is a
binary number between 0 and 15. For BANK1, the MSB is bit C7, while the LSB is bit C4. For BANK0, the most
significant bit (MSB) is bit C3, while the LSB is bit C0. See Table 13 for more information.
Table 9. Register 4 (Fully-On Time Register)
BANK
BIT
BANK1
BANK0
C7
0
C6
1
C5
0
C4
0
C3
0
C2
1
C1
0
C0
0
DEFAULT
The Fade-Off Time register (register 5) defines the time from the fully-on state to the fully-off state for the LED
per region C in Figure 7. The first four bits (C7–C4) in this register set the fade-off time for BANK1, and the next
four bits (C3–C0) set the fade-off time for BANK0. The data for each bank is a binary number between 0 and 15.
For BANK1, the MSB is bit C7, while the LSB is bit C4. For BANK0, the MSB is bit C3, while the least significant
bit (LSB) is bit C0. See Table 13 for more information.
Table 10. Register 5 (Fade-Off Time Register)
BANK
BIT
BANK1
BANK0
C7
0
C6
1
C5
0
C4
0
C3
0
C2
1
C1
0
C0
0
DEFAULT
The first and second Fully-Off Time registers (registers 6 and 7) define the time spent at zero intensity (in the
fully-off state of the LED) per region D and E, respectively, in Figure 7. The first four bits (C7–C4) in this register
set the fully-off time for BANK1, and the next four bits (C3–C0) set the fully-off time for BANK0. The data for
each bank is a binary number between 0 and 15. For BANK1, the MSB is bit C7, while the LSB is bit C4. For
BANK0, the MSB is bit C3, while the LSB is bit C0. See Table 13 for more information.
Table 11. Register 6 (First Fully-Off Time Register)
BANK
BIT
BANK1
BANK0
C7
0
C6
1
C5
0
C4
0
C3
0
C2
1
C1
0
C0
0
DEFAULT
Table 12. Register 7 (Second Fully-Off Time Register)
BANK
BIT
BANK1
BANK0
C7
0
C6
1
C5
0
C4
0
C3
0
C2
1
C1
0
C0
0
DEFAULT
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LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
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SCPS164B–MAY 2007–REVISED NOVEMBER 2007
Table 13. Time Parameters
CODE
TIME (ms)
0
0
1
64
2
128
3
192
4 (default)
256
5
6
384
512
7
768
8
1024
1536
2048
3072
4096
5760
8128
16320
9
10
11
12
13
14
15
The Maximum Intensity register (register 8) defines the duty cycle of the waveform driving the LED in its fully-on
state per region F in Figure 7. The first four bits (C7–C4) in this register set the duty cycle for BANK1 and the
next four bits (C3–C0) set the duty cycle for BANK0. The data for each bank is a binary number between 0 and
15. For BANK1, the MSB is bit C7, while the LSB is bit C4. For BANK0, the MSB is bit C3, while the LSB is bit
C0. The values in this register also define the LED intensity indicated by the BRIGHT_F0 or BRIGHT_F1 modes.
The intensity of each LED is updated 125 times per second (every 8 ms with a 32-kHz clock).
Table 14. Register 8 (Maximum Intensity Register)
BANK
BIT
BANK1
BANK0
C7
1
C6
1
C5
1
C4
1
C3
1
C2
1
C1
1
C0
1
DEFAULT
Table 15. Intensity Parameters (see Figure 7)
REGISTER
RANGE
REGION
A1, A2
B1, B2
C1, C2
D
PARAMETER NAME
Fade-on time
PARAMETER RANGE
REGISTER NAME
Fade-On Time
REGISTER
0 to 16320 ms
(exponential trend)
0 to 15
2
3
4
5
0 to 16320 ms
(exponential trend)
Fully-on time
0 to 15
0 to 15
0 to 15
Fully-On Time
0 to 16320 ms
(exponential trend)
Fade-off time
Fade-Off Time
0 to 16320 ms
(exponential trend)
First fully-off time
First Fully-Off Time
0 to 16320 ms
(exponential trend)
E
F
Second fully-off time
Maximum intensity
0 to 15
0 to 15
Second Fully-Off Time
Maximum Intensity
6
7
0 to 100%
10
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A1
B1
C1
D
A2
B2
C2
E
F or ALD
Figure 7. LED Intensity Per Bank
100%
Approximately 75%
Intensity
Approximately 25%
0%
VOH
I/O port
Voltage
VOL
8 ms
2 ms
8 ms
6 ms
Figure 8. Output Port Voltage vs LED Intensity, Maximum Intensity = 100%
50%
Approximately 37.5%
Intensity
Approximately
12.5%
0%
VOH
I/O port
Voltage
VOL
8 ms
1 ms
8 ms
8 ms
4 ms
3 ms
Figure 9. Output Port Voltage vs LED Intensity, Maximum Intensity = 50%
The One-Shot / Master Intensity register (register 9) (see Table 16) is an 8-bit register with three functions.
Bits 0–3 set the master intensity value (ALD). It is a binary number between 0 and 15.
Bits 4–5 determine whether the maximum intensity of PWM0 and PWM1 is set by the programmed F value
(BRIGHT_F0 or BRIGHT_F1) or the master ALD value. The default value for these bits is 0. Bit 4 supports
PWM0 and bit 5 is for PWM1. If bit 4 (or bit 5) is 0, the maximum intensity value for PWM0 (or PWM1) is set by
the F value. If bit 4 (or bit 5) is 1, the maximum intensity value for PWM0 (or PWM1) is set by the master ALD
value. This allows the user to vary the brightness of all LEDs by changing a single register.
Bits 6–7 determine whether each PWM operates in normal or one-shot mode. Bit 6 supports PWM0 and bit 7 is
for PWM1. If bit 6 (or bit 7) is 0, PWM0 (or PWM1) operates in the normal mode where the LEDs goes through
the full intensity cycle defined by Table 15 and Figure 7. If bit 6 (or bit 7) is 1, PWM0 (or PWM1) operate in the
one-shot mode. In this mode, the LEDs can be used to create a single-shot lighting effect where the LED
intensity is valid for a particular segment of the cycle shown in Table 15 and Figure 7.
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Table 16. One-Shot / Master Intensity Register
BIT
DESCRIPTION
Master intensity (ALD) value. Valid values are 0 to 15.
0–3
Determines whether maximum intensity of PWM0 is set by the programmed F value or the master ALD value
4
5
6
7
0 = F value
1 = ALD value
Determines whether maximum intensity of PWM1 is set by the programmed F value or the master ALD value
0 = F value
1 = ALD value
Determines if PWM0 operates in normal or one-shot mode
0 = Normal mode
1 = One-shot mode
Determines if PWM1 operates in normal or one-shot mode
0 = Normal mode
1 = One-shot mode
The Initialization register (register 10) determines whether to initialize each PWM and, if so, provides the starting
point of the LED intensity cycle for each bank. Bits 0–3 (C0–C3) are for BANK0 and bits 4–7 (C4–C7) are for
BANK1.
Bits 0–2 provide the starting point for PWM0. If bit 3 is high (or 1), it initializes PWM0.
Bits 4–6 provide the starting point for PWM1. If bit 7 is high (or 1), it initialized PWM1.
In the one-shot mode for BANK0, the LEDs start at the beginning of the region defined by C2, C1, and C0 in the
Initialization register and, when it reaches the end of that region, the LED stays at that intensity level defined at
the end of the region. When the stop point is reached, all P ports attached to PWM0 disconnect from PWM0 and
stay at either the maximum intensity level for PWM0 (BRIGHT_F0 or ALD value) or the OFF state. The bits in the
Select2 and Select1 registers change to reflect the final state of the LED at that time. PWM0 continues running
and is free to be used by other LEDs. The one-shot mode works similarly for BANK1.
Upon writing to this register, each bank is initialized to the state listed in Table 18 and Table 19.
Table 17. Register 10 (Initialization Register)
BANK
BIT
BANK1
BANK0
C7
C6
C5
C4
C3
C2
C1
C0
Table 18. BANK1
C6
0
C5
0
C4
INTENSITY CYCLE
Beginning at region A1 in Table 15 and Figure 6
Beginning at region B1 in Table 15 and Figure 6
Beginning at region C1 in Table 15 and Figure 6
Beginning at region D in Table 15 and Figure 6
Beginning at region A2 in Table 15 and Figure 6
Beginning at region B2 in Table 15 and Figure 6
Beginning at region C2 in Table 15 and Figure 6
Beginning at region E in Table 15 and Figure 6
0
1
0
1
0
1
0
1
0
0
0
1
0
1
1
0
1
0
1
1
1
1
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Table 19. BANK0
C2
0
C1
0
C0
0
STARTING POINT OF INTENSITY CYCLE
Beginning at region A1 in Table 15 and Figure 6
Beginning at region B1 in Table 15 and Figure 6
Beginning at region C1 in Table 15 and Figure 6
Beginning at region D in Table 15 and Figure 6
Beginning at region A2 in Table 15 and Figure 6
Beginning at region B2 in Table 15 and Figure 6
Beginning at region C2 in Table 15 and Figure 6
Beginning at region E in Table 15 and Figure 6
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
Power-On Reset
When power (from 0 V) is applied to VCC, an internal power-on reset holds the TCA6507 in a reset condition until
VCC has reached VPOR. At that point, the reset condition is released, and the TCA6507 registers and I2C/SMBus
state machine initialize to their default states.
After the initial power-up phase, VCCI must be lowered to below 0.2 V and then back up to the operating voltage
(VCCI) for a power-reset cycle.
Enable and Reset
If the enable (EN) input is set to low, the TCA6507 is put in the standby or shutdown mode. In this mode, the
oscillator is turned off, the registers are returned to their default state, and the the I2C/SMBus state machine is
initialized. This mode is useful for low power consumption. An internal filtering circuit prevents negative glitches
from accidentally shutting down the device. EN must be low for a minimum of approximately 60 µs to ensure a
shutdown state.
The system master can reset the TCA6507 in the event of a timeout or other improper operation by setting EN
low for a minimum of approximately 60 µs. This has the same effect as a power-on reset without depowering the
TCA6507.
The oscillator start up time (tOSC) is measured from the point when EN is set high.
Bus Transactions
Data is exchanged between the master and TCA6507 through read and write commands.
Reads
The bus master first must send the TCA6507 address with the LSB set to a logic 0 (see Figure 5 for device
address). The command byte is sent after the address and determines which register is accessed. After a restart,
the device address is sent again but, this time, the LSB is set to a logic 1. Data from the register defined by the
command byte then is sent by the TCA6507 (see Figure 10). Data is clocked into the register on the rising edge
of the ACK clock pulse.
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ACK From
ACK From
Slave
ACK From
Slave
ACK From
Slave
Data From Register
Slave Address
Slave Address
Master
Command Byte
1
1
S
1
0
0
0
1
0
0
A
A
S
1
0
0
0
1
0
1
A
Data
A
First Byte
R/W
R/W
At this moment, master-transmitter
becomes master-receiver, and
slave-receiver becomes
slave-transmitter
NACK From
Data From Register
Master
Data
P
NA
Last Byte
Figure 10. Read From Register
Writes
Data is transmitted to the TCA6507 by sending the device address and setting the LSB to a logic 0 (see Figure 5
for device address). The command byte is sent after the address and determines which register receives the
data that follows the command byte (see Figure 11 through Figure 13).
SCL
1
2
3
4
5
6
7
8
9
Slave Address
Command Byte
Data to Register
Data
0
SDA
SDA
SDA
S
1
0
0
1
0
1
0
A
0
0
0
0
0
0
0
0
A
A
P
Start Condition
R/W ACK From Slave
ACK From Slave
ACK From Slave
Figure 11. Write to Select0 Register
<br/>
SCL
1
2
3
4
5
6
7
1
8
0
9
Slave Address
Command Byte
Data to Register
Data
S
1
0
0
0
1
0
A
0
0
0
0
0
0
0
1
A
A
P
Start Condition
R/W ACK From Slave
ACK From Slave
ACK From Slave
Figure 12. Write to Select1 Register
<br/>
SCL
1
2
3
4
5
6
7
1
8
0
9
Slave Address
Command Byte
Data to Register
Data
S
1
0
0
0
1
0
A
0
0
0
0
0
1
0
0
A
A
P
Start Condition
R/W ACK From Slave
ACK From Slave
ACK From Slave
Figure 13. Write to Fully-On Time Register
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Absolute Maximum Ratings(1)
over operating free-air temperature range (unless otherwise noted)
MIN
–0.5
–0.5
MAX UNIT
VCC
VI
Supply voltage range
Input voltage range(2)
Output voltage(2)
4.6
6.5
V
V
VO
IIK
6.5
V
Input clamp current
Output clamp current
VI < 0
SCL, EN
P port, SDA
P port
±20
±20
50
mA
mA
IOK
VO < 0 or VO > VCC
IOL
Continuous output low current
VO = 0 to VCC
mA
mA
SDA
25
Continuous current through GND
Continuous current through VCC
250
20
ICC
PW package
RUE package
ZXU package
112.6
θJA
Package thermal impedance(3)
128 °C/W
TBD
Tstg
Storage temperature range
–65
150
°C
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
(3) The package thermal impedance is calculated in accordance with JESD 51-7.
Recommended Operating Conditions
MIN
1.65
MAX UNIT
VCC
VIH
Supply voltage of I2C registers, oscillator, and control logic
3.6
3.6
3.6
0.3
V
1.65 V ≤ VCC ≤ 1.95 V
1.96 V ≤ VCC ≤ 3.6 V
1.65 V ≤ VCC ≤ 1.95 V
1.96 V ≤ VCC ≤ 3.6 V
1.3
High-level input voltage
Low-level input voltage
SCL, SDA, EN
V
0.7 × VCC
–0.5
VIL
SCL, SDA, EN
V
V
–0.5 0.3 × VCC
VO
IOL
TA
Output voltage
0
5.5
(1)
Low-level output current
40 mA
85 °C
Operating free-air temperature
–40
(1) The total current sourced by the P port must be limited to 200 mA.
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Electrical Characteristics
GND = 0 V, TA = –40°C to 85°
PARAMETER
TEST CONDITIONS
Operating mode
VCC
MIN
23
TYP(1)
MAX UNIT
Intensity control clock
frequency
fINT
1.65 V to 3.6 V
32
43
kHz
VIK
Input diode clamp voltage II = –18 mA
1.65 V to 3.6 V
1.65 V to 3.6 V
1.65 V to 3.6 V
1.65 V to 3.6 V
1.65 V
–1.2
V
V
V
VPOR
VOL
Power-on reset voltage
VI = VCC or GND, IO = 0
1.4
0.2
SDA
SDA
IOL = 6 mA
0.6
3
25
40
13.2
59.7
68
IOL
VOL = 0.5 V
mA
P port(2)
VOL = 0.6 V
1.8 V to 3.6 V
1.65 V to 3.6 V
1.65 V to 1.95 V
II
SCL, SDA, EN
VI = VCC or GND
±0.1
12
µA
EN disabled, P port idle,
Intensity control disabled,
SCL = VCC, SDA = VCC, IO = 0,
fSCL = 0
2
3
Standby current
Operating mode
1.96 V to 3.6 V
1.65 V to 1.95 V
1.96 V to 3.6 V
15
17
20
P port running,
9.7
10.4
ICC
Intensity control enabled,
SCL = VCC, SDA = VCC, IO = 0,
fSCL = 0
µA
P port running,
Intensity control enabled,
SDA = VCC, IO = 0, fSCL = 400 kHz
1.65 V to 1.95 V
1.96 V to 3.6 V
10.2
11.4
18
25
Ci
SCL
1.65 V to 3.6 V
1.65 V to 3.6 V
1.65 V to 3.6 V
7
8
pF
pF
pF
Cio
Co
SDA
P port
VIO = VCC or GND
VO = VCC or GND
10
(1) All typical values are at TA = 25°C.
(2) The total current sourced by the P port must be limited to 200 mA.
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I2C Interface Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 14)
STANDARD MODE
I2C BUS
FAST MODE
I2C BUS
UNIT
MIN
0
MAX
MIN
0
MAX
fscl
tsch
tscl
tsp
I2C clock frequency
I2C clock high time
I2C clock low time
I2C spike time
I2C serial-data setup time
I2C serial-data hold time
I2C input rise time
I2C input fall time
100
400
kHz
µs
µs
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
µs
4
0.6
1.3
4.7
50
50
tsds
tsdh
ticr
250
0
100
0
(1)
1000
300
20 + 0.1Cb
300
300
250
(1)
(1)
ticf
20 + 0.1Cb
20 + 0.1Cb
tocf
tbuf
tsts
tsth
tsps
I2C output fall time
10-pF to 400-pF bus
300
I2C bus free time between Stop and Start conditions
I2C Start or repeated Start condition setup
I2C Start or repeated Start condition hold
I2C Stop condition setup
4.7
4.7
4
1.3
0.6
0.6
0.6
4
tvd(data) Valid-data time
SCL low to SDA output valid
1
1
1
1
ACK signal from SCL low to
SDA (out) low
tvd(ack)
Cb
Valid-data time of ACK condition
I2C bus capacitive load
µs
0
400
0
400
pF
(1) Cb = total capacitance of one bus line in pF
Oscillator Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted)
STANDARD
MODE
FAST MODE
I2C BUS
I2C BUS
UNIT
MIN
MAX
MIN
MAX
tOSC
Oscillator start-up time from powerdown or shutdown mode to fully on at 32 kHz
5
5
ms
Switching Characteristics
over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted)
STANDARD MODE
FAST MODE
I2C BUS
I2C BUS
MIN
FROM
(INPUT)
TO
(OUTPUT)
PARAMETER
UNIT
MAX
400
60
MIN
MAX
tpv
Output data valid
(in general-purpose output mode)
SCL
P port
400
60
ns
tps
tw
Shutdown data valid
EN pulse duration
EN (low)
P port (high)
µs
µs
60
60
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TYPICAL CHARACTERISTICS
STANDBY CURRENT
vs
SUPPLY CURRENT
vs
TEMPERATURE
TEMPERATURE
[EN is Low (PWM Disabled), fSCL = 0]
[EN is High (PWM Enabled), fSCL = 0]
7
6
5
4
3
2
1
0
14
12
10
8
1.8 V
2.5 V
3.6 V
6
4
1.8 V
2.5 V
3.6 V
2
0
–40 –25 –10
5
20
35
50
65
80
95
110 125
Temperature,TA (°C)
–40 –25 –10
5
20
35
50
65
80
95 110 125
Temperature,TA (°C)
SUPPLY CURRENT
vs
PORT OUTPUT LOW VOLTAGE
TEMPERATURE
vs
[EN is High (PWM Enabled), fSCL = 400 kHz]
TEMPERATURE
25
120
All Outputs Loaded
= 10 mA
I
L
100
80
60
40
20
0
20
15
10
5
1.8 V
2.5 V
3.6 V
1.8 V
2.5 V
3.6 V
0
–25 –10
5
20
35
50
65
80
95
110 125
–40
Temperature,TA (°C)
–40 –25 –10
5
20 35 50 65 80 95 110 125
Temperature,TA (°C)
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TYPICAL CHARACTERISTICS (continued)
PORT OUTPUT LOW VOLTAGE
PWM FREQUENCY
vs
TEMPERATURE
vs
TEMPERATURE
60
50
40
30
20
10
0
128
126
124
122
120
118
116
All Outputs Loaded
= 5 mA
I
L
1.8 V
2.5 V
3.6 V
1.8 V
2.5 V
3.6 V
–40 –25 –10
5
20
35
50
65
80
95 110 125
-40 -25 -10
5
20
35
50
65
80
95 110 125
Temperature,TA (°C)
Temperature,TA (°C)
OUTPUT LOW VOLTAGE
vs
SINK CURRENT
600
500
400
300
200
100
1.8 V
2.5 V
3.6 V
0
0
5
10
15
20
25
30
35
40
45
50
Sink Current, Isink (mA)
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PARAMETER MEASUREMENT INFORMATION
VCC
RL = 1 kΩ
SDA
DUT
CL = 50 pF
(see Note A)
SDA LOAD CONFIGURATION
Three Bytes for Complete
Device Programming
Stop Start
Condition Condition
Address
Bit 7
(MSB)
Data
Bit 7
(MSB)
Data
Bit 0
(LSB)
Stop
Condition
(P)
R/W
Bit 0
(LSB)
ACK
(A)
Address
Bit 6
Address
Bit 1
(P)
(S)
tscl
tsch
0.7 × VCC
0.3 × VCC
SCL
SDA
ticr
tsts
tPHL
ticf
tbuf
tsp
tPLH
0.7 × VCC
0.3 × VCC
ticr
ticf
tsdh
tsps
tsth
tsds
Repeat Start
Condition
Stop
Condition
Start or
Repeat Start
Condition
VOLTAGE WAVEFORMS
BYTE
DESCRIPTION
I2C address
Command
1
2
3
P-port data
A. CL includes probe and jig capacitance.
B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
C. All parameters and waveforms are not applicable to all devices.
Figure 14. I2C Interface Load Circuit and Voltage Waveforms
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PARAMETER MEASUREMENT INFORMATION (continued)
Pn
500 Ω
DUT
2 × VCC
CL = 50 pF
(see Note A)
500 Ω
P-PORT LOAD CONFIGURATION
0.7 × VCC
0.3 × VCC
SCL
P0
A
P3
Slave
ACK
SDA
tpv
(see Note B)
Pn
Last Stable Bit
Unstable
Data
WRITE MODE (R/W = 0)
A. CL includes probe and jig capacitance.
B. All inputs are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf ≤ 30 ns.
C. The outputs are measured one at a time, with one transition per measurement.
D. All parameters and waveforms are not applicable to all devices.
Figure 15. P-Port Load Circuit and Voltage Waveforms
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APPLICATION INFORMATION
Figure 16 shows a general application in which the TCA6507 can be used. Each LED output is driving one LED.
Figure 16 highlights another application where the TPS61052 boost converter and high-power LED driver and
TCA6507 7-bit LED driver can be used in combination for applications requiring flashlight functionality and/or
high-brightness indicator/backlight LEDs.
5 V
VCC
(1.8 V)
VCC
VCC
10 kW
10 kW
VCC
P0
P1
P2
SCL
SDA
SCL
SDA
Master
Controller
EN
EN
P3
P4
P5
P6
General
Purpose
Logic
GND
GND
TCA6507
Figure 16. Typical Application
L
SW
VBAT
VOUT
SW
2.2 μH
COUT
AVIN
10 μF
Li-Ion
CIN
Dx
Dy
Dz
P
P
P
LED
SCL
SDA
2
I C I/F
ENVM
Flash synchronization
camera engine
FLASH_SYNC
AGND
TCA6507
1.8 V
PGND
PGND
P
VCC
P0
P1
P2
SCL
SDA
EN
2
I C I/F
Voltage mode enable
base-band engine
GND
Figure 17. White LED Flashlight Driver and High-Brightness LED Indicator/Backlight Power Supply
22
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Product Folder Link(s): TCA6507
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
SOFTWARE CONSIDERATIONS FOR USING THE TCA6507
Operation
The TCA6507 includes 11 registers that control the LED function and intensity. In general, the TCA6507 needs to
be operated/written this way to run LEDs (see Figure 11).
1. Master sends a START condition.
2. Master sends the slave address with a write operation (1000 1010).
3. Master sends a command byte that points 1 of the 11 registers in this device.
4. Master sends data to the TCA6507 register(s).
If auto-increment mode is used, the master can write to all 11 registers with 1 command byte being sent initially.
After all registers are written to (if needed), LEDs operate after the TCA6507 acknowledges the master’s
command.
Auto-Increment Mode
In auto-increment mode, the last four bits of the command byte are automatically incremented after the byte is
written and the next data byte is stored in the corresponding register.
Device Address:
0001 0000, 0X02, 0X02, 0X02
Command byte:
B4 = 1 enables auto-increment mode
B3–B0 = 0000 points to Select0 register
Data byte write to Select2 register
Data byte write to Select1 register
Data byte write to Select0 register
The registers are written to in the order shown in Table 3.
LED Operation
For LED states, see Figure 1 and Table 4.
It is the combination of Select2, Select1, and Select0 registers that gives the state of the LED or Px.
Bit 0 from the Select0 register, bit = 0 from Select1 register and bit=0 from the Select2 register provide the state
for P0 or the first LED. Similarly, bit = 1 from the Select0 register, bit 1 from Select1 register and bit = 1 from the
Select2 register provide the state for P1 or the second LED (see Table 20).
Table 20. LED Operation
MSB
X
LSB
Select0
Select1
Select2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
X
X
Output or
LED affected
X
X
P6
7th LED
P5
6th LED
P4
5th LED
P3
4th LED
P2
3rd LED
P1
2nd LED
P0
1st LED
Example of LED Operation
Starting with a powerup/reset and all seven LEDs off, the following is an example of LED operationg(using
auto-increment):
<start>, …,
Start,
<slave addr>,
1000 1010,
<command with auto-increment>,
0001 0000,
<data>, <data>, <data>, <stop>
0X02,
0X02,
0X02,
Stop
Copyright © 2007, Texas Instruments Incorporated
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23
Product Folder Link(s): TCA6507
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
A command byte of 0001 0000 writes first to the Select0 register. Data written is 0000 0010. Since
auto-increment is enabled, the next data byte goes into Select1 and Select2 registers, respectively (see
Table 21).
Table 21. LED Operation Example
MSB
X
LSB
Select0
Select1
Select2
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
X
X
Output or
LED affected
X
X
P6
7th LED
P5
6th LED
P4
5th LED
P3
4th LED
P2
3rd LED
P1
2nd LED
P0
1st LED
For P1 or the second LED, the combination of 1 for the Select0 register (Bit 1), 1 for the Select1 register bit (bit
1), and 1 for the Select2 register bit (bit 1) puts the LED in a state where it blinks with intensity characteristic of
BANK1 (PWM1) (see Table 4).
Blink Control
The Fade-On time, Fully-On time, Fade-Off time, First Fully-Off time, and Second Fully-Off time registers must
be written to for basic blink control. Each of these registers has eight bits – top four bits for BANK1 (or PWM1)
and bottom four bits for BANK0 (or PWM0) (see Table 17).
Each BANK or PWM has a default value of 4 (0100), which translates to a time of 256 ms. The largest value for
each BANK or PWM is 15 (1111), which translates to a time of 16320 ms (see Figure 7 and Table 15).
Example of Blink Control
Starting with a powerup/reset and all seven LEDs off, here is an example (using auto-increment):
<start>, …, <command with auto-increment>, <data>, <data>, <data>, <data>, <data>, <data>, <data>, <data>, <stop>
Start, 0001 0000, 0X02, 0X02, 0X02, 0011 0000, 0101 0000, 0011 0000, 0110 0000, 1000 0000, Stop
A value of 3 is written into BANK1 in the
Fade-On Time register.
A value of 8 is written into BANK1 in the second
Fully-Off Time register.
0011 in BANK1 = 192 ms in Fade-On time
1000 in BANK1 = 1024 ms in fully-off time (second)
A value of 5 is written into BANK1 in the
Fully-On Time register.
A value of 6 is written into BANK1 in the First
Fully-Off time register.
0101 in BANK1 = 384 ms in fully-on time
0110 in BANK1 = 512 ms in fully-off time (first)
A value of 3 is written into BANK1 in the
Fade-Off Time register.
0011 in BANK1 = 192 ms in fade-off time
This sets the blink cycle as such for PWM1 or BANK1:
384ms 512ms
384ms
1024ms
192ms
192ms
192ms
192ms
24
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Product Folder Link(s): TCA6507
TCA6507
LOW-VOLTAGE 7-BIT I2C AND SMBus LED DRIVER
WITH INTENSITY CONTROL AND SHUTDOWN
www.ti.com
SCPS164B–MAY 2007–REVISED NOVEMBER 2007
Intensity Control
The Maximum Intensity registers must be written to for setting the intensity of the LED. This register has eight
bits – top four bits for BANK1 (or PWM1) and bottom four bits for BANK0 (or PWM0). This register can be written
to after sending data to the Second Fully-Off Time register (see Table 17).
The Maximum Intensity register has a default value of 15 (1111), which translates to 100% brightness (see
Figure 7 and Table 15).
Examples of Intensity Control
The intensity of the LED can be modified by changing the duty cycle of the output port voltage. The period is 8
ms. In Figure 8, 1111 0000 was written into the Maximum Intensity register to put a 100% intensity level in
PWM1 or BANK1.
The user can vary the duty cycle of the output voltage for intensity changes:
•
For 25% brightness, the voltage level at the output/LED should be LOW for 25% of the time (2 ms) and HIGH
for 75% of the time (6 ms).
•
For 75% brightness, the voltage level at the output/LED should be LOW for 75% of the time (6 ms) and HIGH
for 25% of the time (2 ms).
In Figure 8, 0111 0000 was written into the Maximum Intensity register to put a 50% intensity level in PWM1 or
BANK1. The period is 8 ms.
The user can vary the duty cycle of the output voltage for intensity changes:
•
For 12.5% brightness, the voltage level at the output/LED should be LOW for 12.5% of the time (1 ms) and
HIGH for 87.5% of the time (7 ms).
•
For 37.5% brightness, the voltage level at the output/LED should be LOW for 37.5% of the time (3 ms) and
HIGH for 62.5% of the time (5 ms)
Copyright © 2007, Texas Instruments Incorporated
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Product Folder Link(s): TCA6507
PACKAGE OPTION ADDENDUM
www.ti.com
6-Jan-2010
PACKAGING INFORMATION
Orderable Device
TCA6507PW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TSSOP
PW
14
14
14
14
12
12
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TCA6507PWG4
TCA6507PWR
TCA6507PWRG4
TCA6507RUER
TCA6507ZXUR
TSSOP
TSSOP
TSSOP
X2QFN
PW
PW
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
RUE
ZXU
3000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
BGA MI
CROSTA
R JUNI
OR
2500 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jan-2010
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TCA6507PWR
TCA6507RUER
TCA6507ZXUR
TSSOP
X2QFN
PW
RUE
ZXU
14
12
12
2000
3000
2500
330.0
179.0
330.0
12.4
8.4
7.0
1.6
2.3
5.6
2.2
2.8
1.6
0.55
1.0
8.0
4.0
4.0
12.0
8.0
Q1
Q1
Q2
BGA MI
CROSTA
R JUNI
OR
8.4
8.0
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
6-Jan-2010
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TCA6507PWR
TCA6507RUER
TCA6507ZXUR
TSSOP
X2QFN
PW
RUE
ZXU
14
12
12
2000
3000
2500
346.0
220.0
340.5
346.0
205.0
338.1
29.0
50.0
20.6
BGA MICROSTAR
JUNIOR
Pack Materials-Page 2
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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