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TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

TCAN33x 3.3-V CAN Transceivers with CAN FD (Flexible Data Rate)

1 Features

3 Description

The TCAN33x family of devices is compatible with

1

•

3.3-V Single supply operation

Data rates up to 5 Mbps (TCAN33xG devices)

Compatible with ISO 11898-2

SOIC-8 and SOT-23 package options

Operatinles:

the ISO 11898 High Speed CAN (Controller Area

Network) Physical Layer standard. TCAN330,

TCAN332, TCAN334 and TCAN337 are specified for

data rates up to 1 Mbps. Pending the release of the

updated version of ISO 11898-2 including CAN FD,

additional timing parameters defining loop delay

symmetry are specified for the TCAN330G,

TCAN332G, TCAN334G and TCAN337G devices.

The devices include many protection features

including driver and receiver Dominant Time Out

(DTO) providing CAN network robustness. Integrated

12 kV IEC-61000-4-2 ESD Contact Discharge

protection eliminates the need of additional

components for system level robustness.

–

Normal mode (all devices)

Low power standby mode with wake

(TCAN334)

–

Silent mode (TCAN330, TCAN337)

Shutdown mode (TCAN330, TCAN334)

•

Wide common mode range of operation ±12 V

Bus pin fault protection of ±14 V

Total loop delay < 135 ns

Device Information⁽¹⁾

Wide ambient operation temperature range:

–40°C to 125°C

PART NUMBER

PACKAGE

BODY SIZE (NOM)

TCAN330/G

TCAN332/G

TCAN334/G

TCAN337/G

SOIC (8)

4.90 mm × 3.91 mm

•

Optimized behavior when unpowered:

SOT-23 (8)

2.90 mm x 1.60 mm

–

Bus and logic pins are high impedance (no

load to operating bus or application)

(1) For all available packages, see the orderable addendum at

the end of the data sheet.

–

Power up / down glitch free operation

•

Excellent EMC performance

Protection features:

Block Diagram

SHDN/NC/FAULT

V_CC

3

–

ESD Protection of bus terminals

Note C

5

FAULT LOGIC

Note B

–

HBM ESD Protection exceeds ±25 kV

V_CC

IEC61000-4-2 ESD Contact discharge

protection exceeds ±12 kV

DOMINANT

TIME OUT

TXD

1

CANH

CANL

7

6

–

Driver dominant time out (TXD DTO)

Receiver dominant time out (RXD DTO)

Fault output pin (TCAN337 only)

Undervoltage protection on V_CC

Thermal shutdown protection

UNDER

VOLTAGE

Note C

CONTROL

AND

MODE

LOGIC

8

Sleep Receiver

WAKE

DETECT

Current limiting on bus pins

Note A

MUX

2 Applications

Normal Receiver

DOMINANT

TIME OUT

RXD

4

•

5-Mbps operation in CAN with flexible data rate

networks (TCAN33xG devices)

2

GND

•

1-Mbps operation in highly loaded can networks

A: Sleep Receiver and Wake Detect are device dependent options and are only available in TCAN334.

B: Fault Logic are only available in TCAN337.

C: Pin 5 and 8 functions are device dependent. Refer to Device Comparison Table.

Industrial automation, control, sensors and drive

systems

•

Building, security and climate control automation

Telecom base station status and control

CAN Bus standards such as CANopen,

DeviceNet, NMEA2000, ARINC825, ISO11783,

CANaerospace

1

An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,

intellectual property matters and other important disclaimers. PRODUCTION DATA.

TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

www.ti.com

Table of Contents

10.1 Overview ............................................................... 18

10.2 Functional Block Diagram ..................................... 18

10.3 Feature Description............................................... 19

10.4 Device Functional Modes...................................... 22

11 Application and Implementation........................ 26

11.1 Application Information.......................................... 26

11.2 Typical Application ............................................... 26

11.3 System Examples ................................................. 28

12 Power Supply Recommendations ..................... 29

13 Layout................................................................... 30

13.1 Layout Guidelines ................................................. 30

13.2 Layout Example .................................................... 31

14 Device and Documentation Support ................. 32

14.1 Related Links ........................................................ 32

14.2 Support Resources ............................................... 32

14.3 Trademarks........................................................... 32

14.4 Electrostatic Discharge Caution............................ 32

14.5 Glossary................................................................ 32

1

2

3

4

5

6

7

8

Features.................................................................. 1

Applications ........................................................... 1

Description ............................................................. 1

Revision History..................................................... 2

Description (continued)......................................... 3

Device Options....................................................... 3

Pin Configuration and Functions......................... 4

Specifications......................................................... 5

8.1 Absolute Maximum Ratings ...................................... 5

8.2 ESD Ratings.............................................................. 5

8.3 Recommended Operating Conditions....................... 5

8.4 Thermal Information.................................................. 5

8.5 Electrical Characteristics........................................... 6

8.6 Switching Characteristics.......................................... 8

8.7 Typical Characteristics............................................ 10

8.8 Typical Characteristics, TCAN330 Receiver........... 11

8.9 Typical Characteristics, TCAN330 Driver ............... 12

Parameter Measurement Information ................ 13

9

15 Mechanical, Packaging, and Orderable

10 Detailed Description ........................................... 18

Information ........................................................... 32

4 Revision History

Changes from Revision D (April 2016) to Revision E

Page

•

Changed the Pin Configuration image appearance ............................................................................................................... 4

Changed the titles of Figure 21 and Figure 22..................................................................................................................... 14

Changes from Revision C (April 2016) to Revision D

Page

•

Changed From: ARNIC825 To ARINC825 in the Applications list......................................................................................... 1

Changes from Revision B (April 2016) to Revision C

Page

•

Removed the Preview Note from TCAN337 and TCAN337G in the Device Options table.................................................... 3

Changes from Revision A (January 2016) to Revision B

Page

•

Removed the Preview Note from all device except for TCAN337 and TCAN337G in the Device Comparison table ........... 3

Changed FAULT Pin I_CLMIN value From: 5 mA To: 4 mA in the Electrical Characteristics.................................................. 7

Changes from Original (December 2015) to Revision A

Page

•

Changed Features From: "Total Loop Delay < 150 ns" To: "Total loop delay < 135 ns" ...................................................... 1

Changed V_IT(SLEEP)To: V_IT(STB)and added Test conditions in the Electrical Characteristics ................................................. 7

Added –12 V < V_CM< 12 V to t_{WK_FILTER}in the Test Conditions of Switching Characteristics ............................................... 8

2

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TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

www.ti.com

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

5 Description (continued)

The use of single 3.3-V supply enables the transceivers to directly interface with 3.3-V CAN controllers/MCUs. In

addition, these devices are fully compatible with other 5-V CAN transceivers on the same bus.

These devices have excellent EMC performance due to matched Dominant and Recessive Common Modes.

Ultra low power Shutdown and Standby modes make these devices attractive for battery powered applications.

This family of devices is available in standard 8-pin SOIC packages for drop-in compatibility and in small SOT-23

packages for space-constrained applications.

6 Device Options

DEVICE

TCAN330

TCAN332

TCAN334

TCAN337

TCAN330G

TCAN332G

TCAN334G

TCAN337G

PIN 5

SHDN

NC

PIN 8

S

DERATE

1 Mbps

5 Mbps

DESCRIPTION

Shutdown and silent modes

NC

STB

S

Normal mode only

SHDN

FAULT

SHDN

NC

Shutdown and standby with wake

Fault output and silent mode

Shutdown and silent modes

Normal mode only

S

NC

STB

S

SHDN

FAULT

Shutdown and standby with wake

Fault output and silent mode

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3

Product Folder Links: TCAN330 TCAN332 TCAN334 TCAN337 TCAN330G TCAN332G TCAN334G TCAN337G

TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

www.ti.com

7 Pin Configuration and Functions

TCAN330 D, DCN Packages

8-Pin SOIC, SOT-23

Top View

TCAN334 D, DCN Packages

8-Pin SOIC, SOT-23

Top View

TXD

GND

V_CC

1

2

3

4

8

7

6

5

S

TXD

GND

V_CC

1

2

3

4

8

7

6

5

STB

CANH

CANL

SHDN

CANH

CANL

SHDN

RXD

Not to scale

TCAN332 D, DCN Packages

8-Pin SOIC, SOT-23

Top View

TCAN337 D, DCN Packages

8-Pin SOIC, SOT-23

Top View

TXD

GND

V_CC

1

2

3

4

8

7

6

5

NC

TXD

GND

V_CC

1

2

3

4

8

7

6

5

S

CANH

CANL

NC

CANH

CANL

FAULT

RXD

Not to scale

Pin Functions

I/O

DESCRIPTION

NAME

TCAN330 TCAN332 TCAN334 TCAN337

CAN transmit data input (LOW for dominant and HIGH for recessive bus states),

integrated pull up

TXD

1

I

GND

V_CC

2

3

2

3

2

3

2

3

GND

Ground connection

3.3-V supply voltage

Supply

CAN receive data output (LOW for dominant and HIGH for recessive bus

states), tri-state

RXD

4

O

SHDN

NC

5

—

6

—

5

—

6

—

5

I

Drive high for shutdown mode. Internal pull-down.

No Connect – Not internally connected

Open drain fault output pin.

NC

O

FAULT

CANL

CANH

S

—

6

I/O

I

Low level CAN bus line

7

High level CAN bus line

8

—

8

—

8

Drive high for silent mode, integrated pull down

No Connect – Not internally connected

Drive high for low power standby mode, integrated pull down

NC

—

NC

I

STB

—

4

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TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

www.ti.com

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

8 Specifications

8.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

MIN

–0.3

–14

MAX

5

UNIT

V

Supply Voltage range, V_CC

Voltage at any bus terminal (CANH or CANL), V_(BUS)

Logic input terminal voltage range V_{(Logic_Input)}

Logic output terminal voltage range, V_{(Logic_Output)}

Logic output current, I_O(LOGIC)

14

5

V

–0.3

V

5

V

8

mA

°C

Operating junction temperature range, T_J

Storage temperature, T_stg

–40

150

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltage values, except differential I/O bus voltages, are with respect to ground terminal.

8.2 ESD Ratings

VALUE

±4000

UNIT

All pins except CANH and

CANL

Human-body model (HBM), per

ANSI/ESDA/JEDEC JS-001⁽¹⁾

Pins CANH and CANL

All pins

±25000

±1500

V_(ESD)

Electrostatic discharge

V

Charged-device model (CDM), per JEDEC

specification JESD22-C101⁽²⁾

CANH and CANL terminals to

GND

IEC 61400-4-2 Contact Discharge

±12000

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. .

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

8.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

3

NOM

MAX

UNIT

V_CC

Supply voltage

3.6

V

I_OH(LOGIC)

I_OL(LOGIC)

T_A

Logic terminal HIGH level output current

Logic terminal LOW level output current

Operational free-air temperature

–2

mA

°C

2

–40

125

8.4 Thermal Information

TCAN33x

THERMAL METRIC⁽¹⁾

D (SOIC)

8 PINS

114.4

58.7

DCN (SOT-23)

8 PINS

154.4

76.6

UNIT

R_θJA

Junction-to-ambient thermal resistance

Junction-to-case (top) thermal resistance

°C/W

R_θJC(top)

R_θJB

Junction-to-board thermal resistance

55.2

49.2

ψ_JT

Junction-to-top characterization parameter

Junction-to-board characterization parameter

Junction-to-case (bottom) thermal resistance

11.7

11.9

ψ_JB

54.6

49.2

R_θJC(bot)

N/A

V_CC= 3.3 V, T_J= 27°C, R_L= 60 Ω, SHDN, S and

P_D

Average power dissipation

STB at 0 V, Input to TXD at 500 kHz, 50% duty cycle

square wave, C_L(RXD)= 15 pF

65

mW

T_SD

Thermal shutdown temperature

Thermal shutdown hysteresis

175

5

175

5

°C

T_HYS

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application

report.

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Product Folder Links: TCAN330 TCAN332 TCAN334 TCAN337 TCAN330G TCAN332G TCAN334G TCAN337G

TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

www.ti.com

8.5 Electrical Characteristics

over operating free-air temperature range, T_J= –40°C to 150°C. All typical values are at 25°C and supply voltages of V_CC

=

3.3 V, R_L= 60 Ω, (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Supply

See Figure 18. TXD = 0 V, R_L= 60 Ω,

C_L= open, S, STB and SHDN = 0 V.

Typical Bus Load.

55

60

Dominant

See Figure 18. TXD = 0 V, R_L= 50 Ω,

C_L= open, S, STB and SHDN = 0 V.

High Bus Load.

Supply current Normal Mode

See Figure 18. TXD = 0 V, S, STB and

SHDN = 0 V, CANH = -12 V, R_L= open,

C_L= open

mA

Dominant with

bus fault

180

See Figure 18. TXD = V_CC, R_L= 50 Ω,

C_L= open, S, STB and SHDN = 0 V

Recessive

3.5

2.5

I_CC

See Figure 18. TXD = V_CC, R_L= 50 Ω,

C_L= open, S = V_CC

Supply Current: Silent Mode

Supply Current: Standby Mode

T_A< 85°C, STB at V_CC, RXD floating,

TXD at V_CC

15

20

1

STB at V_CC, RXD floating, TXD at V_CC

µA

T_A< 85°C, SHDN at V_CC, RXD floating,

TXD at V_CC

Supply Current: Shutdown Mode

SHDN = V_CC, RXD floating, TXD at V_CC

2.5

2.6

Rising under voltage detection on V_CCfor protected

mode

2.2

UV_(VCC)

V

Falling under voltage detection on V_CCfor protected

mode

1.65

2

2.5

V_HYS(UVVCC)

Hysteresis voltage on UV_(VCC)

200

mV

Driver

CANH

See Figure 31 and Figure 19, TXD = 0

V, S, STB and SHDN = 0 V, R_L= 60 Ω,

C_L= open

2.45

0.5

V_CC

V_O(D)

Bus output voltage (dominant)

V

CANL

1.25

See Figure 31 and Figure 19, TXD =

V_CC, STB, SHDN = 0 V, S = 0 V or V_CC

⁽¹⁾, R_L= open (no load)

V_O(R)

Bus output voltage (recessive)

1.85

See Figure 31 and Figure 19, TXD = 0

V, S, STB and SHDN = 0 V, 50 Ω ≤ R_L

65 Ω, C_L= open

≤

1.6

1.5

3

V_OD(D)

Differential output voltage (dominant)

V

See Figure 31 and Figure 19, TXD = 0

V, S, STB and SHDN = 0 V, 45 Ω ≤ R_L

50 Ω, C_L= open

<

See Figure 31 and Figure 19, TXD =

V_CC, S, STB and SHDN = 0 V, R_L= 60

Ω, C_L= open

–120

–50

12

50

T_A< 85°C, See Figure 31 and Figure 19,

TXD = V_CC, S, STB and SHDN = 0 V, R_L

= open (no load), C_L= open

V_OD(R)

Differential output voltage (recessive)

mV

See Figure 31 and Figure 19, TXD =

V_CC, S, STB and SHDN = 0 V, R_L

open (no load), C_L= open

=

–50

100

400

Output symmetry (dominant and recessive)

(CANH_REC+ CANL_REC– CANH_DOM– CANL_DOM

See Figure 31 and Figure 19, S, STB

and SHDN = 0 V, R_L= 60 Ω, C_L= open

V_(SYM)

–400

–200

mV

mA

)

See Figure 26, V_(CANH)= –12 V, CANL =

open, TXD = 0 V

I_OS(DOM)

Short-circuit steady-state output current, Dominant

Short-circuit steady-state output current, Recessive

See Figure 26, V_(CANL)= 12 V, CANH =

open, TXD = 0 V

200

5

See Figure 26, –12 V ≤ V_BUS≤ 12 V,

V_BUS= CANH = CANL, TXD = V_CC

I_OS(REC)

–5

(1) The bus output voltage (recessive) will be the same if the device is in normal mode with S terminal LOW or if the device is in silent

mode with the S terminal is HIGH.

6

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SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

Electrical Characteristics (continued)

over operating free-air temperature range, T_J= –40°C to 150°C. All typical values are at 25°C and supply voltages of V_CC

=

3.3 V, R_L= 60 Ω, (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Receiver

Input threshold voltage, normal modes and selective

wake modes

V_IT

500

900

mV

Hysteresis voltage for input threshold, normal

modes and selective wake modes

See Figure 20 and Table 7

V_HYS

V_CM

120

Common Mode Range: normal and silent modes

–12

400

12

V

–2 V < V_CM< 7 V

See Figure 20 and Table 7

1150

mV

V_IT(STB)

Input Threshold, standby mode

–12 V < V_CM< 12 V

See Figure 20 and Table 7

400

1350

6

mV

µA

T_A< 85°C, CANH = CANL = 3.3 V, V_CC

to GND via 0-Ω and 47-kΩ resistor

I_IOFF(LKG)

Power-off (unpowered) bus input leakage current

CANH = CANL = 3.3 V, V_CCto GND via

0-Ω and 47-kΩ resistor

12

C_I

Input capacitance to ground (CANH or CANL)

Differential input capacitance

20

10

80

40

pF

C_ID

R_ID

R_IN

Differential input resistance

TXD = V_CC, Normal Mode

TXD = V_CC, Normal mode

30

15

kΩ

Input resistance (CANH or CANL)

Input resistance matching: [1 – (R_IN(CANH) /

R_IN(CANL))] × 100 %

R_IN(M)

V_(CANH)= V_(CANL)

–3%

3%

TXD Terminal (CAN Transmit Data Input)

V_IH

HIGH level input voltage

LOW level input voltage

2

V

V_IL

0.8

3

V

I_IH

HIGH level input leakage current

LOW level input leakage current

Unpowered leakage current

Input Capacitance

TXD = V_CC= 3.6 V

–2.5

–4

0

µA

pF

I_IL

TXD = 0 V, V_CC= 3.6 V

TXD = 3.6 V, V_CC= 0 V

0

I_LKG(OFF)

I_(CAP)

–2

0

2.5

RXD Terminal (CAN Receive Data Output)

V_OH

HIGH level output voltage

LOW level output voltage

Unpowered leakage current

See Figure 20, I_O= –2 mA

See Figure 20, I_O= 2 mA

RXD = 3.6 V, V_CC= 0 V

0.8 x V_CC

V

V_OL

0.2

0

0.4

1

I_LKG(OFF)

–1

2

µA

STB/S/SHDN Terminals

V_IH

HIGH level input voltage

V

V_IL

LOW level input voltage

0.8

10

1

V

I_IH

HIGH level input leakage current

LOW level input leakage current

Unpowered leakage current

STB, S, SHDN = V_CC= 3.6 V

–3

–4

–3

0

µA

I_IL

STB, S, SHDN = 0 V, V_CC= 3.6 V

STB, S, SHDN = 3.6 V, V_CC= 0 V

I_LKG(OFF)

5

FAULT Pin (Fault Output), TCAN337 only

I_CH

I_CL

Output current high level

Output current low level

FAULT = V_CC, See Figure 28

FAULT = 0.4 V, See Figure 28

–10

4

µA

12

mA

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TCAN330, TCAN332, TCAN334, TCAN337

TCAN330G, TCAN332G, TCAN334G, TCAN337G

SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

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8.6 Switching Characteristics

over operating free-air temperature range (unless otherwise noted)

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

Device Switching Characteristics

Total loop delay, driver input (TXD) to

receiver output (RXD), recessive to

dominant and dominant to recessive

See Figure 23, S, STB and SHDN = 0 V,

R_L= 60 Ω, C_L= 100 pF, C_L(RXD)= 15 pF

t_PROP(LOOP)

100

120

135

180

ns

See Figure 23, S, STB and SHDN = 0 V,

R_L= 120 Ω, C_L= 200 pF,

C_L(RXD)= 15 pF

Total Loop delay in highly loaded

network

t_PROP(LOOP)

t_{BUS_SYM_2}

t_{REC_SYM_2}

2 Mbps transmitted recessive bit width

2 Mbps received recessive bit width

2 Mbps receiver timing symmetry

435

400

530

550

ns

See Figure 24, S or STB = 0 V, R_L= 60

Ω, C_L= 100 pF, C_L(RXD)= 15 pF,

t_BIT= 500 ns

TCAN330G, TCAN332G, TCAN334G

and TCAN337G only

Δt_{SYM_2}

–65

40

ns

(t_{REC_SYM_2}- t_{BUS_SYM_2}

)

t_{BUS_SYM_5}

t_{REC_SYM_5}

5 Mbps transmitted recessive bit width

5 Mbps received recessive bit width

5 Mbps receiver timing symmetry

155

120

210

220

ns

See Figure 24, S or STB = 0 V, R_L= 60

Ω, C_L= 100 pF, C_L(RXD)= 15 pF,

t_BIT= 200 ns

TCAN330G, TCAN332G, TCAN334G

and TCAN337G only

Δt_{SYM_5}

–45

15

10

ns

µs

(t_{REC_SYM_5}- t_{BUS_SYM_5}

)

See Figure 21 and Figure 22.

R_L= 60 Ω, C_L= 100 pF,

C_L(RXD)= 15 pF

t_MODE

Mode change time

5

Time for device to return to normal

operation from UV_(VCC)under voltage

event

t_{UV_RE-ENABLE}

Re-enable time after UV event

1000

4

µs

Bus time to meet Filtered Bus

Requirements for Wake Up Request

See Figure 33, Standby mode.

–12 V < V_CM< 12 V

t_{WK_FILTER}

0.5

Driver Switching Characteristics

Propagation delay time, HIGH TXD to

Driver Recessive

t_pHR

t_pLD

25

20

Propagation delay time, LOW TXD to

Driver Dominant

See Figure 19, S, STB and SHDN = 0 V.

ns

R_L= 60 Ω, C_L= 100 pF,

t_sk(p)

Pulse skew (|t_pHR- t_pLD|)

5

17

9

t_r

t_f

Differential output signal rise time

Differential output signal fall time

See Figure 25,

R_L= 60 Ω, C_L= 100 pF

(1)

t_{TXD_DTO}

Driver dominant time out

1.2

2.6

3.8

ms

Receiver Switching Characteristics

Propagation delay time, bus recessive

t_pRH

62

56

input to high RXD output

Propagation delay time, bus dominant

input to RXD low output

See Figure 20, C_L(RXD)= 15 pF CANL =

1.5 V, CANH = 3.5 V

t_pDL

ns

t_r

Output signal rise time (RXD)

Output signal fall time (RXD)

7

6

3

t_f

(2)

t_{RXD_DTO}

Receiver dominant time out

See Figure 27, C_L(RXD)= 15 pF

1.6

5

ms

(1) The TXD dominant time out (t_{TXD_DTO}) disables the driver of the transceiver once the TXD has been dominant longer than t_{TXD_DT}O,

which releases the bus lines to recessive, preventing a local failure from locking the bus dominant. The driver may only transmit

dominant again after TXD has been returned HIGH (recessive). While this protects the bus from local faults, locking the bus dominant, it

limits the minimum data rate possible. The CAN protocol allows a maximum of eleven successive dominant bits (on TXD) for the worst

case, where five successive dominant bits are followed immediately by an error frame. This, along with the t_{TXD_DTO}minimum, limits the

minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11/ t_{TXD_DTO}= 11 bits / 1.2 ms = 9.2 kbps.

(2) The RXD timeout (t_{RXD_DTO}) disables the RXD output in the case that the bus has been dominant longer than t_{RXD_DTO}, which releases

RXD pin to the recessive state (high), thus preventing a dominant bus failure from permanently keeping the RXD pin low. The RXD pin

will automatically resume normal operation once the bus has been returned to a recessive state. While this protects the protocol

controller from a permanent dominant state, it limits the minimum data rate possible. The CAN protocol allows a maximum of eleven

successive dominant bits (on RXD) for the worst case, where five successive dominant bits are followed immediately by an error frame.

This, along with the t_{RXD_DTO}minimum, limits the minimum bit rate. The minimum bit rate may be calculated by: Minimum Bit Rate = 11 /

t_{RXD_DTO}= 11 bits / 1.6 ms = 6.9 kbps.

8

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TXD fault stuck dominant, example PCB

failure or bad software

Fault is repaired & transmission

capability restored

t_{TXD_DTO}

TXD (driver)

Driver disabled freeing bus for other nodes

Bus would be —stuck dominant“ blocking communication for the

whole network but TXD DTO prevents this and frees the bus for

Normal CAN

communication

communication after the time t_{TXD_DTO}

.

CAN

Bus

Signal

t_{TXD_DTO}

Communication from

other bus node(s)

Communication from

repaired node

FAULT is signaled to link layer / protocol.

Fault indication is removed.

TXDDTO

Flag

RXD

(receiver)

Communication from

other bus node(s)

Communication from

repaired local node

Communication from

local node

Figure 1. Example Timing Diagram for TXD DTO and FAULT Pin

Fault is repaired and normal

communication returns

Normal CAN

communication

Bus Fault stuck dominant, example CANH

short to supply and CAN L short to GND.

CAN Bus

Signal

RXD mirrors

bus

RXD

(reciever)

t_{RXD_DTO}

RXD output is returned recessive (high) and

FAULT is signaled to link layer / protocol.

FAULT cleared

signal is given

RXDDTO

FLAG

Figure 2. Example Timing Diagram for RXD DTO and FAULT Pin

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8.7 Typical Characteristics

21

20.8

20.6

20.4

20.2

20

0.16

0.14

0.12

0.1

RL = Open

RL = 60 W

0.08

0.06

0.04

0.02

0

19.8

19.6

19.4

0

200

400 600

Frequency (kbps)

800

1000

0

1

2

3

V_O(CANL)- Low-Level Output Voltage (V)

4

D001

D002

V_CC= 3.3 V

Normal Mode

Temp = 25°C

V_O= 0.5 to 3.3 V

V_CC= 3.3 V

Normal Mode

Temp = 25°C

60 Ω Load

Figure 3. Supply Current (RSM) vs Frequency

Figure 4. Driver Low-Level Output Current vs Low-level

Output Voltage

160

140

120

100

80

3.0

RL = Open

RL = 60 W

2.5

2.0

1.5

1.0

0.5

0.0

60

40

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

20

0

1

2

3

V_O(CANH)- High-Level Output Voltage (V)

4

-40 -25 -10

5

20 35 50 65 80 95 110 125

Free-Air Temperature (èC)

D003

D004

V_O= 0.5 to 3.3 V

V_CC= 3.3 V

Normal Mode

Temp = 25°C

V_O= 0.5 to 3.3 V

V_CC= 3.3 V

Normal Mode

Temp = 25°C

60 Ω Load

Figure 5. Driver High-Level Output Current vs High-level

Output Voltage

Figure 6. Dominant Voltage (V_OD) vs Free-Air Temperature

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8.8 Typical Characteristics, TCAN330 Receiver

68

67

66

65

64

63

62

61

60

59

58

57

56

55

60

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

54

53

59

58

-40

-20

0

20

40

60

80

100 120 140

-40

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D005

D006

Figure 7. Receiver Bus Recessive Input to High RXD Output

Propagation Delay Time vs Free-Air Temperature

Figure 8. Receiver Bus Dominant Input to Low RXD Output

Propagation Delay Time vs Free-Air Temperature

9

8

7

6

5

4

3

6.6

6.5

6.4

6.3

6.2

6.1

6

5.9

5.8

2

5.7

5.6

5.5

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

1

0

-40

-20

0

20

40

60

80

100 120 140

-40

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D007

D008

Figure 9. Receiver Rise Time vs Free-Air Temperature

Figure 10. Receiver Fall Time vs Free-Air Temperature

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8.9 Typical Characteristics, TCAN330 Driver

35

30

25

20

15

35

30

25

20

15

10

5

10

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

5

0

-40

0

-40

-20

0

20

40

60

80

100 120 140

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D009

D010

Figure 11. Driver High TXD Input to Driver Recessive Output

Propagation Delay Time vs Free-Air Temperature

Figure 12. Driver Low TXD Input to Driver Dominant Output

Propagation Delay Time vs Free-Air Temperature

35

30

25

20

15

16

14

12

10

8

6

10

4

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

5

2

0

-40

-20

0

20

40

60

80

100 120 140

-40

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D011

D012

Figure 13. Differential Output Signal Rise Time vs Free-Air

Temperature

Figure 14. Differential Output Signal Fall Time vs Free-Air

Temperature

100

90

80

70

60

50

40

30

9

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

8

7

6

5

4

3

2

1

0

20

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

10

0

-40

-20

0

20

40

60

80

100 120 140

-40

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D013

D014

Figure 15. Pulse Skew (|t_pHR- t_pLD|) vs Free-Air Temperature

Figure 16. Total Loop Delay Recessive to Dominant

t_PROP(LOOP1)vs Free-Air Temperature

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Typical Characteristics, TCAN330 Driver (continued)

98

96

94

92

90

88

86

84

82

80

V_CC= 3 V

V_CC= 3.3 V

V_CC= 3.6 V

-40

-20

0

20

40

60

80

100 120 140

Free-Air Temperature (èC)

D015

Figure 17. Total Loop Delay Dominant to Recessive t_PROP(LOOP2)vs Free-Air Temperature

9 Parameter Measurement Information

CANH

R_L

TXD

C_L

CANL

Figure 18. Supply Test Circuit

CANH

R_L

V_CC

0V

50%

t_pLD

50%

t_pHR

TXD

C_L

V_OD

V_O(CANH)

90%

10%

CANL

0.9V

V_O(CANL)

V_OD

0.5V

t_R

t_F

Figure 19. Driver Test Circuit and Measurement

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Parameter Measurement Information (continued)

CANH

1.5 V

0.9 V

+

V_ID

I_O

RXD

0.5 V

0 V

V_OH

V_ID

+

t_pDL

90%

œ

t_pRH

V_O

C_{L_RXD}

CANL

V_O(RXD)

50%

10%

œ

V_OL

t_F

t_R

Figure 20. Receiver Test Circuit and Measurement

CANH

V_IH

TXD

0 V

R_L

C_L

S

SHDN/S/STB

50%

CANL

SHDN/S/STB

0V

0 V

V_I

t_MODE

RXD

+

V_OH

V_O

C_{L_RXD}

CANH - CANL

RXD

50%

œ

500mV

V_OL

Figure 21. t_MODETest Circuit and Measurement, from Normal to Shutdown, Standby or Silent Mode

V_IH

TXD

CANH

TXD

V_I

R_L

C_L

0 V

V_IH

0 V

V_IH

200 ns

CANL

SHDN/S/STB

V_I

50%

S

SHDN/S/STB

50%

RXD

0 V

+

t_MODE

V_O

C_{L_RXD}

V_OH

œ

RXD

900 mV

50%

CANH - CANL

V_OL

Figure 22. t_MODETest Circuit and Measurement, from Shutdown, Standby or Silent to Normal Mode

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Parameter Measurement Information (continued)

CANH

V_CC

TXD

C_L

V_I

R_L

50%

TXD

CANL

0 V

t_PROP(LOOP2)

t_PROP(LOOP1)

RXD

+

V_OH

V_O

C_{L_RXD}

50%

RXD

œ

V_OL

Figure 23. t_PROP(LOOP)Test Circuit and Measurement

V_I

70%

TXD

30%

CANH

0V

5 x t_BIT

t_BIT

TXD

V_I

R_L

CANL

900mV

CANH - CANL

500mV

RXD

t_{BUS_SYM}

V_O

C_{L_RXD}

V_OH

70%

RXD

30%

V_OL

t_{REC_SYM}

Figure 24. Loop Delay Symmetry Test Circuit and Measurement

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Parameter Measurement Information (continued)

CANH

V_IH

TXD

0 V

R_L

C_L

V_OD

V_OD(D)

CANL

0.9 V

V_OD

0.5 V

0 V

t_{TXD_DTO}

Figure 25. TXD Dominant Time Out Test Circuit and Measurement

200 ꢀs

I_OS

CANH

TXD

V_BUS

I_OS

CANL

V_BUS

or

0 V

V_BUS

Figure 26. Driver Short-Circuit Current Test and Measurement

V_ID(D)

CANH

+

0.9 V

V_ID

0.5 V

0 V

RXD

V_ID

+

œ

C_{L_RXD}

V_O

CANL

V_OH

0 V

RXD

50%

œ

t_{RXD_DTO}

Figure 27. RXD Dominant Timeout Test Circuit and Measurement

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Parameter Measurement Information (continued)

I_FAULT

TXD

DTO

FAULT

RXD

DTO

+

œ

Thermal

Shutdown

UV

Lockout

GND

Figure 28. FAULT Test and Measurement

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10 Detailed Description

10.1 Overview

This family of CAN transceivers is compatible with the ISO11898-2 High-Speed CAN (controller area network)

physical layer standard. They are designed to interface between the differential bus lines in CAN and the CAN

protocol controller.

10.2 Functional Block Diagram

SHDN / NC / FAULT

V^CC

Note C

5

3

FAULT LOGIC

Note B

V^CC

DOMINANT

TIME OUT

TXD

S / NC / STB

RXD

1

7

CANH

CANL

Under

Voltage

6

Note C

8

CONTROL and

MODE

LOGIC

Sleep Receiver

Note A

WAKE

DETECT

MUX

Normal Receiver

4

DOMINANT

TIME OUT

2

GND

A. Sleep Receiver and Wake Detect are device dependent options and are only available in TCAND334.

B. Fault Logic is only available in TCAND337.

C. Pin 5 and 8 functions are device dependent. Refer to Device Options.

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10.3 Feature Description

10.3.1 TXD Dominant Timeout (TXD DTO)

During normal mode (the only mode where the CAN driver is active), the TXD DTO circuit prevents the

transceiver from blocking network communication in the event of a hardware or software failure where TXD is

held dominant longer than the timeout period t_{TXD_DTO}. The DTO circuit timer starts on a falling edge on TXD.

The DTO circuit disables the CAN bus driver if no rising edge is seen before the timeout period expires. This

frees the bus for communication between other nodes on the network. The CAN driver is re-activated when a

recessive signal is seen on TXD pin, thus clearing the TXD DTO condition. The receiver and RXD pin still reflect

the CAN bus, and the bus pins are biased to recessive level during a TXD dominant timeout.

10.3.2 RXD Dominant Timeout (RXD DTO)

All devices have a RXD DTO circuit that prevents a bus stuck dominant fault from permanently driving the RXD

output dominant (low) when the bus is held dominant longer than the timeout period t_{RXD_DTO}. The RXD DTO

timer starts on a falling edge on RXD (bus going dominant). If no rising edge (bus returning recessive) is seen

before the timeout constant of the circuit expires (t_{RXD_DTO}), the RXD pin returns high (recessive). The RXD

output is re-activated to mirror the bus receiver output when a recessive signal is seen on the bus, clearing the

RXD dominant timeout. The CAN bus pins are biased to the recessive level during a RXD DTO.

10.3.3 Thermal Shutdown

If the junction temperature of the device exceeds the thermal shutdown threshold, the device turns off the CAN

driver circuits thus blocking the TXD-to-bus transmission path. The shutdown condition is cleared when the

junction temperature of the device drops below the thermal shutdown temperature of the device. If the fault

condition that caused the thermal shutdown is still present, the temperature may rise again and the device will

enter thermal shut down again. Prolonged operation with thermal shutdown conditions may affect device

reliability. The thermal shutdown circuit includes hysteresis to avoid oscillation of the driver output.

During thermal shutdown the CAN bus drivers are turned off, thus no transmission is possible from TXD to the

bus. The CAN bus pins are biased to recessive level during a thermal shutdown and the receiver to RXD path

remains operational.

10.3.4 Undervoltage Lockout and Unpowered Device

The V_CCsupply terminal has under voltage detection which will place the device in protected mode if the supply

drops below the UVLO threshold. This protects the bus during an under voltage event on V_CCby placing the bus

into a high impedance biased to ground state and the RXD terminal into a tri-stated (high impedance) state.

During undervoltage the device does not pass any signals from the bus. If the device is in normal mode and V_CC

supply is lost the device will transition to a protected mode.

The device is designed to be an "ideal passive" or “no load” to the CAN bus if the device is unpowered. The bus

terminals (CANH, CANL) have low leakage currents when the device is unpowered, so the device does not load

the bus. This is critical if some nodes of the network are unpowered while the rest of the of network remains

operational. Logic pins also have low leakage currents when the device is unpowered, so the device does not

load other circuits which may remain powered.

Table 1. Undervoltage Protection 3.3-V Single Supply Devices

V_CC

GOOD

DEVICE STATE

Operational

Protected

BUS

RXD

Per Operating Mode

High Impedance

BAD

Common mode bias to GND

High Impedance (no load)

UNPOWERED

Unpowered

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10.3.5 Fault Pin (TCAN337)

If one or more of the faults (TXD-Dominant Timeout, RXD dominant Timeout, Thermal Shutdown or

Undervoltage Lockout) occurs, the FAULT pin (open-drain) turns off, resulting in a high level when externally

pulled up to V_CCsupply.

V_CC

ꢀP

FAULT

Input

TXD

DTO

FAULT

RXD

DTO

Thermal

Shutdown

UV

Lockout

GND

Figure 29. FAULT Pin Function Diagram and Application

10.3.6 Floating Pins

The device has internal pull ups and pull downs on critical terminals to place the device into known states if the

pin floats. See Table 1 for details on pin bias conditions.

Table 2. Pin Bias

PULL UP or PULL DOWN

COMMENT

Weakly biases TXD toward recessive to prevent bus blockage or TXD DTO

triggering.

TXD

Pull up

STB

S

Pull down

Weakly biases STB terminal towards normal mode.

Weakly biases S terminal towards normal mode.

Weakly biases SHDN terminal towards normal mode.

SHDN

The internal bias should not be relied on by design, especially in noisy environments, but should be considered a

fall back protection. Special care needs to be taken when the device is used with MCUs using open drain

outputs. TXD is weakly internally pulled up. The TXD pull up strength and CAN bit timing require special

consideration when this device is used with an open drain TXD output on the microprocessor's CAN controller.

An adequate external pull up resistor must be used to ensure that the TXD output of the microprocessor

maintains adequate bit timing input to the CAN transceiver.

10.3.7 CAN Bus Short Circuit Current Limiting

The device has several protection features that limit the short circuit current when a CAN bus line is shorted.

These include CAN driver current limiting (dominant and recessive). The device has TXD dominant time out

which prevents permanently having the higher short circuit current of dominant state in case of a system fault.

During CAN communication the bus switches between dominant and recessive states, thus the short circuit

current may be viewed either as the current during each bus state or as a DC average current. For system

current and power considerations in the termination resistors and common mode choke ratings the average short

circuit current should be used. The percentage dominant is limited by the TXD dominant time out and CAN

protocol which has forced state changes and recessive bits such as bit stuffing, control fields, and interframe

space. These ensure there is a minimum recessive amount of time on the bus even if the data field contains a

high percentage of dominant bits.

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The short circuit current of the bus depends on the ratio of recessive to dominant bits and their respective short

circuit currents. The average short circuit current may be calculated with the following formula:

I_OS(AVG)= %Transmit x [(%REC_Bits x I_{OS(SS)_REC}) + (%DOM_Bits x I_{OS(SS)_DOM})] + [%Receive x I_{OS(SS)_REC}

]

(1)

Where:

•

I_OS(AVG)is the average short circuit current

%Transmit is the percentage the node is transmitting CAN messages

%Receive is the percentage the node is receiving CAN messages

%REC_Bits is the percentage of recessive bits in the transmitted CAN messages

%DOM_Bits is the percentage of dominant bits in the transmitted CAN messages

I_{OS(SS)_REC}is the recessive steady state short circuit current

I_{OS(SS)_DOM}is the dominant steady state short circuit current

The short circuit current and possible fault cases of the network should be taken into consideration when sizing

the power ratings of the termination resistance and other network components.

10.3.8 ESD Protection

The bus pins of the TCAN33x family possess on-chip ESD protection against ±25-kV human body model (HBM)

and ±12-kV IEC61000-4-2 contact discharge. The IEC-ESD test is far more severe than the HBM-ESD test. The

50% higher charge capacitance, C_S, and 78% lower discharge resistance, R_Dof the IEC model produce

significantly higher discharge currents than the HBM-model.

As stated in the IEC 61000-4-2 standard, contact discharge is the preferred test method; although IEC air-gap

testing is less repeatable than contact testing, air discharge protection levels are inferred from the contact

discharge test results.

R

D

C

40

35

30

25

20

15

10

5

50M

(1M)

330Ω

(1.5k)

10kV IEC

High-Voltage

Pulse

Generator

Device

Under

Test

150pF

(100pF)

C

S

10kV HBM

0

50

100

150

200

250

300

Time - ns

Figure 30. HBM and IEC-ESD Models and Currents in Comparison (HBM Values in Parenthesis)

10.3.9 Digital Inputs and Outputs

All the devices in this family are single 3.3-V nominal supply devices. The digital logic input and output levels for

these devices have TTL threshold levels.

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SLLSEQ7E –DECEMBER 2015–REVISED DECEMBER 2019

10.4 Device Functional Modes

10.4.1 CAN Bus States

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The CAN bus has two logical states during operation: recessive and dominant. See Figure 31 and Figure 32.

Recessive bus state is when the high resistive internal input resistors of each node's receiver bias the bus to a

common mode of about 1.85 V across the bus termination resistors. Recessive is equivalent to logic high and is

typically a differential voltage on the bus of about 0 V. Recessive state is also the idle state.

Dominant bus state is when the bus is driven differentially by one or more drivers. Current is induced to flow

through the termination resistors and generate a differential voltage on the bus. Dominant is equivalent to logic

low and is a differential voltage on the bus greater than the minimum threshold for a CAN dominant. A dominant

state overwrites the recessive state.

During arbitration, multiple CAN nodes may transmit a dominant bit at the same time. In this case the differential

voltage of the bus will be greater than the differential voltage of a single driver.

The host microprocessor of the CAN node will use the TXD terminal to drive the bus and will receive data from

the bus on the RXD pin.

Transceivers with low power Standby Mode have a third bus state where the bus terminals are weakly biased to

ground via the high resistance internal resistors of the receiver. See Figure 31 and Figure 32.

Standby and Shutdown

Modes

Normal and Silent Modes

CANH

V_diff

1.85 V

A

B

RXD

Bias

Unit

V_diff

CANL

A. Normal and Silent Modes

Recessive

Dominant

Recessive

Time, t

B. Standby and Shutdown Modes

Figure 31. Bus States (Physical Bit

Representation)

Figure 32. Simplified Recessive Common Mode

Bias Unit and Receiver

The devices have four main operating modes:

1. Normal mode (all devices)

2. Silent mode (TCAN330, TCAN337)

3. Standby mode with wake (TCAN334)

4. Shutdown mode (TCAN330, TCAN334)

Table 3. CAN Transceivers with Silent Mode

S

Device MODE

DRIVER

RECEIVER

RXD PIN

Reduced Power Silent

(Listen) Mode

HIGH

Disabled (OFF)⁽¹⁾

Enabled (ON)

Mirrors Bus State⁽²⁾

LOW/NC

Normal Mode

(1) See Figure 31 for bus state.

(2) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

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Table 4. CAN Transceivers with Standby Mode with Wake

STB

Device MODE

DRIVER

RECEIVER

RXD Terminal

High (Recessive) until

Ultra Low Current Standby

Mode

Low Power Receiver and

Bus Monitor Enabled (ON)

HIGH

Disabled (OFF)⁽¹⁾

Enabled (ON)

WUP, then filtered mirrors

(2)

of Bus State

(3)

LOW/NC

Normal Mode

Enabled (ON)

Mirrors Bus State

(1) See Figure 31 for bus state.

(2) Standby Mode RXD behavior: See Figure 33.

(3) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

Table 5. CAN Transceivers with Shutdown Mode

SHDN

HIGH

Device MODE

Lowest Current

Normal Mode

DRIVER

Disabled (OFF)⁽¹⁾

RECEIVER

Disabled (OFF)

Enabled (ON)

RXD Terminal

High (Recessive)

(2)

LOW/NC

Enabled (ON)

Mirrors Bus State

(1) See Figure 31 for bus state.

(2) Mirrors bus state: low if CAN bus is dominant, high if CAN bus is recessive.

10.4.2 Normal Mode

This is the normal operating mode of the device. The CAN driver and receiver are fully operational and CAN

communication is bi-directional. The driver is translating a digital input on TXD to a differential output on CANH

and CANL. The receiver is translating the differential signal from CANH and CANL to a digital output on RXD.

10.4.3 Silent Mode

This is the silent or receive only mode of the device. The CAN driver is disabled but the receiver is fully

operational. CAN communication is unidirectional and only flows from the CAN bus through the receive path of

the transceiver to the CAN protocol controller via the RXD output pin. The receiver is translating the differential

signal from CANH and CANL to a digital output on RXD.

10.4.4 Standby Mode with Wake

This is the low power mode of the device. The CAN driver and main receiver are turned off and bi-directional

CAN communication is not possible. The low power receiver and bus monitor are enabled to allow for RXD Wake

Requests via the CAN bus. A wake up request will be output to RXD (driven low) as shown in Figure 33. The

local CAN protocol microprocessor should monitor RXD for transitions (high to low) and reactivate the device to

normal mode based on the RXD Wake Request. The CAN bus pins are weakly pulled to GND during this mode,

see Figure 32.

10.4.5 Bus Wake via RXD Request (BWRR) in Standby Mode

The TCAN334 with low power standby mode, offers a wake up from the CAN bus mechanism called bus wake

via RXD Request (BWRR) to indicate to a host microprocessor that the bus is active and it should wake up and

return to normal CAN communication.

This device uses the multiple filtered dominant wake-up pattern (WUP) from ISO11898-5 to qualify bus traffic into

a request to wake the host microprocessor. The bus wake request is signaled to the microprocessor by a falling

edge and low corresponding to a “filtered” bus dominant on the RXD terminal (BWRR).

The wake up pattern (WUP) consists of a filtered dominant bus, then a filtered recessive bus time followed by a

second filtered bus time. Once the WUP is detected the device will start issuing wake up requests (BWRR) on

the RXD terminal every time a filtered dominant time is received from the bus. The first filtered dominant initiates

the WUP and the bus monitor waits on a filtered recessive; other bus traffic does not reset the bus monitor. Once

a filtered recessive is received, the bus monitor waits on a filtered dominant and again; other bus traffic does not

reset the bus monitor. Immediately upon receiving of the second filtered dominant, the bus monitor recognizes

the WUP and transitions to BWRR mode. In this mode, RXD is driven low for all dominant bits lasting for longer

than t_{WK_FILTER}. The RXD output during BWRR matches the classical 8-pin CAN devices, such as the

TCANA1040A-Q1 device, that used the single filtered dominant on the bus as the wake up request mechanism

from ISO11898-5.

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For a dominant or recessive to be considered filtered, the bus must be in that state for more than t_{WK_FILTER}time.

Due to variability in the t_{WK_FILTER}the following scenarios are applicable. Bus state times less than t_{WK_FILTER(MIN)}

are never detected as part of a WUP and thus no BWRR is generated. Bus state times between t_{WK_FILTER(MIN)}

and t_{WK_FILTER(MAX)}may be detected as part of a WUP and a BWRR may be generated. Bus state times more

than t_{WK_FILTER(MAX)}are always detected as part of a WUP and thus a BWRR is always generated.

See Figure 33 for the timing diagram of the WUP. The pattern, t_{WK_FILTER}time used for the WUP and BWRR

prevent noise and bus stuck dominant faults from causing false wake requests. If the device is switched to

normal mode, or an under voltage event occurs on V_CCthe BWRR will be lost.

Wake Up Pattern (WUP)

Wake Request via RXD

Filtered

Dominant

Filtered

Dominant

Filtered

Recessive

Waiting for

Filtered

Dominant

Waiting for

Filtered

Recessive

Bus

Bus V_Diff

≥ t_{WK_FILTER}

RXD

Figure 33. Wake Up Pattern (WUP) and Bus Wake via RXD Request (BWRR)

10.4.6 Shutdown Mode

This is the lowest power mode of all of the devices. The CAN driver and receiver are turned off and bi-directional

CAN communication is not possible. It is not possible to receive a remote wake request via the CAN bus in this

mode. The CAN bus pins are pulled to GND during this mode as shown in Figure 31.

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10.4.7 Driver and Receiver Function Tables

Table 6. Driver Function Table

BUS OUTPUTS⁽²⁾

(3)

DEVICE MODE

TXD⁽¹⁾INPUT

DRIVEN BUS STATE

CANH

CANL

L

H

Z

L

Z

Dominant

Normal

H or Open

Biased Recessive

Weak Pull to GND

Silent

X

Standby

Shutdown

(1) H = high level, L = low level, X = irrelevant.

(2) H = high level, L = low level, Z = high Z receiver bias.

(3) For Bus state and bias see Figure 31 and Figure 32.

Table 7. Receiver Function Table Normal and Standby Modes

CAN DIFFERENTIAL INPUTS

BUS STATE

DEVICE MODE

RXD PIN⁽¹⁾

V_(ID)= V_(CANH)– V_(CANL)

V

_(ID)≥ 0.9 V

0.5 V < V_(ID)< 0.9 V

_(ID)≤ 0.5 V

_(ID)≥ 1.15 V

0.4 V < V_(ID)< 1.15 V

Dominant

?

L

?

Normal or Silent

V

Recessive

Dominant

?

H

V

Standby

See Figure 33

V

_(ID)≤ 0.4 V

Recessive

Open

Shutdown

Any

H

Open (V_(ID)≈ 0 V)

(1) I = high level, L = low level, ? = indeterminate.

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11 Application and Implementation

NOTE

Information in the following applications sections is not part of the TI component

specification, and TI does not warrant its accuracy or completeness. TI’s customers are

responsible for determining suitability of components for their purposes. Customers should

validate and test their design implementation to confirm system functionality.

11.1 Application Information

11.1.1 Bus Loading, Length and Number of Nodes

The ISO 11898 standard specifies a data rate up to 1 Mbps, maximum CAN bus cable length of 40 m, maximum

drop line (stub) length of 0.3 m and a maximum of 30 nodes. However, with careful network design, the system

may have longer cables, longer stub lengths, and many more nodes to a bus. Many CAN organizations and

standards have scaled the use of CAN for applications outside the original ISO 11898 standard. They have made

system level trade-offs for data rate, cable length, and parasitic loading of the bus. Examples of some of these

specifications are ARINC825, CANopen, CAN Kingdom, DeviceNet and NMEA200.

A high number of nodes requires a transceiver with high input impedance and wide common mode range such

as the TCAN33x CAN family. ISO 11898-2 specifies the driver differential output with a 60-Ω load (two 120- Ω

termination resistors in parallel) and the differential output must be greater than 1.5 V. The TCAN33x devices are

specified to meet the 1.5-V requirement with a 50-Ω load across a common mode range of –12 V to 12 V

through a 330-Ω coupling network. This network represents the bus loading of 120 TCAN33x transceivers based

on their minimum differential input resistance of 40 kΩ.

For CAN network design, margin must be given for signal loss across the system and cabling, parasitic loadings,

network imbalances, ground offsets and signal integrity, thus a practical maximum number of nodes may be

lower. Bus length may also be extended beyond the original ISO 11898 standard of 40 m by careful system

design and data rate tradeoffs. For example, CANopen network design guidelines allow the network to be up to

1 km with changes in the termination resistance, cabling, number of nodes and data rate.

This flexibility in CAN network design is one of the key strengths of the various extensions and additional

standards that have been built on the original ISO 11898 CAN standard.

11.2 Typical Application

V_CC

3

SHDN/

FAULT

5

TCAN33x

V_CC

V_OUT

V_IN

S / STB

CANH

8

7

CAN Transceiver

3-V Voltage

Regulator

3-V MCU

(e.g. TPSxxxx)

RXD

TXD

RXD

TXD

4

1

CANL

6

Optional:

Terminating

Node

2

GND

Figure 34. Typical 3.3-V Application

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Typical Application (continued)

11.2.1 Design Requirements

11.2.1.1 CAN Termination

The ISO 11898 standard specifies the interconnect to be a twisted-pair cable (shielded or unshielded) with 120-Ω

characteristic impedance (Z_O). Resistors equal to the characteristic impedance of the line should be used to

terminate both ends of the cable to prevent signal reflections. Unterminated drop lines (stubs) connecting nodes

to the bus should be kept as short as possible to minimize signal reflections. The termination may be on the

cable or in a node, but if nodes may be removed from the bus the termination must be carefully placed so that it

is not removed from the bus.

11.2.2 Detailed Design Procedure

Termination is typically a 120-Ω resistor at each end of the bus. If filtering and stabilization of the common mode

voltage of the bus is desired, then split termination may be used (see Figure 8). Split termination uses two 60-Ω

resistors with a capacitor in the middle of these resistors to ground. Split termination improves the

electromagnetic emissions behavior of the network by eliminating fluctuations in the bus common mode voltages

at the start and end of message transmissions.

Care should be taken in the power ratings of the termination resistors used. Typically the worst case condition

would be if the system power supply was shorted across the termination resistance to ground. In most cases the

current flow through the resistor in this condition would be much higher than the transceiver's current limit.

Node n

(with termination)

Node 1

Node 2

Node 3

MCU or DSP

CAN

Controller

CAN

Controller

CAN

Controller

CAN

Controller

CAN Transceiver

R_TERM

CAN Transceiver

R_TERM

Figure 35. Typical CAN Bus

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Typical Application (continued)

Standard Termination

Split Termination

CANH

R_TERM/2

CAN

Transceiver

CAN

Transceiver

R_TERM

C_SPLIT

R_TERM/2

CANL

Figure 36. CAN Bus Termination Concepts

11.2.3 Application Curves

1 Mbps

Temp = 25°C

V_CC= 3.3 V

5 Mbps

Temp = 25°C

V_CC= 3.3 V

60 Ω Load

Figure 37. TXD, CANH/L and RXD Waveforms

Figure 38. TXD, CANH/L and RXD Waveforms

11.3 System Examples

11.3.1 ISO11898 Compliance of TCAN33x Family of 3.3-V CAN Transceivers Introduction

Many users value the low power consumption of operating their CAN transceivers from a 3.3-V supply. However,

some are concerned about the interoperability with 5 V supplied transceivers on the same bus. This report

analyzes this situation to address those concerns.

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System Examples (continued)

11.3.2 Differential Signal

CAN is a differential bus where complementary signals are sent over two wires and the voltage difference

between the two wires defines the logical state of the bus. The differential CAN receiver monitors this voltage

difference and outputs the bus state with a single ended logic level output signal.

NOISE MARGIN

900 mV Threshold

RECEIVER DETECTION WINDOW

75% SAMPLE POINT

500 mV Threshold

NOISE MARGIN

Figure 39. Typical Differential Output Waveform

The CAN driver creates the differential voltage between CANH and CANL in the dominant state. The dominant

differential output of the TCAN33x is greater than 1.5 V and less than 3 V across a 60-Ω load as defined by the

ISO11898 standard. These are the same limiting values for 5 V supplied CAN transceivers. The bus termination

resistors drive the recessive bus state and not the CAN driver.

A CAN receiver is required to output a recessive state when less than 500 mV of differential voltage exists on the

bus, and a dominant state when more than 900 mV of differential voltage exists on the bus. The CAN receiver

must do this with common-mode input voltages from –2 V to 7 V. The TCAN33x family receivers meet these

same input specifications as 5 V supplied receivers.

11.3.3 Common-Mode Signal and EMC Performance

A common-mode signal is an average voltage of the two signal wires that the differential receiver rejects. The

common-mode signal comes from the CAN driver, ground noise, and coupled bus noise. Since the bias voltage

of the recessive state of the device is dependent on V_CC, any noise present or variation of V_CChas an effect on

this bias voltage seen by the bus. The TCAN33x family has the recessive bias voltage set higher than 0.5 x V_CC

to match common mode in recessive mode to dominant mode. This results in superior EMC performance.

12 Power Supply Recommendations

To ensure reliable operation at all data rates and supply voltages, each supply should be decoupled with a 100-

nF ceramic capacitor located as close to the V_CCsupply pins as possible. The TPS76333 is a linear voltage

regulator suitable for the 3.3 V supply.

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13 Layout

13.1 Layout Guidelines

TCAN33x family of devices incorporates integrated IEC 61000-4-2 ESD protection. Should the system requires

additional protection against ESD, EFT or surge, additional external protection and filtering circuitry may be

needed.

In order for the PCB design to be successful, start with design of the protection and filtering circuitry. Because

ESD and EFT transients have a wide frequency bandwidth from approximately 3 MHz to 3 GHz, high frequency

layout techniques must be applied during PCB design.

Design the bus protection components in the direction of the signal path. Do not force the transient current to

divert from the signal path to reach the protection device. Below is a list of layout recommendations when

designing a CAN transceiver into an application.

•

Transient Protection on CANH and CANL: Transient Voltage Suppression (TVS) and capacitors (D1, C5 and

C7 shown in Figure 40) can be used for additional system level protection. These devices must be placed as

close to the connector as possible. This prevents the transient energy and noise from penetrating into other

nets on the board.

•

Bus Termination on CANH and CANL: Figure 40 shows split termination where the termination is split into two

resistors, R5 and R6, with the center or split tap of the termination connected to ground through capacitor C6.

Split termination provides common mode filtering for the bus. When termination is placed on the board

instead of directly on the bus, care must be taken to ensure the terminating node is not removed from the

bus, as this causes signal integrity issues if the bus is not properly terminated on both ends.

•

Decoupling Capacitors on V_CC: Bypass and bulk capacitors must be placed as close as possible to the supply

pins of transceiver (examples are C2 and C3).

Ground and power connections: Use at least two vias for V_CCand ground connections of bypass capacitors

and protection devices to minimize trace and via inductance.

Digital inputs and outputs: To limit current of digital lines, serial resistors may be used. Examples are R1, R2,

R3 and R4.

Filtering noise on digital inputs and outputs: To filter noise on the digital I/O lines, a capacitor may be used

close to the input side of the I/O as shown by C1, C8 and C4.

Fault Output Pin (TCAN337 only): Because the FAULT output pin is an open drain output, an external pullup

resistor is required to pull the pin voltage high for normal operation (R7).

TXD input pin: If an open-drain host processor is used to drive the TXD pin of the device, an external pullup

resistor between 1 kΩ and 10 kΩ must be used to help drive the recessive input state of the device (weak

internal pullup resistor).

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13.2 Layout Example

1

8

TXD

S/STB

R3

R1

GND

V_CC

C4

2

3

4

7

R5

U1

TCAN33x

C6

6

R6

5

RXD

R2

SHDN

R4

C8

R7

VCC

FAULT

Figure 40. Layout Example

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14 Device and Documentation Support

14.1 Related Links

The table below lists quick access links. Categories include technical documents, support and community

resources, tools and software, and quick access to sample or buy.

Table 8. Related Links

TECHNICAL

DOCUMENTS

TOOLS &

SOFTWARE

SUPPORT &

COMMUNITY

PARTS

PRODUCT FOLDER

SAMPLE & BUY

TCAN330

TCAN332

TCAN334

TCAN337

TCAN330G

TCAN332G

TCAN334G

TCAN337G

Click here

14.2 Support Resources

TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight

from the experts. Search existing answers or ask your own question to get the quick design help you need.

Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do

not necessarily reflect TI's views; see TI's Terms of Use.

14.3 Trademarks

E2E is a trademark of Texas Instruments.

All other trademarks are the property of their respective owners.

14.4 Electrostatic Discharge Caution

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

14.5 Glossary

SLYZ022 — TI Glossary.

This glossary lists and explains terms, acronyms, and definitions.

15 Mechanical, Packaging, and Orderable Information

The following pages include mechanical, packaging, and orderable information. This information is the most

current data available for the designated devices. This data is subject to change without notice and revision of

this document. For browser-based versions of this data sheet, refer to the left-hand navigation.

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PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jan-2022

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TCAN330DCNR

TCAN330DCNT

TCAN330DR

SOT-23

SOIC

DCN

D

8

3000

250

180.0

330.0

180.0

330.0

180.0

330.0

180.0

330.0

180.0

330.0

180.0

330.0

8.4

3.23

6.4

3.17

5.2

1.37

2.1

4.0

8.0

4.0

8.0

4.0

8.0

4.0

8.0

4.0

8.0

4.0

8.0

Q3

Q1

Q3

Q1

Q3

Q1

Q3

Q1

Q3

Q1

Q3

Q1

2500

3000

250

12.4

8.4

12.0

8.0

TCAN330GDCNR

TCAN330GDCNT

TCAN330GDR

TCAN332DCNR

TCAN332DCNT

TCAN332DR

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

3000

250

12.4

8.4

12.0

8.0

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

3000

250

12.4

8.4

12.0

8.0

TCAN332GDCNR

TCAN332GDCNT

TCAN332GDR

TCAN334DCNR

TCAN334DCNT

TCAN334DR

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

3000

250

12.4

8.4

12.0

8.0

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

3000

250

12.4

8.4

12.0

8.0

TCAN334GDCNR

TCAN334GDCNT

TCAN334GDR

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

12.4

12.0

Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jan-2022

Device

Package Package Pins

Type Drawing

SPQ

Reel

A0

B0

K0

P1

W

Pin1

Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant

(mm) W1 (mm)

TCAN337DCNR

TCAN337DCNT

TCAN337DR

SOT-23

SOIC

DCN

D

8

3000

250

180.0

330.0

180.0

330.0

8.4

3.23

6.4

3.17

5.2

1.37

2.1

4.0

8.0

4.0

8.0

Q3

Q1

Q3

Q1

2500

3000

250

12.4

8.4

12.0

8.0

TCAN337GDCNR

TCAN337GDCNT

TCAN337GDR

SOT-23

SOIC

DCN

D

3.23

6.4

3.17

5.2

1.37

2.1

8.4

8.0

2500

12.4

12.0

*All dimensions are nominal

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TCAN330DCNR

TCAN330DCNT

TCAN330DR

SOT-23

SOIC

DCN

D

8

3000

250

202.0

340.5

202.0

340.5

202.0

340.5

202.0

201.0

336.1

201.0

336.1

201.0

336.1

201.0

28.0

25.0

28.0

25.0

28.0

25.0

28.0

2500

3000

250

TCAN330GDCNR

TCAN330GDCNT

TCAN330GDR

TCAN332DCNR

TCAN332DCNT

TCAN332DR

SOT-23

SOIC

DCN

D

2500

3000

250

SOT-23

SOIC

DCN

D

2500

3000

250

TCAN332GDCNR

TCAN332GDCNT

SOT-23

DCN

Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jan-2022

Device

Package Type Package Drawing Pins

SPQ

Length (mm) Width (mm) Height (mm)

TCAN332GDR

TCAN334DCNR

TCAN334DCNT

TCAN334DR

SOIC

SOT-23

SOIC

D

8

2500

3000

250

340.5

202.0

340.5

202.0

340.5

202.0

340.5

202.0

340.5

336.1

201.0

336.1

201.0

336.1

201.0

336.1

201.0

336.1

25.0

28.0

25.0

28.0

25.0

28.0

25.0

28.0

25.0

DCN

D

2500

3000

250

TCAN334GDCNR

TCAN334GDCNT

TCAN334GDR

TCAN337DCNR

TCAN337DCNT

TCAN337DR

SOT-23

SOIC

DCN

D

2500

3000

250

SOT-23

SOIC

DCN

D

2500

3000

250

TCAN337GDCNR

TCAN337GDCNT

TCAN337GDR

SOT-23

SOIC

DCN

D

2500

Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION

www.ti.com

5-Jan-2022

TUBE

*All dimensions are nominal

Device

Package Name Package Type

Pins

SPQ

L (mm)

W (mm)

T (µm)

B (mm)

TCAN330D

TCAN330GD

TCAN332D

TCAN332GD

TCAN334D

TCAN334GD

TCAN337D

TCAN337GD

D

SOIC

8

75

507

8

3940

4.32

Pack Materials-Page 4

PACKAGE OUTLINE

D0008A

SOIC - 1.75 mm max height

SCALE 2.800

SMALL OUTLINE INTEGRATED CIRCUIT

C

SEATING PLANE

.228-.244 TYP

[5.80-6.19]

.004 [0.1] C

A

PIN 1 ID AREA

6X .050

[1.27]

8

1

2X

.189-.197

[4.81-5.00]

NOTE 3

.150

[3.81]

4X (0 -15 )

4

5

8X .012-.020

[0.31-0.51]

B

.150-.157

[3.81-3.98]

NOTE 4

.069 MAX

[1.75]

.010 [0.25]

C A B

.005-.010 TYP

[0.13-0.25]

4X (0 -15 )

SEE DETAIL A

.010

[0.25]

.004-.010

[0.11-0.25]

0 - 8

.016-.050

[0.41-1.27]

DETAIL A

TYPICAL

(.041)

[1.04]

4214825/C 02/2019

NOTES:

1. Linear dimensions are in inches [millimeters]. Dimensions in parenthesis are for reference only. Controlling dimensions are in inches.

Dimensioning and tolerancing per ASME Y14.5M.

2. This drawing is subject to change without notice.

3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not

exceed .006 [0.15] per side.

4. This dimension does not include interlead flash.

5. Reference JEDEC registration MS-012, variation AA.

www.ti.com

EXAMPLE BOARD LAYOUT

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

SEE

DETAILS

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

LAND PATTERN EXAMPLE

EXPOSED METAL SHOWN

SCALE:8X

SOLDER MASK

OPENING

SOLDER MASK

OPENING

METAL UNDER

SOLDER MASK

METAL

EXPOSED

METAL

EXPOSED

METAL

.0028 MAX

[0.07]

.0028 MIN

[0.07]

ALL AROUND

SOLDER MASK

DEFINED

NON SOLDER MASK

DEFINED

SOLDER MASK DETAILS

4214825/C 02/2019

NOTES: (continued)

6. Publication IPC-7351 may have alternate designs.

7. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

www.ti.com

EXAMPLE STENCIL DESIGN

D0008A

SOIC - 1.75 mm max height

SMALL OUTLINE INTEGRATED CIRCUIT

8X (.061 )

[1.55]

SYMM

1

8

8X (.024)

[0.6]

SYMM

(R.002 ) TYP

[0.05]

5

4

6X (.050 )

[1.27]

(.213)

[5.4]

SOLDER PASTE EXAMPLE

BASED ON .005 INCH [0.125 MM] THICK STENCIL

SCALE:8X

4214825/C 02/2019

NOTES: (continued)

8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate

design recommendations.

9. Board assembly site may have different recommendations for stencil design.

www.ti.com

IMPORTANT NOTICE AND DISCLAIMER

TI PROVIDES TECHNICAL AND RELIABILITY DATA (INCLUDING DATA SHEETS), DESIGN RESOURCES (INCLUDING REFERENCE

DESIGNS), APPLICATION OR OTHER DESIGN ADVICE, WEB TOOLS, SAFETY INFORMATION, AND OTHER RESOURCES “AS IS”

AND WITH ALL FAULTS, AND DISCLAIMS ALL WARRANTIES, EXPRESS AND IMPLIED, INCLUDING WITHOUT LIMITATION ANY

IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE OR NON-INFRINGEMENT OF THIRD

PARTY INTELLECTUAL PROPERTY RIGHTS.

These resources are intended for skilled developers designing with TI products. You are solely responsible for (1) selecting the appropriate

TI products for your application, (2) designing, validating and testing your application, and (3) ensuring your application meets applicable

standards, and any other safety, security, regulatory or other requirements.

These resources are subject to change without notice. TI grants you permission to use these resources only for development of an

application that uses the TI products described in the resource. Other reproduction and display of these resources is prohibited. No license

is granted to any other TI intellectual property right or to any third party intellectual property right. TI disclaims responsibility for, and you

will fully indemnify TI and its representatives against, any claims, damages, costs, losses, and liabilities arising out of your use of these

resources.

TI’s products are provided subject to TI’s Terms of Sale or other applicable terms available either on ti.com or provided in conjunction with

such TI products. TI’s provision of these resources does not expand or otherwise alter TI’s applicable warranties or warranty disclaimers for

TI products.

TI objects to and rejects any additional or different terms you may have proposed. IMPORTANT NOTICE

Mailing Address: Texas Instruments, Post Office Box 655303, Dallas, Texas 75265


型号：	TCAN330GDCNT
厂家：	TEXAS INSTRUMENTS
描述：	具有 CAN FD（灵活数据速率）的 3.3V CAN 收发器 \| DCN \| 8 \| -40 to 125
文件：	总45页 (文件大小：2016K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

TCAN330GDCNT [TI]

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