THS7318 [TI]
3-Channel Low-Power EDTV/SDTV Video Line Driver With Low-Pass Filters; 3通道低功耗EDTV / SDTV视频线路驱动器，低通滤波器
| 型号： | THS7318 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | 3-Channel Low-Power EDTV/SDTV Video Line Driver With Low-Pass Filters |
| 文件： | 总10页 (文件大小：285K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
3-Channel Low-Power EDTV/SDTV Video Line Driver With Low-Pass Filters
FEATURES
DESCRIPTION
•
•
•
•
•
•
•
Single Supply: 2.85 V to 5 V
The THS7318 is a very low power single-supply 3
channel device designed to process Y’, P’B, P’R
enhanced definition TV and Y’, C’, and CVBS
standard definition TV signals. It integrates circuitry
to perform signal processing commonly required in
video output applications.
Low Total Supply Current = 4.5 mA (max)
Low Power Mode: 5 µW (max)
Integrated DAC Reconstruction Filters
Video Line Driver Outputs with 6 dB Gain
Rail-to-Rail Output
All
channels
incorporate
3rd-order
20-MHz
Butterworth DAC reconstruction filters designed for
video systems with 54 MSPS DAC sampling rates
like NTSC/PAL 480p/576p EDTV and 480i/576i
SDTV video.
RoHS Compliant 9-Pin Wafer Scale Package
APPLICATIONS
•
•
•
•
Personal Media Players
Digital Cameras
Cellular Phone Video Output Buffering
USB/Portable Low Power Video Buffering
Rail-to-Rail output drivers on all channels allow for
both ac and dc coupled outputs.
The low quiescent current makes it an excellent
choice for USB powered or portable video
applications.
The THS7318 is available in a 9-pin NanoFree™
wafer scale package. It is specified for operation
from 0°C to 70°C.
THS7318 BLOCK DIAGRAM
-
+
Y’ IN
Y’ OUT
LPF
LPF
LPF
6 dB
6 dB
6 dB
DC Offset
-
+
P ’ IN /
B
P ’ OUT /
B
CVBS IN
CVBS OUT
DC Offset
-
+
P ’ IN /
R
P ’ OUT /
R
C’ IN
C’ OUT
DC Offset
Bias
Control
EN
GND
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoFree is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2007, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be
more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
UNIT
V
VSS
VI
Supply voltage, VS+ to GND
Input voltage
5.5
–0.4 to VS+
V
IO
Output current
±100
mA
Continuous power dissipation
See Dissipation Rating Table
(2)
Any condition
150
125
°C
°C
°C
V
TJ
Maximum junction temperature
Storage temperature range
Continuous operation, long term reliability(3)
Tstg
–65 to 150
2000
HBM
CDM
MM
ESD ratings
1500
V
200
V
(1) Stresses above those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied Exposure to absolute maximum rated conditions for extended periods may degrade device reliability.
(2) The absolute maximum junction temperature under any condition is limited by the constraints of the silicon process.
(3) The absolute maximum junction temperature for continuous operation is limited by the package constraints. Operation above this
temperature may result in reduced reliability and/or lifetime of the device.
DISSIPATION RATINGS(1)
POWER RATING(2)
θJC
(°C/W)
θJA
(°C/W)
(TJ = 125°C)
PACKAGE
TA = 25°C
TA = 70°C
YZF
38
105
950 mW
428 mW
(1) This data was taken with the JEDEC High-K test PCB.
(2) Power rating is determined with a junction temperature of 125°C. This is the point where distortion starts to substantially increase and
long-term reliability starts to be reduced. Thermal management of the final PCB should strive to keep the junction temperature at or
below 125°C for best performance and reliability.
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN
2.85
0
MAX
5
UNIT
V
VS+
TA
Supply voltage
Ambient temperature
70
°C
2
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THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
PACKAGING/ORDERING INFORMATION
TRANSPORT MEDIA,
QUANTITY
PACKAGED DEVICES
PACKAGE TYPE(1)
PART CODE
THS7318YZFT
THS7318YZFR
Tape and Reel, 250
Tape and Reel, 3000
Wafer Scale 9-pin
BYR
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
NanoFree™ Placement and Removal Procedures
These procedures are generic guidelines to rework NanoFree™ packages assembled on a 0.056-inch thick FR4
board. It’s recommended to modify heating profiles for different board thicknesses and equipment used. The
assembly process recommended below should be used with a new device. Do not reuse the part after it is
removed.
Air-VacEngineering (www.air-vac-eng.com) has established NanoFreeTM reflow profiles for their Hot Gas
(convection) rework equipment DRS-24NC. The NMX090DVG nozzle is recommended for use with the YZF
package. Customers can use other comparable hot gas (convection) equipment and tooling.
Placement
1. Apply flux paste to component
2. Align device over pads
3. Place device on board. Care must be taken to prevent over-travel during placement which may damage
the part or vacuum tip.
4. Raise nozzle 0.05"
5. Preheat board to 90°C, nozzle warming up 20% air flow, 125°C
6. Soak Stage—20% air flow, 225°C, 90 seconds
7. Ramp Stage—20% air flow, 335°C, 30 seconds
8. Reflow Stage—25% air flow, 370°C, 65 seconds
9. Cool down Stage—40% air flow, 25°C, 50 seconds
Removal
1. Apply flux paste to component
2. Align Nozzle over part to be removed
3. Maintain nozzle 0.050"over device. Care must be taken to prevent over-travel of the vacuum tip which
may damage the part or vacuum tip when measuring this distance.
4. Preheat board to 90°C, nozzle warming up 20% air flow, 125°C
5. Soak Stage—20% air flow, 225°C, 90 seconds
6. Ramp Stage—20% air flow, 335°C, 30 seconds
7. Reflow Stage—25% air flow, 370°C, 65 seconds
8. Enable Vacuum at the end of the reflow cycle, lower vacuum nozzle, and remove part
9. Cool down Stage—40% air flow, 25°C, 50 seconds
10. Turn off the vacuum and remove part from nozzle.
11. Care should be used if the device is to be returned to TI for failure analysis. Using any metal tweezers or
rough handling can damage the part, and render it un-analyzable.
3
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THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
ELECTRICAL CHARACTERISTICS
VS+ = 3.3V, 27°C, Y’ and P’R / C’ channels: RL = 150 Ω and CL = 6.2 pF to GND P’B / CVBS channel: 75 Ω and CL = 6.2 pF
to GND (unless otherwise noted)
TEST
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
LEVEL(1)
DC CHARACTERISTICS
VSS
IQ
Supply voltage range
2.85
2.8
3.3
3.5
5
4.5
V
mA
µA
B
A
A
A
A
A
C
A
A
A
A
A
Quiescent supply current
Shutdown supply current
Output DC level shift voltage
EN = High
EN = Low
All channels
VSD
0.150
150
<1
110
–100
–170
200
–240
–415
mV
nA
Y’ and P’B / CVBS channels
P’R / C’ channel
–160
–280
2.4/1
2
Input bias current
nA
Input resistance / capacitance
Voltage gain
MΩ/pF
V/V
%
1.98
2.02
Channel to Channel Gain Match All Channels
±0.14
±1
PSRR Power supply rejection
DC
47
2.85
2.6
dB
Y’ and P’R / C’ channel, 150 Ω to GND
P’B / CVBS channel, 50 Ω to GND
2.96
2.9
V
VOH
Output voltage swing high
V
P’B output high minus output
offset
At Vs+ = 3.135 V, P’B / CVBS channel, 50 Ω to
GND
2.3
2.65
V
A
Y’ and P’R / C’ channel
P’B / CVBS channel
EN = Low
70
mA
mA
µA
µA
V
C
C
A
A
A
A
C
Output short-circuit current
Max current into EN pin
100
<1
<1
EN = High
Disable threshold
Enable threshold
Low = off
0.6
High = on
2.1
V
Output impedance in shutdown EN = Low
AC PERFORMANCE
±0.1 dB Bandwidth
20
kΩ
Relative to 1 MHz
Relative to 1 MHz
Relative to 1 MHz
f = 43 MHz, Relative to 1 MHz
NTSC and PAL
11
17
MHz
MHz
MHz
dB
C
A
B
A
C
C
C
C
C
C
C
±1.0 dB Bandwidth
–3 dB Bandwidth
14
17
20
Normalized stop band gain
Differential gain
–21
0.05
0.03
4
–12
%
Differential phase
Group delay variation
Signal to noise ratio
Rise / fall time
NTSC and PAL
deg
ns
f = 11 MHz w/ref to 1 MHz
VOUT = 2-VPP sine wave
VOUT = 2-V step
62
dB
tr/tf
20
ns
Positive/ negative slew rate
THD at 1MHz
VOUT = 2-V step
80
V/µs
dBc
At 1MHz, 2 VPP
73
(1) Test levels:
(A) 100% tested at 25°C. Overtemperature limits set by characterization and simulation.
(B) Limits set by characterization and simulation.
(C) Typical value only for information.
4
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THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
THS7318
(Top View)
Date/Trace Code
XXXXXX
BYRS
Device Code
Assembly Site Code
Pin A1 Index
THS7318
(Bottom View)
Vs+
C
Y’ IN
Y’ OUT
EN
P ’ IN /
B
P ’ OUT /
B
B
A
CVBS IN
CVBS OUT
P ’ IN /
R
P ’ OUT /
R
C’ IN
C’ OUT
1
2
3
GND
TERMINAL FUNCTIONS
COL.
ROW
PIN NAME
DESCRIPTION
1
1
1
2
C
B
A
C
Y' IN
PB’ IN / CVBS IN
PR’ IN / C’ IN
Vs+
Luma input
Component video input / composite video input
Component video input / chroma input
Positive power supply input
Enable input. Logic high enables part. Logic low disables part. To insure proper operation,
this pin must be driven and cannot be left floating.
2
B
EN
2
3
3
3
A
C
B
A
GND
Ground reference pin for all internal circuitry
Luma output
Y’ OUT
PB’ OUT / CVBS OUT Component video output / composite video output
PR’ OUT / C’ OUT
Component video output / chroma output
5
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THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
THS7318 DESCRIPTION
The THS7318 is an integrated analog video processor designed with integrated Butterworth filters and video line
driver amplifiers to provide the analog signal conditioning required for EDTV signals in portable video
applications.
The device accepts 3 inputs; Y’ (Luma), P’B / CVBS (analog color difference with blue emphasis / composite
video) and P’R / C’ (analog color difference with red emphasis / chroma), and provides 3 filtered and amplified
outputs; Y’, P’B / CVBS and P’R / C’.
The following are detailed descriptions of each channel.
CHANNEL DESCRIPTIONS
All channels are comprised of DC offset, 3rd order Butterworth low pass filter, and output buffer amplifier. All
channels are same except the Y’ and P’R / C’ output amplifiers are designed to drive one doubly terminated 75Ω
video line and the P’B / CVBS output amplifier is designed to drive two doubly terminated 75Ω video lines. Even
under the fault condition where one of the video lines is shorted, the P’B / CVBS output amplifier is capable of
full video performance on the properly terminated output.
DC Offset
The DC offset circuit is used to insure the output is not driven into saturation and video signal is not
compressed. The nominal output offset caused by this circuit is 150 mV.
3rd Order Butterworth Low Pass Filter
To reduce DAC images that cause aberrations in the video display, a 3rd order Butterworth low pass filter is
inserted in the signal path. This DAC reconstruction filter is designed for video systems with 54 MSPS DAC
sampling rates like NTSC/PAL 480p/576p EDTV and 480i/576i SDTV video, with nominal 0.1-dB flatness to
11 MHz, -3-dB bandwidth of 20 MHz, and 20 dB attenuation at 43 MHz.
Output Buffer Amplifier
The output buffer amplifiers are designed for a gain of 6 dB. The Y’ and P’R / C’ output amplifiers are
designed to drive one doubly terminated 75Ω video line and the P’B / CVBS output amplifier is designed to
drive two doubly terminated 75Ω video lines. Even under the fault condition where one of the video lines is
shorted, the P’B / CVBS output amplifier is capable of full video performance on the properly terminated
output.
6
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THS7318
www.ti.com
SLOS517A–JANUARY 2007–REVISED FEBRUARY 2007
TYPICAL APPLICATION CIRCUITS
DVDD
+3.3V
0.1 mF
0.1 mF
75 W
Y’ IN
Y’ OUT
C
B
A
Y’
S
R
P’ IN /
B
P’ OUT /
B
Video
CVBS IN
CVBS OUT
CVBS
R
P’ IN /
R
P’ OUT /
R
75 W
75 W
C’ IN
C’ OUT
75 W
75 W
C’
R
1
2
GND
3
CVBS 1
DAC / Encoder
E N
75 W
75 W
CVBS 2
75 W
Figure 1. Application Drawing CVBS and S Video
DVDD
+3.3V
Component
Video
0.1 mF
0.1 mF
75 W
75 W
75 W
Y’ IN
Y’ OUT
C
B
A
75 W
75 W
75 W
Y’
R
P’ IN /
B
CVBS IN
P’ OUT /
B
CVBS OUT
P’
B
R
P’ IN /
R
C’ IN
P’ OUT /
R
C’ OUT
P’
R
R
1
2
3
DAC / Encoder
GND
E N
Figure 2. Application Drawing Component Video
7
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PACKAGE OPTION ADDENDUM
www.ti.com
7-Feb-2007
PACKAGING INFORMATION
Orderable Device
THS7318YZFR
THS7318YZFT
Status (1)
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
DSBGA
YZF
9
3000 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
DSBGA
YZF
9
250 Green (RoHS &
no Sb/Br)
SNAGCU
Level-1-260C-UNLIM
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
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