TL072ACPS [TI]
DUAL OP-AMP, 7500uV OFFSET-MAX, 3MHz BAND WIDTH, PDSO8, PLASTIC, SO-8;
| 型号： | TL072ACPS |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL OP-AMP, 7500uV OFFSET-MAX, 3MHz BAND WIDTH, PDSO8, PLASTIC, SO-8 运算放大器 放大器电路 光电二极管 输入元件 |
| 文件： | 总40页 (文件大小：1065K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
D
D
D
D
D
Low Power Consumption
D
Low Noise
V = 18 nV/√Hz Typ at f = 1 kHz
n
Wide Common-Mode and Differential
Voltage Ranges
D
D
D
D
D
High Input Impedance . . . JFET Input Stage
Low Input Bias and Offset Currents
Output Short-Circuit Protection
Internal Frequency Compensation
Latch-Up-Free Operation
Low Total Harmonic Distortion
. . . 0.003% Typ
High Slew Rate . . . 13 V/μs Typ
Common-Mode Input Voltage Range
Includes V
CC+
description/ordering information
The JFET-input operational amplifiers in the TL07x series are similar to the TL08x series, with low input bias
and offset currents and fast slew rate. The low harmonic distortion and low noise make the TL07x series ideally
suited for high-fidelity and audio preamplifier applications. Each amplifier features JFET inputs (for high input
impedance) coupled with bipolar output stages integrated on a single monolithic chip.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from −40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of −55°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright © 2005, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
unless otherwise noted. On all other products, production
testing of all parameters.
processing does not necessarily include testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
description/ordering information (continued)
ORDERING INFORMATION
V
max
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
IO
†
T
A
PACKAGE
AT 25°C
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
Reel of 2000
Reel of 2000
Reel of 2000
Reel of 2000
Tube of 90
Reel of 2000
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
Reel of 2000
Reel of 2000
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
Reel of 2000
TL071CP
TL071CP
PDIP (P)
PDIP (N)
TL072CP
TL072CP
TL074CN
TL074CN
TL071CD
TL071C
TL072C
TL074C
TL071CDR
TL072CD
SOIC (D)
TL072CDR
TL074CD
10 mV
TL074CDR
TL074CNSR
TL071CPSR
TL072CPSR
TL072CPWR
TL074CPW
TL074CPWR
TL071ACP
TL072ACP
TL074ACN
TL071ACD
TL071ACDR
TL072ACD
TL072ACDR
TL074ACD
TL074ACDR
TL072ACPSR
TL074ACNSR
TL071BCP
TL072BCP
TL074BCN
TL071BCD
TL071BCDR
TL072BCD
TL072BCDR
TL074BCD
TL074BCDR
TL074BCNSR
SOP (NS)
SOP (PS)
TL074
TL071
T072
T072
TSSOP (PW)
T074
TL071ACP
TL072ACP
TL074ACN
PDIP (P)
PDIP (N)
0°C to 70°C
071AC
6 mV
SOIC (D)
072AC
TL074AC
SOP (PS)
SOP (NS)
T072A
TL074A
TL071BCP
TL072BCP
TL074BCN
PDIP (P)
PDIP (N)
071BC
072BC
3 mV
SOIC (D)
SOP (NS)
TL074BC
TL074B
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
description/ordering information (continued)
ORDERING INFORMATION
V
max
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
IO
†
T
A
PACKAGE
AT 25°C
Tube of 50
Tube of 50
Tube of 25
Tube of 75
Reel of 2500
Tube of 75
Reel of 2500
Tube of 50
Reel of 2500
Tube of 50
Tube of 150
Tube of 55
Tube of 25
Tube of 25
Tube of 55
TL071IP
TL072IP
TL071IP
PDIP (P)
PDIP (N)
TL072IP
TL074IN
TL074IN
TL071ID
TL071I
TL072I
TL074I
TL071IDR
TL072ID
−40°C to 85°C
6 mV
SOIC (D)
TL072IDR
TL074ID
TL074IDR
TL072MJGB
TL072MUB
TL072MFKB
TL074MJB
TL074MWB
TL074MFKB
CDIP (JG)
CFP (U)
TL072MJGB
TL072MUB
TL072MFKB
TL074MJB
6 mV
9 mV
LCCC (FK)
CDIP (J)
−55°C to 125°C
CFP (W)
TL074MWB
TL074MFKB
LCCC (FK)
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TL071, TL071A, TL071B
D, P, OR PS PACKAGE
(TOP VIEW)
TL072, TL072A, TL072B
D, JG, P, PS, OR PW PACKAGE
(TOP VIEW)
TL074A, TL074B
D, J, N, NS, OR PW PACKAGE
TL074 . . . D, J, N, NS, PW,
OR W PACKAGE
(TOP VIEW)
OFFSET N1
IN−
NC
VCC+
OUT
OFFSET N2
1OUT
1IN−
1IN+
VCC−
VCC+
2OUT
2IN−
2IN+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
IN+
VCC−
1OUT
1IN−
1IN+
VCC+
2IN+
2IN−
2OUT
1
2
3
4
5
6
7
14 4OUT
13
12
11
10
9
4IN−
4IN+
VCC−
3IN+
3IN−
3OUT
TL072
U PACKAGE
(TOP VIEW)
8
NC
1OUT
1IN−
1IN+
VCC−
NC
1
2
3
4
5
10
9
VCC+
2OUT
2IN−
2IN+
8
7
6
TL071
TL072
TL074
FK PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
3
2
1
20 19
18
NC
2OUT
NC
2IN−
NC
4IN+
NC
VCC−
NC
1IN+
NC
1IN−
NC
1IN+
NC
4
5
6
7
8
4
5
6
7
8
NC
VCC+
NC
17
16
15
14
17
16
15
14
3
2
1
20 19
18
NC
VCC+
NC
OUT
NC
NC
IN−
NC
IN+
NC
4
5
6
7
8
17
16
15
14
3IN+
2IN+
9 10 11 12 13
9 10 11 12 13
9 10 11 12 13
NC − No internal connection
symbols
TL071
TL072 (each amplifier)
TL074 (each amplifier)
OFFSET N1
IN+
+
−
IN+
IN−
+
−
OUT
OUT
IN−
OFFSET N2
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
schematic (each amplifier)
V
CC+
IN+
IN−
64 Ω
128 Ω
OUT
64 Ω
C1
18 pF
1080 Ω
1080 Ω
V
CC−
OFFSET
N1
OFFSET
N2
TL071 Only
All component values shown are nominal.
†
COMPONENT COUNT
COMPONENT
TYPE
TL071
TL072
TL074
Resistors
Transistors
JFET
11
14
2
22
28
4
44
56
6
Diodes
1
2
4
Capacitors
epi-FET
1
1
2
2
4
4
†
Includes bias and trim circuitry
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage (see Note 1): V
V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −18 V
CC+
CC−
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 V
ID
Input voltage, V (see Notes 1 and 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
I
Duration of output short circuit (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Package thermal impedance, θ (see Notes 5 and 6): D package (8 pin) . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
D package (14 pin) . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
PW package (8 pin) . . . . . . . . . . . . . . . . . . . 149°C/W
PW package (14 pin) . . . . . . . . . . . . . . . . . . 113°C/W
U package . . . . . . . . . . . . . . . . . . . . . . . . . . . 185°C/W
Package thermal impedance, θ (see Notes 7 and 8): FK package . . . . . . . . . . . . . . . . . . . . . . . . . 5.61°C/W
JC
J package . . . . . . . . . . . . . . . . . . . . . . . . . 15.05°C/W
JG package . . . . . . . . . . . . . . . . . . . . . . . . . 14.5°C/W
W package . . . . . . . . . . . . . . . . . . . . . . . . 14.65°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: J, JG, or W package . . . . . . . . . . . . 300°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+, with respect to IN−.
and V
.
CC+
CC−
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
5. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
6. The package thermal impedance is calculated in accordance with JESD 51-7.
7. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable case
J
JC
C
temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
C
JC
J
8. The package thermal impedance is calculated in accordance with MIL-STD-883.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, VCC = 15 V (unless otherwise noted)
TL071C
TL072C
TL074C
TL071AC
TL072AC
TL074AC
TL071BC
TL072BC
TL074BC
TL071I
TL072I
TL074I
†
‡
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX
25°C
3
10
13
3
6
2
3
5
3
6
8
V
Input offset voltage
V
V
= 0,
= 0,
R
R
= 50 Ω
mV
IO
O
S
S
Full range
7.5
Temperature
coefficient of input
offset voltage
α
V
= 50 Ω Full range
18
5
18
5
18
5
18
5
μV/°C
O
IO
25°C
Full range
25°C
100
10
100
2
100
2
100
2
pA
nA
pA
nA
Input offset current
I
I
V
V
= 0
= 0
IO
O
65
200
7
65
200
7
65
200
7
65
200
20
§
Input bias current
IB
O
Full range
−12
to
15
−12
to
15
−12
to
15
−12
to
15
Common-mode
input voltage range
V
V
A
25°C
11
11
11
11
V
V
ICR
R = 10 kΩ
25°C
Full range
25°C
12
12
10
13.5
12
12
10
13.5
12
12
10
13.5
12
12
10
13.5
L
Maximum peak
output voltage
swing
R ≥ 10 kΩ
L
OM
R ≥ 2 kΩ
L
Large-signal
differential voltage
amplification
25
15
200
3
50
25
200
3
50
25
200
3
50
25
200
3
V
O
=
10 V, R ≥ 2 kΩ
V/mV
VD
L
Full range
25°C
Unity-gain
bandwidth
B
1
MHz
Ω
12
12
12
12
Input resistance
25°C
10
10
10
10
r
i
V
V
= V min,
ICR
Common-mode
rejection ratio
Supply-voltage
rejection ratio
IC
O
CMRR
25°C
70
70
100
100
75
80
100
100
75
80
100
100
75
80
100
100
dB
= 0,
R = 50 Ω
S
V
V
=
= 0,
9 V to 15 V,
= 50 Ω
CC
k
25°C
dB
SVR
R
S
O
O
(ΔV
/ΔV )
CC
IO
Supply current
(each amplifier)
I
V
A
= 0,
No load
25°C
25°C
1.4
2.5
1.4
2.5
1.4
2.5
1.4
2.5
mA
dB
CC
Crosstalk
attenuation
V /V
O1 O2
= 100
VD
120
120
120
120
†
‡
§
All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified.
Full range is T = 0°C to 70°C for TL07_C,TL07_AC, TL07_BC and is T = −40°C to 85°C for TL07_I.
A
A
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in Figure 4. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
electrical characteristics, VCC = 15 V (unless otherwise noted)
TL071M
TL072M
TYP MAX
TL074M
TYP MAX
†
‡
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
MIN
25°C
3
6
9
3
9
V
Input offset voltage
V
V
= 0,
= 0,
R
R
= 50 Ω
mV
IO
O
S
S
Full range
15
Temperature coefficient of
input offset voltage
α
V
= 50 Ω Full range
18
5
18
5
μV/°C
O
IO
25°C
Full range
25°C
100
20
100
20
pA
nA
pA
nA
Input offset current
I
V
= 0
= 0
IO
IB
O
O
65
200
50
65
200
50
‡
Input bias current
I
V
−12
to
15
−12
to
15
Common-mode input
voltage range
V
25°C
25°C
11
11
V
ICR
R = 10 kΩ
12
12
10
35
15
13.5
12
12
10
35
15
13.5
L
Maximum peak output
voltage swing
R ≥ 10 kΩ
L
V
V
A
OM
Full range
R ≥ 2 kΩ
L
25°C
200
3
200
3
Large-signal differential
voltage amplification
V
O
=
10 V, R ≥ 2 kΩ
V/mV
VD
L
B
1
Unity-gain bandwidth
Input resistance
T = 25°C
A
MHz
12
12
T = 25°C
A
10
10
Ω
r
i
V
V
= V min,
ICR
Common-mode rejection
ratio
IC
O
CMRR
25°C
25°C
80
80
86
86
80
80
86
86
dB
dB
= 0,
R = 50 Ω
S
V
V
=
= 0,
9 V to 15 V,
= 50 Ω
Supply-voltage rejection
CC
k
SVR
R
S
ratio (ΔV
/ΔV )
IO
O
CC
Supply current (each
amplifier)
I
V
A
= 0,
= 100
No load
25°C
25°C
1.4
2.5
1.4
2.5
mA
dB
CC
O
V
/V
Crosstalk attenuation
120
120
O1 O2
VD
†
‡
Input bias currents of an FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive, as shown in
Figure 4. Pulse techniques must be used that will maintain the junction temperature as close to the ambient temperature as possible.
All characteristics are measured under open-loop conditions with zero common-mode voltage, unless otherwise specified. Full range is
T = −55°C to 125°C.
A
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
operating characteristics, VCC = 15 V, TA = 25°C
TL07xM
TYP
ALL OTHERS
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
MIN
TYP
MAX
V = 10 V,
C = 100 pF,
L
R = 2 kΩ,
See Figure 1
I
L
SR
Slew rate at unity gain
5
13
8
13
V/μs
μs
0.1
20%
18
0.1
20%
18
Rise-time overshoot
factor
V = 20 mV,
R = 2 kΩ,
I
L
t
r
C = 100 pF,
L
See Figure 1
f = 1 kHz
nV/√Hz
μV
Equivalent input noise
voltage
V
I
R
R
= 20 Ω
= 20 Ω,
n
S
S
f = 10 Hz to 10 kHz
4
4
Equivalent input noise
current
f = 1 kHz
0.01
0.01
pA/√Hz
n
V rms = 6 V,
A
R
= 1,
≤ 1 kΩ,
S
I
VD
0.003
%
R ≥ 2 kΩ,
THD Total harmonic distortion
0.003%
L
f = 1 kHz
PARAMETER MEASUREMENT INFORMATION
10 kΩ
−
+
V
O
1 kΩ
−
+
V
I
V
I
V
O
C = 100 pF
L
R = 2 kΩ
L
R
C = 100 pF
L
L
Figure 1. Unity-Gain Amplifier
Figure 2. Gain-of-10 Inverting Amplifier
TL071
−
+
IN−
OUT
N2
IN+
N1
100 kΩ
1.5 kΩ
V
CC−
Figure 3. Input Offset-Voltage Null Circuit
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
I
IB
Input bias current
vs Free-air temperature
4
vs Frequency
5, 6, 7
vs Free-air temperature
vs Load resistance
vs Supply voltage
8
9
10
V
OM
Maximum output voltage
vs Free-air temperature
vs Frequency
11
12
A
VD
Large-signal differential voltage amplification
Phase shift
vs Frequency
12
13
13
14
Normalized unity-gain bandwidth
Normalized phase shift
Common-mode rejection ratio
vs Free-air temperature
vs Free-air temperature
vs Free-air temperature
CMRR
vs Supply voltage
vs Free-air temperature
15
16
I
Supply current
CC
P
Total power dissipation
Normalized slew rate
vs Free-air temperature
vs Free-air temperature
vs Frequency
17
18
19
20
21
22
D
V
n
Equivalent input noise voltage
Total harmonic distortion
Large-signal pulse response
Output voltage
THD
vs Frequency
vs Time
V
O
vs Elapsed time
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS†
MAXIMUM PEAK OUTPUT VOLTAGE
INPUT BIAS CURRENT
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
100
10
15
12.5
10
V
=
15 V
10 V
5 V
R = 10 kΩ
CC
V
CC
=
15 V
L
T
= 25°C
A
See Figure 2
V
=
CC
7.5
5
1
0.1
V
=
CC
2.5
0
0.01
100
1 k
10 k
100 k
1 M
10 M
−75 −50 −25
0
25
50
75
100 125
f − Frequency − Hz
T
A
− Free-Air Temperature − °C
Figure 4
Figure 5
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
15
12.5
10
15
12.5
10
V
= 15 V
R = 2 kΩ
CC
L
R = 2 kΩ
See Figure 2
T
A
= 25°C
L
T
A
= 25°C
V
=
15 V
10 V
CC
See Figure 2
T
= −55°C
A
V
=
CC
7.5
5
7.5
5
T
A
= 125°C
V
CC
=
5 V
2.5
0
2.5
0
100
1 k
10 k
100 k
1 M
10 M
10 k
40 k 100 k
400 k 1 M
4 M 10 M
f − Frequency − Hz
f − Frequency − Hz
Figure 6
Figure 7
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS†
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
LOAD RESISTANCE
FREE-AIR TEMPERATURE
15
12.5
10
15
12.5
10
R = 10 kΩ
L
V
T
=
15 V
CC
= 25°C
A
See Figure 2
R = 2 kΩ
L
7.5
5
7.5
5
2.5
0
2.5
0
V
=
15 V
CC
See Figure 2
−75 −50 −25
0
25
50
75 100 125
0.1
0.2
0.4 0.7
1
2
4
7 10
T
A
− Free-Air Temperature − °C
R − Load Resistance − kΩ
L
Figure 8
Figure 9
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
15
12.5
10
1000
R = 10 kΩ
A
L
T
= 25°C
400
200
100
40
20
10
7.5
5
4
2
1
V
V
=
10 V
15 V
CC
2.5
0
=
O
R = 2 kΩ
L
0
2
4
6
8
10
12
14
16
−75 −50 −25
0
25
50
75 100 125
|V
CC
| − Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 10
Figure 11
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS†
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
6
5
10
V
CC
=
5 V to 15 V
R = 2 kΩ
L
10
T = 25°C
A
4
0°
10
10
10
10
Differential
Voltage
Amplification
3
2
1
45°
90°
Phase Shift
135°
1
180°
1
10
100
1 k
10 k 100 k 1 M 10 M
f − Frequency − Hz
Figure 12
NORMALIZED UNITY-GAIN BANDWIDTH
AND PHASE SHIFT
vs
FREE-AIR TEMPERATURE
1.3
1.2
1.1
1
1.03
1.02
Unity-Gain Bandwidth
1.01
1
Phase Shift
0.99
0.98
0.97
0.9
0.8
0.7
V
=
15 V
CC
R = 2 kΩ
f = B for Phase Shift
L
1
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
Figure 13
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS†
SUPPLY CURRENT PER AMPLIFIER
COMMON-MODE REJECTION RATIO
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
2
1.8
1.6
1.4
1.2
1
89
88
87
86
85
84
83
V
=
15 V
CC
T
= 25°C
A
R = 10 kΩ
No Signal
No Load
L
0.8
0.6
0.4
0.2
0
−75 −50 −25
0
25
50
75
100 125
0
2
4
6
8
10
12
14
16
|V
CC
| − Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 14
Figure 15
SUPPLY CURRENT PER AMPLIFIER
TOTAL POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
vs
FREE-AIR TEMPERATURE
2
1.8
1.6
1.4
1.2
1
250
225
200
175
150
125
100
75
V
= 15 V
CC
V
= 15 V
CC
No Signal
No Load
No Signal
No Load
TL074
0.8
0.6
0.4
0.2
0
TL072
TL071
25
50
25
0
−75 −50 −25
0
25
50
75
100 125
−75 −50 −25
0
50
75
100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 16
Figure 17
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS
NORMALIZED SLEW RATE
EQUIVALENT INPUT NOISE VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
1.15
1.10
1.05
1
50
40
30
20
10
0
V
= 15 V
CC
V
=
15 V
CC
A
= 10
= 20 Ω
= 25°C
VD
R = 2 kΩ
C = 100 pF
L
R
T
S
L
A
0.95
0.90
0.85
10
40 100
400 1 k
4 k 10 k 40 k 100 k
f − Frequency − Hz
−75 −50 −25
0
25
50
75
100 125
T
− Free-Air Temperature − °C
A
Figure 18
Figure 19
TOTAL HARMONIC DISTORTION
VOLTAGE-FOLLOWER
vs
LARGE-SIGNAL PULSE RESPONSE
FREQUENCY
1
6
V
CC
= 15 V
V
CC
=
15 V
A
= 1
R = 2 kΩ
VD
L
0.4
V
T
= 6 V
C = 100 pF
I(RMS)
L
4
2
T
A
= 25°C
= 25°C
A
Output
0.1
0.04
0
0.01
−2
−4
−6
Input
0.004
0.001
100
400
1 k
4 k 10 k
40 k 100 k
0
0.5
1
1.5
2
2.5
3
3.5
f − Frequency − Hz
t − Time − μs
Figure 20
Figure 21
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
TYPICAL CHARACTERISTICS
OUTPUT VOLTAGE
vs
ELAPSED TIME
28
24
Overshoot
20
90%
16
12
8
4
10%
V
CC
=
15 V
R = 2 kΩ
0
L
t
r
T
= 25°C
A
−4
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7
t − Elapsed Time − μs
Figure 22
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
APPLICATION INFORMATION
Table of Application Diagrams
PART
APPLICATION DIAGRAM
FIGURE
NUMBER
TL071
TL071
TL074
TL072
TL071
0.5-Hz square-wave oscillator
High-Q notch filter
23
24
25
26
27
Audio-distribution amplifier
100-kHz quadrature oscillator
AC amplifier
R = 100 kΩ
F
V
CC+
−
15 V
−
3.3 kΩ
TL071
R1
C3
R2
Output
+
Input
Output
TL071
+
V
CC−
C = 3.3 μF
F
1 kΩ
−15 V
R1 + R2 + 2R3 + 1.5 MW
R3
C2
C3
C1
3.3 kΩ
C1 + C2 +
+ 110 pF
2
9.1 kΩ
1
1
f +
fO
+
+
1 kHz
2p R
C
2p R1 C1
F
F
Figure 23. 0.5-Hz Square-Wave Oscillator
Figure 24. High-Q Notch Filter
V
CC+
−
1 MΩ
TL074
+
Output A
Output B
V
CC+
−
V
CC−
V
CC+
1 μF
TL074
+
−
Input
TL074
+
V
CC−
100 kΩ
100 μF
100 kΩ
V
100 kΩ
CC−
CC+
V
CC+
V
100 kΩ
−
TL074
+
Output C
V
CC−
Figure 25. Audio-Distribution Amplifier
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL071, TL071A, TL071B, TL072
TL072A, TL072B, TL074, TL074A, TL074B
LOW-NOISE JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS080J − SEPTEMBER 1978 − REVISED MARCH 2005
APPLICATION INFORMATION
1N4148
18 kΩ (see Note A)
6 sin ωt
−15 V
18 pF
1 kΩ
18 pF
V
CC+
−
V
CC+
88.4 kΩ
TL072
+
−
6 cos ωt
TL072
+
88.4 kΩ
V
CC−
1 kΩ
18 pF
V
CC−
15 V
18 kΩ (see Note A)
1N4148
88.4 kΩ
NOTE A: These resistor values may be adjusted for a symmetrical output.
Figure 26. 100-kHz Quadrature Oscillator
V
CC+
0.1 μF
10 kΩ
10 kΩ
1 MΩ
−
IN−
IN+
TL071
OUT
50 Ω
+
N2
N1
10 kΩ
0.1 μF
100 kΩ
Figure 27. AC Amplifier
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
8102304HA
81023052A
OBSOLETE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
OBSOLETE
ACTIVE
10
20
10
8
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
TBD
Call TI
Call TI
LCCC
CFP
FK
U
1
1
1
1
1
1
1
POST-PLATE N / A for Pkg Type
8102305HA
A42
A42
N / A for Pkg Type
N / A for Pkg Type
8102305PA
CDIP
LCCC
CDIP
CFP
JG
FK
J
81023062A
20
14
14
8
POST-PLATE N / A for Pkg Type
8102306CA
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Call TI
8102306DA
W
JG
J
JM38510/11905BPA
JM38510/11906BCA
TL071ACD
CDIP
CDIP
SOIC
A42
14
8
Call TI
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071ACDE4
TL071ACDG4
TL071ACDR
TL071ACDRE4
TL071ACDRG4
TL071ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
P
P
D
D
D
D
D
D
P
P
D
D
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071ACPE4
TL071BCD
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071BCDE4
TL071BCDG4
TL071BCDR
TL071BCDRE4
TL071BCDRG4
TL071BCP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071BCPE4
TL071CD
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071CDE4
TL071CDG4
TL071CDR
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TL071CDRE4
TL071CDRG4
TL071CP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
PDIP
PDIP
SO
D
D
8
8
8
8
8
8
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071CPE4
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071CPSR
TL071CPSRE4
TL071CPSRG4
PS
PS
PS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071CPWLE
TL071ID
OBSOLETE TSSOP
PW
D
8
8
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071IDE4
TL071IDG4
TL071IDR
D
D
D
D
D
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071IDRE4
TL071IDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL071IJG
TL071IP
OBSOLETE
ACTIVE
CDIP
PDIP
JG
P
8
8
TBD
Call TI
Call TI
50
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071IPE4
ACTIVE
PDIP
P
8
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL071MFKB
TL071MJG
TL071MJGB
TL072ACD
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
FK
JG
JG
D
20
8
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072ACDE4
TL072ACDG4
TL072ACDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072ACDRE4
TL072ACDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072ACJG
TL072ACP
OBSOLETE
ACTIVE
CDIP
PDIP
JG
P
8
8
TBD
Call TI
Call TI
50
Pb-Free
CU NIPDAU N / A for Pkg Type
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
(RoHS)
TL072ACPE4
TL072ACPSR
TL072ACPSRE4
TL072ACPSRG4
TL072BCD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SO
P
PS
PS
PS
D
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072BCDE4
TL072BCDG4
TL072BCDR
TL072BCDRE4
TL072BCDRG4
TL072BCP
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL072BCPE4
TL072CD
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072CDE4
TL072CDG4
TL072CDR
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072CDRE4
TL072CDRG4
TL072CP
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL072CPE4
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL072CPSLE
TL072CPSR
OBSOLETE
ACTIVE
SO
SO
PS
PS
8
8
TBD
Call TI
Call TI
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072CPSRE4
TL072CPSRG4
TL072CPWR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
PS
PS
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072CPWRE4
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
no Sb/Br)
TL072CPWRG4
TL072ID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
PW
D
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072IDE4
TL072IDG4
TL072IDR
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL072IDRE4
TL072IDRG4
TL072IP
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
CU NIPDAU N / A for Pkg Type
POST-PLATE N / A for Pkg Type
TL072IPE4
P
50
Pb-Free
(RoHS)
TL072MFKB
TL072MJG
TL072MJGB
TL072MUB
TL074ACD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
CDIP
CDIP
CFP
FK
JG
JG
U
20
8
1
1
1
1
TBD
TBD
TBD
TBD
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
8
10
14
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074ACDE4
TL074ACDG4
TL074ACDR
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074ACDRE4
TL074ACDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074ACJ
TL074ACN
OBSOLETE
ACTIVE
CDIP
PDIP
J
14
14
TBD
Call TI
Call TI
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL074ACNE4
TL074ACNSR
TL074ACNSRE4
TL074ACNSRG4
TL074BCD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SO
N
NS
NS
NS
D
14
14
14
14
14
14
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074BCDE4
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 4
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Orderable Device
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TL074BCDG4
TL074BCDR
TL074BCDRE4
TL074BCDRG4
TL074BCN
SOIC
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SO
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL074BCNE4
TL074CD
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074CDE4
TL074CDG4
TL074CDR
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074CDRE4
TL074CDRG4
TL074CN
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL074CNE4
TL074CNSR
TL074CNSRE4
TL074CNSRG4
TL074CPW
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
NS
NS
NS
PW
PW
PW
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074CPWE4
TL074CPWG4
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
90 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074CPWLE
TL074CPWR
OBSOLETE TSSOP
PW
PW
14
14
TBD
Call TI
Call TI
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
TSSOP
SOIC
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074CPWRE4
TL074CPWRG4
TL074ID
PW
PW
D
14
14
14
14
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074IDE4
SOIC
D
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
Addendum-Page 5
PACKAGE OPTION ADDENDUM
www.ti.com
11-Nov-2009
Orderable Device
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
TL074IDG4
TL074IDR
SOIC
D
14
14
14
14
50 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
D
D
D
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074IDRE4
TL074IDRG4
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL074IJ
TL074IN
OBSOLETE
ACTIVE
CDIP
PDIP
J
14
14
TBD
Call TI
Call TI
N
25
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL074INE4
ACTIVE
PDIP
N
14
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL074MFK
TL074MFKB
TL074MJ
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
LCCC
LCCC
CDIP
CDIP
CFP
FK
FK
J
20
20
14
14
14
1
1
1
1
1
TBD
TBD
TBD
TBD
TBD
POST-PLATE N / A for Pkg Type
POST-PLATE N / A for Pkg Type
A42
A42
A42
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
TL074MJB
TL074MWB
J
W
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 6
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Aug-2009
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL071ACDR
TL071BCDR
TL071CDR
TL071CDR
TL071CPSR
TL071IDR
SOIC
SOIC
SOIC
SOIC
SO
D
D
8
8
2500
2500
2500
2500
2000
2500
2500
2000
2500
2500
2500
2000
2000
2500
2500
2500
2000
2500
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
16.4
12.4
12.4
16.4
12.4
12.4
12.4
16.4
12.4
12.4
12.4
16.4
16.4
16.4
6.4
6.4
6.4
6.4
8.2
6.4
6.4
8.2
6.4
6.4
6.4
8.2
7.0
6.4
6.4
6.5
8.2
6.5
5.2
5.2
5.2
5.2
6.6
5.2
5.2
6.6
5.2
5.2
5.2
6.6
3.6
5.2
5.2
9.0
10.5
9.0
2.1
2.1
2.1
2.1
2.5
2.1
2.1
2.5
2.1
2.1
2.1
2.5
1.6
2.1
2.1
2.1
2.5
2.1
8.0
8.0
8.0
8.0
12.0
8.0
8.0
12.0
8.0
8.0
8.0
12.0
8.0
8.0
8.0
8.0
12.0
8.0
12.0
12.0
12.0
12.0
16.0
12.0
12.0
16.0
12.0
12.0
12.0
16.0
12.0
12.0
12.0
16.0
16.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
D
8
D
8
PS
D
8
SOIC
SOIC
SO
8
TL072ACDR
TL072ACPSR
TL072BCDR
TL072CDR
TL072CDR
TL072CPSR
TL072CPWR
TL072IDR
D
8
PS
D
8
SOIC
SOIC
SOIC
SO
8
D
8
D
8
PS
PW
D
8
TSSOP
SOIC
SOIC
SOIC
SO
8
8
TL072IDR
D
8
TL074ACDR
TL074ACNSR
TL074BCDR
D
14
14
14
NS
D
SOIC
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Aug-2009
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL074CDR
TL074CNSR
TL074CPWR
TL074IDR
SOIC
SO
D
NS
PW
D
14
14
14
14
2500
2000
2000
2500
330.0
330.0
330.0
330.0
16.4
16.4
12.4
16.4
6.5
8.2
7.0
6.5
9.0
10.5
5.6
2.1
2.5
1.6
2.1
8.0
12.0
8.0
16.0
16.0
12.0
16.0
Q1
Q1
Q1
Q1
TSSOP
SOIC
9.0
8.0
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TL071ACDR
TL071BCDR
TL071CDR
TL071CDR
TL071CPSR
TL071IDR
SOIC
SOIC
SOIC
SOIC
SO
D
D
8
8
8
8
8
8
8
8
8
8
8
8
8
2500
2500
2500
2500
2000
2500
2500
2000
2500
2500
2500
2000
2000
340.5
340.5
346.0
340.5
346.0
340.5
340.5
346.0
340.5
346.0
340.5
346.0
346.0
338.1
338.1
346.0
338.1
346.0
338.1
338.1
346.0
338.1
346.0
338.1
346.0
346.0
20.6
20.6
29.0
20.6
33.0
20.6
20.6
33.0
20.6
29.0
20.6
33.0
29.0
D
D
PS
D
SOIC
SOIC
SO
TL072ACDR
TL072ACPSR
TL072BCDR
TL072CDR
TL072CDR
TL072CPSR
TL072CPWR
D
PS
D
SOIC
SOIC
SOIC
SO
D
D
PS
PW
TSSOP
Pack Materials-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
7-Aug-2009
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TL072IDR
TL072IDR
SOIC
SOIC
SOIC
SO
D
D
8
2500
2500
2500
2000
2500
2500
2000
2000
2500
340.5
346.0
333.2
346.0
333.2
333.2
346.0
346.0
333.2
338.1
346.0
345.9
346.0
345.9
345.9
346.0
346.0
345.9
20.6
29.0
28.6
33.0
28.6
28.6
33.0
29.0
28.6
8
TL074ACDR
TL074ACNSR
TL074BCDR
TL074CDR
TL074CNSR
TL074CPWR
TL074IDR
D
14
14
14
14
14
14
14
NS
D
SOIC
SOIC
SO
D
NS
PW
D
TSSOP
SOIC
Pack Materials-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
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