TL081-N [TI]

TL081 Wide Bandwidth JFET Input Operational Amplifier; TL081宽带宽JFET输入运算放大器
TL081-N
型号: TL081-N
厂家: TEXAS INSTRUMENTS    TEXAS INSTRUMENTS
描述:

TL081 Wide Bandwidth JFET Input Operational Amplifier
TL081宽带宽JFET输入运算放大器

运算放大器
文件: 总10页 (文件大小:484K)
中文:  中文翻译
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TL081  
TL081 Wide Bandwidth JFET Input Operational Amplifier  
Literature Number: SNOSBW6A  
December 1995  
TL081 Wide Bandwidth JFET  
Input Operational Amplifier  
are critical, the LF356 is recommended. If maximum supply  
current is important, however, the TL081C is the better  
choice.  
General Description  
The TL081 is a low cost high speed JFET input operational  
amplifier with an internally trimmed input offset voltage  
(BI-FET IITM technology). The device requires a low supply  
current and yet maintains a large gain bandwidth product  
and a fast slew rate. In addition, well matched high voltage  
JFET input devices provide very low input bias and offset  
currents. The TL081 is pin compatible with the standard  
LM741 and uses the same offset voltage adjustment circuit-  
ry. This feature allows designers to immediately upgrade the  
overall performance of existing LM741 designs.  
Features  
Y
Internally trimmed offset voltage  
Low input bias current  
Low input noise voltage  
Low input noise current  
Wide gain bandwidth  
High slew rate  
15 mV  
50 pA  
Y
Y
Y
Y
Y
Y
Y
Y
25 nV/ Hz  
0
MHz  
pA/ Hz  
0
13 Vs  
The TL081 may be used in applications such as high speed  
integrators, fast D/A converters, sample-and-hold circuits  
and many other circuits requiring low input offset voltage,  
low input bias current, high input impedance, high slew rate  
and wide bandwidth. The devices has low noise and offset  
voltage drift, but for applications where these requirements  
Low supply current  
1.8 A  
High input impedance  
10 X  
e
Low total harmonic distortioA  
e
10,  
.02%  
e
R
BW  
10k, V  
20 Hz 20 kH
20 Vp-p,  
L
O
b
e
Y
Y
Low 1/f noise cor
50 Hz  
Fast ettling time
2 ms  
Typical Connection  
Simplifd Scmatic  
358–1  
Connecti
TL/H/8358–2  
Dual-In-Line Package  
TL/H/8358–4  
Order Number TL081CP  
See NS Package Number N08E  
BI-FET IITM is a trademark of National Semiconductor Corp.  
C
1995 National Semiconductor Corporation  
TL/H/8358  
RRD-B30M125/Printed in U. S. A.  
Absolute Maximum Ratings  
If Military/Aerospace specified devices are required,  
please contact the National Semiconductor Sales  
Office/Distributors for availability and specifications.  
g
Input Voltage Range (Note 2)  
Output Short Circuit Duration  
Storage Temperature Range  
Lead Temp. (Soldering, 10 seconds)  
15V  
Continuous  
b
a
65 C to 150 C  
§
§
g
Supply Voltage  
18V  
260 C  
§
120 C/W  
Power Dissipation (Notes 1 and 6)  
Operating Temperature Range  
670 mW  
i
§
jA  
a
0 C to 70 C  
§
§
ESD rating to be determined.  
T
115 C  
§
30V  
j(MAX)  
g
Differential Input Voltage  
DC Electrical Characteristics (Note 3)  
TL081C  
Symbol  
Parameter  
Conditions  
Units  
Min  
Typ  
Max  
e
Over Temperature  
e
25 C  
V
OS  
Input Offset Voltage  
R
10 kX, T  
A
5
15  
20  
mV  
mV  
§
S
e
10 kX  
DV /DT  
OS  
Average TC of Input Offset  
Voltage  
R
S
10  
2
V/ C  
§
e
j
I
Input Offset Current  
T
25 C, (Notes 3, 4)  
§
10
4
pA  
OS  
s
T
j
70 C  
§
e
s
I
Input Bias Current  
T
T
25 C, (Notes 3, 4)  
§
70 C  
§
50  
00  
pA  
nA  
B
j
j
e
R
IN  
Input Resistance  
T
j
25 C  
§
X
e
e
e
e
g
g
A
Large Signal Voltage Gain  
V
V
15V, T  
25 C  
§
25  
5  
100  
V/mV  
VOL  
S
A
10V, R  
2 kX  
O
L
Over Temperature  
V/mV  
V
e
e
s
e
1
g
g
g
g
13.5  
V
V
Output Voltage Swing  
V
15V, R  
1
11  
O
S
S
L
a
b
Input Common-Mode Voltage  
Range  
15  
12  
V
V
CM  
V
15V  
CMRR  
PSRR  
Common-Mode Rejection Ratio  
Supply Voltage Rejection Ratio  
Supply Current  
R
10 kX  
0  
70  
100  
100  
1.8  
dB  
dB  
S
(Not5)  
I
2.8  
mA  
S
AC Electrical Charactestic
TL081C  
Typ  
13  
Symbol  
Parameter  
onditions  
Units  
Min  
Max  
e
e
e
e
g
g
SR  
Slew R
V
T
15V, T  
15V, T  
25 C  
§
V/ms  
S
A
e
GBW  
Gain
25 C  
§
4
MHz  
S
A
e
100X,  
e
n
Equiv
25 C, R  
§
A
S
25  
nV/ Hz  
0
e
f
1000 Hz  
e
e
1000 Hz  
i
n
Equivalent rent  
T
j
25 C, f  
0.01  
pA/ Hz  
0
§
Note 1: For operating at elevated temperature, the device must be derated based on a thermal resistance of 120 C/W junction to ambient for N package.  
§
Note 2: Unless otherwise specified the absolute maximum negative input voltage is equal to the negative power supply voltage.  
s
s
a
e
e
0.  
CM  
g
Note 3: These specifications apply for V  
15V and 0 C  
§
T
70 C. V , I and I  
§
are measured at V  
S
A
OS  
B
OS  
Note 4: The input bias currents are junction leakage currents which approximately double for every 10 C increase in the junction temperature, T . Due to the limited  
§
production test time, the input bias currents measured are correlated to junction temperature. In normal operation the junction temperature rises above the ambient  
j
e
recommended if input bias current is to be kept to a minimum.  
a
i
temperature as a result of internal power dissipation, P . T  
D
T
A
P where i is the thermal resistance from junction to ambient. Use of a heat sink is  
D jA  
j
jA  
Note 5: Supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously in accordance with common practice from  
e
g
g
5V to 15V.  
V
S
Note 6: Max. Power Dissipation is defined by the package characteristics. Operating the part near the Max. Power Dissipation may cause the part to operate  
outside guaranteed limits.  
2
Typical Performance Characteristics  
Input Bias Current  
Input Bias Current  
Supply Current  
Positive Common-Mode Input  
Voltage Limit  
Negative Common-Mode Input  
Voltage Limit  
Positivimit  
Output Voltage Swing  
Slew Rate  
Voltage
Negative Current Limit  
G
Bode Plot  
TL/H/8358–5  
3
Typical Performance Characteristics (Continued)  
Undistorted Output Voltage  
Swing  
Open Loop Frequency  
Response  
Distortion vs Frequency  
TL/H/8358–6  
4
Pulse Response  
Small Signal Inverting  
Small Signal Non-Inverting  
TL/H/8358–7  
TL/H/835813  
Large Signal Inverting  
Large Signal Non-Invertin
TL/H/835814  
TL/H/835815  
Current Limit (R  
L
TL/H/835816  
Applicati
The TL081 is an n internally trimmed input  
offset voltage and JFut devices (BI-FET II). These  
JFETs have large reverse breakdown voltages from gate to  
source and drain eliminating the need for clamps across the  
inputs. Therefore, large differential input voltages can easily  
be accommodated without a large increase in input current.  
The maximum differential input voltage is independent of  
the supply voltages. However, neither of the input voltages  
should be allowed to exceed the negative supply as this  
will cause large currents to flow which can result in a de-  
stroyed unit.  
Exceeding the negative common-mode limit on either input  
will force the output to a high state, potentially causing a  
reversal of phase to the output.  
Exceeding the negative common-mode limit on both inputs  
will force the amplifier output to a high state. In neither case  
does a latch occur since raising the input back within the  
5
Application Hints (Continued)  
common-mode range again puts the input stage and thus  
the amplifier in a normal operating mode.  
resulting forward diode within the IC could cause fusing of  
the internal conductors and result in a destroyed unit.  
Exceeding the positive common-mode limit on a single input  
will not change the phase of the output; however, if both  
inputs exceed the limit, the output of the amplifier will be  
forced to a high state.  
Because these amplifiers are JFET rather than MOSFET  
input op amps they do not require special handling.  
As with most amplifiers, care should be taken with lead  
dress, component placement and supply decoupling in or-  
der to ensure stability. For example, resistors from the out-  
put to an input should be placed with the body close to the  
input to minimize ‘‘pick-up’’ and maximize the frequency of  
the feedback pole by minimizing the capacitance from the  
input to ground.  
The amplifier will operate with a common-mode input volt-  
age equal to the positive supply; however, the gain band-  
width and slew rate may be decreased in this condition.  
When the negative common-mode voltage swings to within  
3V of the negative supply, an increase in input offset voltage  
may occur.  
A feedback pole is created when the feedback around any  
amplifier is resistive. The parallel resistance and capaci-  
tance from the input of the device (usually the inverting in-  
put) to AC ground set the frequency of the pole. In many  
instances the frequency of this pole is much greater than  
the expected 3 dB frequency of the closed loop in and  
consequently there is negligible effect on sn.  
However, if the feedback pole is less than ly 6  
times the expected 3 dB frequency a lead should  
be placed from the output to thnpof thamp. The  
value of the added capacitor shobe such at the R
time constant of this capacitor and the sistance ilels  
is greater than or equal to the original dback pole time  
constant.  
The TL081 is biased by a zener reference which allows nor-  
g
mal circuit operation on 4V power supplies. Supply volt-  
ages less than these may result in lower gain bandwidth and  
slew rate.  
g
The TL081 will drive a 2 kX load resistance to 10V over  
a
the full temperature range of 0 C to 70 C. If the amplifier  
§
§
is forced to drive heavier load currents, however, an in-  
crease in input offset voltage may occur on the negative  
voltage swing and finally reach an active current limit on  
both positive and negative swings.  
Precautions should be taken to ensure that the power sup-  
ply for the integrated circuit never becomes reversed in po-  
larity or that the unit is not inadvertently installed backwards  
in  
a socket as an unlimited current surge through the  
Detailed Schematic  
TL/H/8358–8  
6
Typical Applications  
Supply Current Indicator/Limiter  
Hi-Z Inverting Amplifier  
IN  
TL/H/8358–9  
l
V
D
TL/H/835810  
(3 ps any additional  
V
switches high when R  
I
S S  
#
OUT  
j
layout capacitance) interacts with feets and eates un-  
Parasitic input capacitance C1  
desirable high frequenpole. To co, add C2 ch that:  
j
R2C2  
R1C1.  
Ultra-Low (or High) Duty Cycle Pulse  
Generator  
Ltegrator  
TL/H/
t
#
#
OUTP
OUTPU
TL/H/835812  
* Low leakage capacitor  
t
50k pot used for less sensitive V  
adjust  
OS  
#
where V  
S
*low leakage c
7
Physical Dimensions inches (millimeters)  
Molded Dual-In-Line Package )  
Order Number TL081CP  
NS Package Number N08E  
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