TL081MU [TI]
JFET-INPUT OPERATIONAL AMPLIFIERS; JFET输入运算放大器
| 型号： | TL081MU |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | JFET-INPUT OPERATIONAL AMPLIFIERS |
| 文件： | 总29页 (文件大小：463K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
Low Power Consumption
High Input Impedance . . . JFET-Input Stage
Latch-Up-Free Operation
Wide Common-Mode and Differential
Voltage Ranges
High Slew Rate . . . 13 V/µs Typ
Common-Mode Input Voltage Range
Low Input Bias and Offset Currents
Output Short-Circuit Protection
Includes V
CC+
Low Total Harmonic
Distortion . . . 0.003% Typ
description
The TL08x JFET-input operational amplifier family is designed to offer a wider selection than any previously
developed operational amplifier family. Each of these JFET-input operational amplifiers incorporates
well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit. The devices feature
high slew rates, low input bias and offset currents, and low offset voltage temperature coefficient. Offset
adjustment and external compensation options are available within the TL08x family.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from –40°C to 85°C. The Q-suffix devices are characterized for operation from –40°C to 125°C.
The M-suffix devices are characterized for operation over the full military temperature range of –55°C to 125°C.
symbols
TL081
TL082 (EACH AMPLIFIER)
TL084 (EACH AMPLIFIER)
OFFSET N1
+
–
IN+
IN–
+
IN+
IN–
OUT
OUT
–
OFFSET N2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
On products compliant to MIL-PRF-38535, all parameters are tested
unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
TL081M
TL082M
U PACKAGE
U PACKAGE
(TOP VIEW)
(TOP VIEW)
NC
OFFSET N1
IN–
NC
NC
NC
1OUT
1IN–
NC
1
2
3
4
5
10
9
1
2
3
4
5
10
9
V
CC+
8
V
8
2OUT
2IN–
2IN+
CC+
IN+
7
OUT
1IN+
7
V
6
6
OFFSET N2
V
CC–
CC–
TL081, TL081A, TL081B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
TL082, TL082A, TL082B
D, JG, P, OR PW PACKAGE
(TOP VIEW)
OFFSET N1
IN–
NC
V
OUT
1OUT
1IN–
1IN+
V
CC+
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
2OUT
2IN–
2IN+
CC+
IN+
V
OFFSET N2
V
CC–
CC–
TL081M . . . FK PACKAGE
(TOP VIEW)
TL082M . . . FK PACKAGE
(TOP VIEW)
3
2
1
20 19
18
NC
NC
1IN–
NC
4
5
6
7
8
3
2
1
20 19
18
2OUT
NC
17
16
15
14
NC
V
NC
IN–
NC
4
5
6
7
8
17
16
15
14
CC+
2IN–
NC
1IN+
NC
NC
OUT
NC
IN+
NC
9 10 11 12 13
9 10 11 12 13
TL084M . . . FK PACKAGE
(TOP VIEW)
TL084, TL084A, TL084B
D, J, N, PW, OR W PACKAGE
(TOP VIEW)
3
2
1
20 19
18
4IN+
NC
1IN+
NC
4
5
6
7
8
1OUT
1IN–
1IN+
4OUT
4IN–
4IN+
1
2
3
4
5
6
7
14
13
12
11
10
9
17
16
15
14
V
–
V
CC
CC+
NC
NC
V
V
CC+
CC–
3IN+
2IN+
2IN+
2IN–
2OUT
3IN+
3IN–
3OUT
9 10 11 12 13
8
NC – No internal connection
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP
FORM
(Y)
V
max
SMALL
OUTLINE
(D008)
SMALL
OUTLINE
(D014)
CHIP
CARRIER
(FK)
CERAMIC CERAMIC
PLASTIC
DIP
PLASTIC
DIP
FLAT
PACK
(U)
FLAT
PACK
(W)
IO
T
A
TSSOP
(PW)
AT 25°C
DIP
(J)
DIP
(JG)
(N)
(P)
15 mV
6 mV
3 mV
TL081CD
TL081ACD
TL081BCD
TL081CP
TL081ACP
TL081BCP
TL081CPW
TL082CPW
TL084CPW
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
0°C
to
70°C
15 mV
6 mV
3 mV
TL082CD
TL082ACD
TL082BCD
TL082CP
TL082ACP
TL082BCP
TL082Y
15 mV
6 mV
3 mV
TL084CD
TL084ACD
TL084BCD
TL084CN
TL084ACN
TL084BCN
TL084Y
—
—
–40°C
to
85°C
6 mV
6 mV
6 mV
TL081ID
TL082ID
TL084ID
TL081IP
TL082IP
—
—
—
—
—
—
TL084ID
TL084IN
—
–40°C
to
125°C
—
—
—
—
9 mV
TL084QD
—
–55°C
to
125°C
6 mV
6 mV
9 mV
TL081MFK
TL082MFK
TL084MFK
TL081MJG
TL082MJG
TL081MU
TL082MU
—
TL084MW
TL084MJ
The D package is available taped and reeled. Add R suffix to the device type (e.g., TL081CDR).
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
schematic (each amplifier)
V
CC+
IN+
IN–
64 Ω
OUT
128 Ω
64 Ω
C1
1080 Ω
1080 Ω
V
CC–
OFFSET N1
OFFSET N2
TL081 Only
Component values shown are nominal.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
TL082Y chip information
These chips, when properly assembled, display characteristics similar to the TL082. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
(7)
(6)
(5)
CC+
(8)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
–
(4)
61
(8)
(4)
V
CC–
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
(1)
(2)
(3)
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
61
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
TL084Y chip information
These chips, when properly assembled, display characteristics similar to the TL084. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
CC+
(4)
(3)
(2)
1IN+
1IN–
+
–
(1)
1OUT
(13)
(12)
(11)
(10)
(9)
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
3IN+
–
(10)
(9)
+
–
(8)
3OUT
(14)
(1)
(8)
(7)
3IN–
62
(12)
(13)
+
4IN+
4IN–
(14)
4OUT
–
(11)
V
CC–
(2)
(3)
(4)
(6)
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
105
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
TL08_C
TL08_AC
TL08_BC
TL08_I
TL084Q
TL08_M
UNIT
Supply voltage, V
(see Note 1)
18
–18
18
–18
18
–18
18
–18
V
V
V
V
CC+
– (see Note 1)
Supply voltage V
CC
Differential input voltage, V (see Note 2)
± 30
± 30
± 30
± 30
ID
Input voltage, V (see Notes 1 and 3)
I
±15
±15
±15
±15
Duration of output short circuit (see Note 4)
Continuous total power dissipation
unlimited
unlimited
unlimited
unlimited
See Dissipation Rating Table
Operating free-air temperature range, T
0 to 70
– 40 to 85 – 40 to 125 – 55 to 125
°C
°C
°C
A
Storage temperature range, T
stg
– 65 to 150 – 65 to 150 – 65 to 150 – 65 to 150
260
Case temperature for 60 seconds, T
FK package
C
Lead temperature 1,6 mm (1/16 inch) from case for 60
seconds
J or JG package
300
°C
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 D, N, P, or
seconds PW package
260
260
260
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
2. Differential voltages are at IN+ with respect to IN–.
and V
.
CC–
CC+
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING
FACTOR
DERATE
ABOVE T
T
= 70°C
T
= 85°C
T = 125°C
A
A
A
A
PACKAGE
POWER RATING
680 mW
680 mW
680 mW
680 mW
680 mW
680 mW
680 mW
525 mW
700 mW
675 mW
680 mW
POWER RATING POWER RATING POWER RATING
A
D (8 pin)
5.8 mW/°C
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
8.4 mW/°C
9.2 mW/°C
8.0 mW/°C
4.2 mW/°C
5.6 mW/°C
5.4 mW/°C
8.0 mW/°C
32°C
60°C
88°C
88°C
69°C
76°C
65°C
25°C
25°C
25°C
65°C
460 mW
604 mW
680 mW
680 mW
672 mW
680 mW
640 mW
336 mW
448 mW
432 mW
640 mW
373 mW
490 mW
680 mW
680 mW
546 mW
597 mW
520 mW
N/A
N/A
186 mW
273 mW
273 mW
210 mW
N/A
D (14 pin)
FK
J
JG
N
P
PW (8 pin)
PW (14 pin)
U
N/A
N/A
N/A
N/A
351 mW
520 mW
135 mW
200 mW
W
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
electrical characteristics, V
= ±15 V (unless otherwise noted)
CC±
TL081C
TL082C
TL084C
TL081AC
TL082AC
TL084AC
TLO81BC
TL082BC
TL084BC
TL081I
TL082I
TL084I
†
TEST CONDITIONS
PARAMETER
UNIT
T
A
MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX MIN
TYP MAX
25°C
3
15
20
3
6
2
3
5
3
6
9
V
α
I
Input offset voltage
V
V
= 0
= 0
R
R
= 50 Ω
mV
IO
O
S
S
Full range
7.5
Temperature
coefficient of input
offset voltage
= 50 Ω Full range
18
5
18
5
18
5
18
5
µV/°C
VIO
O
25°C
Full range
25°C
200
2
100
2
100
2
100
10
pA
nA
pA
nA
‡
V
V
= 0
= 0
Input offset current
IO
O
30
400
10
30
200
7
30
200
7
30
200
20
‡
I
IB
Input bias current
O
Full range
–12
to
15
–12
to
15
–12
to
15
–12
to
15
Common-mode input
voltage range
V
V
A
25°C
±11
±11
±11
±11
V
V
ICR
R
R
R
= 10 kΩ
≥ 10 kΩ
≥ 2 kΩ
25°C
±12 ±13.5
±12
±12 ±13.5
±12
±12 ±13.5
±12
±12 ±13.5
±12
L
L
L
Maximum peak
output voltage swing
OM
Full range
±10
±12
±10
±12
±10
±12
±10
±12
Large-signal
differential voltage
amplification
V
= ±10 V,
= ±10 V,
R
R
≥ 2 kΩ
25°C
25
200
50
200
50
200
50
200
O
O
L
L
V/mV
VD
V
≥ 2 kΩ Full range
15
25
25
25
B
Unity-gain bandwidth
Input resistance
25°C
25°C
3
3
3
3
MHz
1
12
12
12
12
10
10
10
10
Ω
r
i
Common-mode
rejection ratio
V
V
= V
= 0,
min,
ICR
IC
O
CMRR
25°C
70
70
86
75
80
86
75
80
86
75
80
86
dB
dB
R
= 50 Ω
S
Supply voltage
rejection ratio
V
V
= ±15 V to ± 9 V,
= 0,
CC
O
k
25°C
86
86
86
86
SVR
R = 50 Ω
S
(∆V
/∆V )
CC±
IO
Supply current
(per amplifier)
I
V
= 0,
= 100
No load
25°C
25°C
1.4
2.8
1.4
2.8
1.4
2.8
1.4
2.8
mA
dB
CC
O
V
/V
Crosstalk attenuation
A
VD
120
120
120
120
O1 O2
†
All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified. Full range for T is 0°C to 70°C for TL08_C, TL08_AC,
TL08_BC and –40°C to 85°C for TL08_I.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in Figure 17. Pulse techniques must be used
that maintain the junction temperature as close to the ambient temperature as possible.
A
‡
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
electrical characteristics, V
= ±15 V (unless otherwise noted)
CC ±
TL081M, TL082M
TL084Q, TL084M
†
PARAMETER
UNIT
TEST CONDITIONS
T
A
MIN
TYP MAX
MIN
TYP MAX
25°C
3
6
9
3
9
V
Input offsetvoltage
V
V
= 0,
= 0
R
R
= 50 Ω
= 50 Ω
mV
IO
O
O
S
S
Full range
15
Temperature
coefficient of input
offset voltage
α
Full range
18
5
18
5
µV/°C
VIO
25°C
125°C
25°C
100
20
100
20
pA
nA
pA
nA
‡
I
IO
V
V
= 0
= 0
Input offset current
O
30
200
50
30
200
50
‡
I
IB
Input bias current
O
125°C
± 12
to
15
± 12
to
15
Common-mode input
voltage range
V
V
A
25°C
±11
±11
V
V
ICR
R
R
R
= 10 kΩ
≥ 10 kΩ
≥ 2 kΩ
25°C
±12 ±13.5
±12
±12 ±13.5
±12
L
L
L
Maximum peak
output voltage swing
OM
Full range
±10
±12
±10
±12
Large-signal
differential voltage
amplification
V
= ±10 V,
= ±10 V,
R
R
≥ 2 kΩ
≥ 2 kΩ
25°C
25
200
25
200
O
O
L
L
V/mV
VD
V
Full range
15
15
B
Unity-gain bandwidth
Input resistance
25°C
25°C
3
3
MHz
1
12
12
r
i
10
10
Ω
Common-mode
rejection ratio
V
V
= V
= 0,
min,
R
IC
O
ICR
CMRR
25°C
80
80
86
80
80
86
dB
= 50 Ω
S
Supply voltage
rejection ratio
V
V
= ±15 V to ±9 V,
= 0,
CC
O
k
25°C
86
86
dB
SVR
R = 50 Ω
S
(∆V
/∆V )
CC±
IO
Supply current
(per amplifier)
I
V
= 0,
= 100
No load
25°C
25°C
1.4
2.8
1.4
2.8
mA
dB
CC
O
V
/V
Crosstalk attenuation
A
VD
120
120
O1 O2
†
‡
All characteristics are measured under open-loop conditions with zero common-mode input voltage unless otherwise specified.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 17. Pulse techniques must be used that maintain the junction temperatures as close to the ambient temperature as is possible.
operating characteristics, V
= ±15 V, T = 25°C (unless otherwise noted)
A
CC±
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
V/µs
µs
V = 10 V,
I
R
R
= 2 kΩ,
= 2 kΩ,
C
C
= 100 pF, See Figure 1
= 100 pF,
8
13
L
L
L
L
SR
Slew rate at unity gain
V = 10 V,
I
5
T
A
= – 55°C to 125°C,
See Figure 1
t
r
Rise time
0.05
20%
18
V = 20 mV,
I
R
= 2 kΩ,
C
= 100 pF, See Figure 1
L
L
Overshoot factor
f = 1 kHz
nV/√Hz
µV
Equivalent input noise
voltage
V
n
R
R
= 20 Ω
= 20 Ω,
S
S
f = 10 Hz to 10 kHz
f = 1 kHz
4
Equivalent input noise
current
I
n
0.01
pA/√Hz
V rms = 6 V,
I
A
VD
= 1,
R
≤ 1 kΩ,
R ≥ 2 kΩ,
L
S
THD Total harmonic distortion
0.003%
f = 1 kHz
On products compliant to MIL-PRF-38535, this parameter is not production tested.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
electrical characteristics, V
= ±15 V, T = 25°C (unless otherwise noted)
CC±
A
TL082Y, TL084Y
†
PARAMETER
UNIT
TEST CONDITIONS
MIN
TYP
3
MAX
V
IO
Input offset voltage
Temperature coefficient of input offset voltage
R
R
= 50 Ω
= 50 Ω
15
mV
µV/°C
pA
V
O
V
O
V
O
V
O
= 0,
= 0,
= 0,
= 0,
S
S
α
18
5
VIO
‡
I
I
Input offset current
200
400
IO
‡
Input bias current
30
pA
IB
–12
to
15
V
Common-mode input voltage range
±11
V
ICR
OM
V
Maximum peak output voltage swing
Large-signal differential voltage amplification
Unity-gain bandwidth
R
= 10 kΩ,
= ±10 V,
±12
±13.5
200
3
V
V/mV
MHz
Ω
L
A
VD
V
O
R
≥ 2 kΩ
25
L
B
1
12
10
Input resistance
r
i
70
70
70
70
86
86
86
86
V
R
= V
= 50 Ω
min,
V
= 0,
IC
S
ICR
O
CMRR
Common-mode rejection ratio
dB
dB
V
CC
V
O
= ±15 V to ± 9 V,
= 0,
k
Supply voltage rejection ratio (∆V
/∆V
)
IO
SVR
CC±
R
= 50 Ω
S
I
Supply current (per amplifier)
Crosstalk attenuation
V
= 0,
No load
1.4
2.8
mA
dB
CC
O
V
/V
A
VD
= 100
120
O1 O2
†
‡
All characteristics are measured under open-loop conditions with zero common-mode voltage unless otherwise specified.
Input bias currents of a FET-input operational amplifier are normal junction reverse currents, which are temperature sensitive as shown in
Figure 17. Pulse techniques must be used that maintain the junction temperature as close to the ambient temperature as possible.
operating characteristics, V
= ±15 V, T = 25°C
A
CC±
PARAMETER
TEST CONDITIONS
MIN
TYP
13
MAX
UNIT
V/µs
µs
SR
Slew rate at unity gain
Rise time
V = 10 V,
R
= 2 kΩ,
C
= 100 pF, See Figure 1
8
I
L
L
L
L
t
r
0.05
20%
18
V = 20 mV,
I
R
= 2 kΩ,
C
= 100 pF, See Figure 1
Overshoot factor
f = 1 kHz
nV/√Hz
µV
V
n
Equivalent input noise voltage
Equivalent input noise current
R
R
= 20 Ω
= 20 Ω,
S
S
f = 10 Hz to 10 kHz
f = 1 kHz
4
I
n
0.01
pA/√Hz
V rms = 6 V,
I
A
VD
= 1,
R
≤ 1 kΩ,
R ≥ 2 kΩ,
L
S
THD Total harmonic distortion
0.003%
f = 1 kHz
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
PARAMETER MEASUREMENT INFORMATION
10 kΩ
–
1 kΩ
OUT
–
+
V
I
V
I
OUT
+
C
= 100 pF
R
= 2 kΩ
L
L
C
= 100 pF
R
L
L
Figure 1
Figure 2
100 kΩ
TL081
–
IN–
IN+
C2
OUT
+
N2
C1 500 pF
N1
–
100 kΩ
IN–
N1
OUT
+
1.5 kΩ
V
CC–
Figure 3
Figure 4
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Frequency
5, 6, 7
vs Free-air temperature
vs Load resistance
vs Supply voltage
8
9
10
V
OM
Maximum peak output voltage
vs Free-air temperature
vs Frequency
11
12
Large-signal differential voltage amplification
A
VD
Differential voltage amplification
Total power dissipation
vs Frequency with feed-forward compensation
vs Free-air temperature
13
14
P
D
CC
IB
vs Free-air temperature
vs Supply voltage
15
16
I
I
Supply current
Input bias current
vs Free-air temperature
vs Time
17
18
19
20
21
22
Large-signal pulse response
Output voltage
V
O
vs Elapsed time
vs Free-air temperature
vs Frequency
CMRR
Common-mode rejection ratio
Equivalent input noise voltage
Total harmonic distortion
V
n
THD
vs Frequency
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
±15
±15
R
= 10 kΩ
= 25°C
V
= ±15 V
L
CC±
CC±
R
= 2 kΩ
= 25°C
L
T
A
T
A
See Figure 2
V
= ±15 V
= ±10 V
±12.5
±10
±7.5
±5
CC±
See Figure 2
±12.5
±10
V
= ±10 V
= ±5 V
V
CC±
CC±
±7.5
±5
V
CC±
V
= ±5 V
±2.5
0
±2.5
0
10 M
100
1 k
10 k
100 k
1 M
100
1 k
10 k
100 k
1 M
10 M
f – Frequency – Hz
f – Frequency – Hz
Figure 5
Figure 6
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
TYPICAL CHARACTERISTICS
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
FREQUENCY
FREE-AIR TEMPERATURE
±15
±12.5
±10
±7.5
±5
±15
±12.5
±10
±7.5
±5
R
= 10 kΩ
L
V
R
= ±15 V
CC±
= 2 kΩ
L
T
= 25°C
A
See Figure 2
R
= 2 kΩ
L
T
A
= –55°C
T
A
= 125°C
±2.5
0
±2.5
V
= ±15 V
CC±
See Figure 2
0
10 k
40 k 100 k
400 k 1 M
4 M 10 M
– 75 – 50 – 25
0
25
50
75 100 125
f – Frequency – Hz
T
A
– Free-Air Temperature – °C
Figure 7
Figure 8
MAXIMUM PEAK OUTPUT VOLTAGE
MAXIMUM PEAK OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
LOAD RESISTANCE
±15
±15
R
T
= 10 kΩ
= 25°C
V
T
= ±15 V
= 25°C
L
A
CC±
A
±12.5
±12.5
See Figure 2
±10
±7.5
±5
±10
±7.5
±5
±2.5
0
±2.5
0
0.1
2
4
6
8
10
12
14
16
0
0.2
0.4 0.7
1
2
4
7
10
|V
CC±
| – Supply Voltage – V
R
– Load Resistance – kΩ
L
Figure 9
Figure 10
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
TYPICAL CHARACTERISTICS
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
1000
700
400
200
100
70
40
20
10
7
4
2
1
V
V
= ±15 V
CC±
= ±10 V
O
R
= 2 kΩ
L
–75 –50 –25
0
25
50
75 100 125
T
A
– Free-Air Temperature – °C
Figure 11
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
FREQUENCY
6
5
10
V
R
T
= ±5 V to ±15 V
CC±
= 10 kΩ
L
= 25°C
10
A
4
10
0°
Differential Voltage
Amplification
(left scale)
3
2
45°
10
10
10
90°
Phase Shift
(right scale)
1
1
135°
180°
1
10
100
1 k
10 k 100 k
1 M 10 M
f – Frequency – Hz
Figure 12
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
TYPICAL CHARACTERISTICS
DIFFERENTIAL VOLTAGE AMPLIFICATION
TOTAL POWER DISSIPATION
vs
FREE-AIR TEMPERATURE
vs
FREQUENCY WITH FEED-FORWARD COMPENSATION
6
250
225
200
175
150
125
100
75
10
V
= ±15 V
CC±
V
= ±15 V
CC±
C2 = 3 pF
= 25°C
No Signal
No Load
5
10
T
A
See Figure 3
4
TL084, TL085
10
3
10
10
TL082, TL083
2
TL081
50
25
0
10
1
–75 –50 –25
0
25
50
75 100 125
100
1 k
10 k
100 k
1 M
10 M
T
A
– Free-Air Temperature – °C
f – Frequency With Feed-Forward Compensation – Hz
Figure 13
Figure 14
SUPPLY CURRENT PER AMPLIFIER
SUPPLY CURRENT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
2.0
V
= ±15 V
CC±
T
= 25°C
A
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
No Signal
No Load
No Signal
No Load
–75 –50 –25
0
25
50
75 100 125
0
2
4
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
|V
CC±
| – Supply Voltage – V
Figure 15
Figure 16
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
TYPICAL CHARACTERISTICS
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
VOLTAGE-FOLLOWER
LARGE-SIGNAL PULSE RESPONSE
6
4
100
10
V
R
C
= ±15 V
= 2 kΩ
= 100 pF
= 25°C
CC±
L
L
V
= ± 15 V
CC±
T
A
Output
2
0
1
– 2
– 4
– 6
Input
0.1
0.01
– 50 – 25
0
25
50
75
100
125
0
0.5
1
1.5
2
2.5
3
3.5
T
A
– Free-Air Temperature – °C
t – Time – µs
Figure 17
Figure 18
OUTPUT VOLTAGE
vs
COMMON-MODE REJECTION RATIO
vs
ELAPSED TIME
FREE-AIR TEMPERATURE
28
89
V
= ±15 V
CC±
= 10 kΩ
R
L
24
20
16
12
8
88
87
86
85
84
83
V
R
C
= ±15 V
= 2 kΩ
= 100 pF
= 25°C
CC±
L
L
T
A
See Figure 1
4
0
– 4
0
0.2
0.4
0.6
0.8
1.0
1.2
– 75 – 50 – 25
0
25
50
75 100 125
t – Elapsed Time – µs
T
A
– Free-Air Temperature – °C
Figure 19
Figure 20
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
†
TYPICAL CHARACTERISTICS
EQUIVALENT INPUT NOISE VOLTAGE
TOTAL HARMONIC DISTORTION
vs
vs
FREQUENCY
FREQUENCY
50
40
30
20
10
0
1
V
A
= ±15 V
V
A
= ±15 V
= 1
CC±
= 10
CC±
VD
VD
= 20 Ω
0.4
R
V
= 6 V
S
I(RMS)
T
A
= 25°C
T
A
= 25°C
0.1
0.04
0.01
0.004
0.001
10
400
1 k
4 k 10 k
40 k 100 k
10
40 100
400 1 k
4 k 10 k
40 k 100 k
f – Frequency – Hz
f – Frequency – Hz
Figure 21
Figure 22
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
APPLICATION INFORMATION
R
= 100 kΩ
F
V
CC+
–
15 V
–
TL081
R1
C3
R2
3.3 kΩ
Output
+
Input
Output
TL081
+
V
CC–
C
= 3.3 µF
1 kΩ
F
–15 V
3.3 kΩ
R1 = R2 = 2(R3) = 1.5 MΩ
R3
C1
C2
C3
C1 = C2 =
= 110 pF
= 1 kHz
9.1 kΩ
2
1
1
f =
f
o
=
2π R
C
F
F
2π R1 C1
Figure 23
Figure 24
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
V
CC+
1 MΩ
–
TL084
+
Output A
V
CC+
+
1 µF
TL084
V
CC+
–
Input
–
TL084
+
Output B
Output C
100 kΩ
100 µF
100 kΩ
V
CC+
100 kΩ
100 kΩ
V
CC+
–
TL084
+
Figure 25. Audio-Distribution Amplifier
6 sin ωt
1N4148
– 15 V
18 kΩ
(see Note A)
18 pF
1 kΩ
18 pF
V
CC+
–
V
CC+
88.4 kΩ
1/2
–
TL082
1/2
+
6 cos ωt
TL082
88.4 kΩ
+
V
CC–
18 pF
1 kΩ
V
CC–
15 V
1N4148
18 kΩ
(see Note A)
88.4 kΩ
NOTE A: These resistor values may be adjusted for a symmetrical output.
Figure 26. 100-KHz Quadrature Oscillator
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
APPLICATION INFORMATION
16 kΩ
16 kΩ
220 pF
220 pF
43 kΩ
30 kΩ
43 kΩ
30 kΩ
V
V
CC+
CC+
43 kΩ
Input
220 pF
220 pF
V
V
CC+
CC+
–
1/4
–
1/4
43 kΩ
43 kΩ
43 kΩ
–
1/4
–
TL084
TL084
Output
B
1/4
+
+
TL084
TL084
+
+
1.5 kΩ
1.5 kΩ
V
CC–
V
CC–
V
CC–
V
CC–
Output A
Output A
Output B
2 kHz/div
Second-Order Bandpass Filter
= 100 kHz, Q = 30, GAIN = 4
2 kHz/div
Cascaded Bandpass Filter
f = 100 kHz, Q = 69, GAIN = 16
o
f
o
Figure 27. Positive-Feedback Bandpass Filter
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0.050 (1,27)
0.020 (0,51)
0.014 (0,35)
0.010 (0,25)
M
14
8
0.008 (0,20) NOM
0.244 (6,20)
0.228 (5,80)
0.157 (4,00)
0.150 (3,81)
Gage Plane
0.010 (0,25)
1
7
0°–8°
0.044 (1,12)
A
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
PINS **
8
14
16
DIM
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
A MAX
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
J (R-GDIP-T**)
CERAMIC DUAL-IN-LINE PACKAGE
14 PIN SHOWN
PINS **
14
16
18
20
DIM
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
A MAX
B
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
A MIN
B MAX
B MIN
C MAX
C MIN
14
8
0.785
0.785
0.910
0.975
(19,94) (19,94) (23,10) (24,77)
C
0.755
(19,18) (19,18)
0.755
0.930
(23,62)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
1
7
0.065 (1,65)
0.045 (1,14)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.100 (2,54)
0.070 (1,78)
0.020 (0,51) MIN
A
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.100 (2,54)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.014 (0,36)
0.008 (0,20)
4040083/D 08/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, GDIP1-T18, GDIP1-T20, and GDIP1-T22.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE PACKAGE
0.400 (10,20)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.063 (1,60)
0.015 (0,38)
0°–15°
0.023 (0,58)
0.015 (0,38)
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only on press ceramic glass frit seal only.
E. Falls within MIL-STD-1835 GDIP1-T8
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PIN SHOWN
PINS **
14
16
18
20
DIM
0.775
(19,69)
0.775
(19,69)
0.920
(23.37)
0.975
(24,77)
A MAX
A
16
9
0.745
(18,92)
0.745
(18,92)
0.850
(21.59)
0.940
(23,88)
A MIN
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.020 (0,51) MIN
0.310 (7,87)
0.290 (7,37)
0.035 (0,89) MAX
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
14/18 PIN ONLY
4040049/C 08/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20 pin package is shorter then MS-001.)
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE PACKAGE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.310 (7,87)
0.290 (7,37)
0.020 (0,51) MIN
0.200 (5,08) MAX
Seating Plane
0.125 (3,18) MIN
0.100 (2,54)
0°–15°
0.021 (0,53)
0.015 (0,38)
0.010 (0,25)
M
0.010 (0,25) NOM
4040082/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
0,30
0,19
0,65
M
0,10
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
0,75
A
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4040064/E 08/96
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
U (S-GDFP-F10)
CERAMIC DUAL FLATPACK
0.250 (6,35)
0.246 (6,10)
0.006 (0,15)
0.004 (0,10)
0.080 (2,03)
0.050 (1,27)
0.045 (1,14)
0.026 (0,66)
0.300 (7,62)
0.350 (8,89)
0.250 (6,35)
0.350 (8,89)
0.250 (6,35)
0.019 (0,48)
0.015 (0,38)
1
10
0.050 (1,27)
0.250 (6,35)
5
6
0.025 (0,64)
0.005 (0,13)
1.000 (25,40)
0.750 (19,05)
4040179/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F10 and JEDEC MO-092AA
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL081, TL081A, TL081B, TL082, TL082A, TL082B
TL082Y, TL084, TL084A, TL084B, TL084Y
JFET-INPUT OPERATIONAL AMPLIFIERS
SLOS081E – FEBRUARY 1977 – REVISED FEBRUARY 1999
MECHANICAL DATA
W (R-GDFP-F14)
CERAMIC DUAL FLATPACK
Base and Seating Plane
0.260 (6,60)
0.235 (5,97)
0.007 (0,18)
0.004 (0,10)
0.080 (2,03)
0.045 (1,14)
0.045 (1,14)
0.026 (0,66)
0.280 (7,11)
0.255 (6,48)
0.360 (9,14)
0.240 (6,10)
0.360 (9,14)
0.240 (6,10)
0.019 (0,48)
0.015 (0,38)
1
14
0.050 (1,27)
0.390 (9,91)
0.335 (8,51)
0.025 (0,64)
0.015 (0,38)
7
8
1.000 (25,40)
0.735 (18,67)
4040180-2/B 03/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification only.
E. Falls within MIL STD 1835 GDFP1-F14 and JEDEC MO-092AB
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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