TL145406_14 [TI]
TRIPLE RS-232 DRIVERS/RECEIVERS;型号: | TL145406_14 |
厂家: | TEXAS INSTRUMENTS |
描述: | TRIPLE RS-232 DRIVERS/RECEIVERS 驱动 |
文件: | 总16页 (文件大小:501K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢆ
ꢀ ꢇꢈꢉ ꢁꢊ ꢇꢋꢌ ꢍꢎ ꢍ ꢏꢇꢈ ꢐꢊ ꢇꢋꢑꢇ ꢊꢒ ꢊꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
DW OR N PACKAGE
(TOP VIEW)
D
D
D
D
D
Meets or Exceeds the Requirements of
ANSI TIA/EIA-232-F and ITU V.28
Designed to Support Data Rates up to
120 kbit/s Over 3-m Cable
V
V
1
2
3
4
5
6
7
8
16
15
14
CC
DD
1RY
1DA
1RA
1DY
2RA
2DY
3RA
3DY
ESD Protection Exceeds 5 kV on All Pins
Flow-Through Design
13 2RY
12 2DA
Wide-Driver Supply Voltage . . . 7.5 V to
15 V
11
10
9
3RY
3DA
GND
D
Functionally Interchangeable With Motorola
MC145406 and Texas Instruments
SN75C1406
V
SS
description
The TL145406 is a bipolar device containing three independent drivers and receivers that are used to interface
data terminal equipment (DTE) with data circuit-terminating equipment (DCE). The drivers and receivers of the
TL145406 are similar to those of the SN75188 quadruple driver and SN75189A quadruple receiver,
respectively. The pinout matches the flow-through design of the SN75C1406 to reduce the board space required
and to allow easy interconnection. The bipolar circuits and processing of the TL145406 provide a rugged
low-cost solution for this function at the expense of quiescent power and external passive components relative
to the SN75C1406.
The TL145406 complies with the requirements of TIA/EIA-232-F and ITU (formerly CCITT) V.28 standards.
These standards are for data interchange between a host computer and peripheral at signaling rates up to
20 kbit/s. The switching speeds of the TL145406 are fast enough to support rates up to 120 kbit/s with lower
capacitive loads (shorter cables). Interoperability at the higher signaling rates cannot be assured unless the
designer has design control of the cable and of the interface circuits at both ends. For interoperability at signaling
rates to 120 kbit/s, use of TIA/EIA-423-B (ITU V.10) and TIA/EIA-422-B (ITU V.11) standards is recommended.
The TL145406 is characterized for operation from 0°C to 70°C.
AVAILABLE OPTIONS
PACKAGED DEVICES
PLASTIC
DIP
PLASTIC
SMALL OUTLINE
(DW)
T
A
(N)
0°C to 70°C
TL145406N
TL145406DW
The DW package also is available taped and reeled. Add
the suffix R to the device type (e.g., TL145406DWR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2001, Texas Instruments Incorporated
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ꢞ ꢢ ꢟ ꢞꢗ ꢘꢬ ꢚꢙ ꢝ ꢥꢥ ꢣꢝ ꢛ ꢝ ꢜ ꢢ ꢞ ꢢ ꢛ ꢟ ꢧ
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢄ ꢃ ꢅꢆ
ꢀ ꢇꢈ ꢉ ꢁ ꢊ ꢇ ꢋꢌꢍ ꢎꢍ ꢏꢇ ꢈ ꢐꢊ ꢇꢋ ꢑ ꢇ ꢊꢒꢊ ꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
†
logic symbol
2
15
13
11
14
12
10
1RA
2RA
3RA
1DY
2DY
3DY
1RY
2RY
3RY
1DA
2DA
3DA
4
6
3
5
7
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
Typical of Each Receiver
2, 4, 6
15, 13, 11
14, 12, 10
RA
RY
DA
Typical of Each Driver
3, 5, 7
DY
schematic (each driver)
To Other Drivers
V
ESD
ESD
DD
11.6 kΩ
9.4 kΩ
Input
DAx
75.8 Ω
320 Ω
DYx
Output
ESD
4.2 kΩ
GND
To Other
Drivers
10.4 kΩ
3.3 kΩ
68.5 Ω
V
SS
ESD
To Other Drivers
Resistor values shown are nominal.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢆ
ꢀ ꢇꢈꢉ ꢁꢊ ꢇꢋꢌ ꢍꢎ ꢍ ꢏꢇꢈ ꢐꢊ ꢇꢋꢑꢇ ꢊꢒ ꢊꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
schematic (each receiver)
To Other Receivers
ESD
V
CC
9 kΩ 5 kΩ
1.66 kΩ
ESD
RYx
Output
2 kΩ
3.8 kΩ
Input
ESD
RAx
10 kΩ
GND
To Other Receivers
Resistor values shown are nominal.
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage (see Note 1): V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V
CC
DD
SS
V
V
Input voltage range: Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 7 V
Receiver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −30 V to 30 V
Driver output voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −15 V to 15 V
Receiver low-level output current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
Package thermal impedance, θ (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltages are with respect to the network ground terminal.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS185D − DECEMBER 1994 − REVISED JULY 2001
recommended operating conditions
MIN NOM
MAX
15
UNIT
V
V
V
V
V
Supply voltage
7.5
−7.5
4.5
9
−9
5
V
V
V
V
V
DD
SS
CC
IH
Supply voltage
−15
5.5
Supply voltage
High-level input voltage (driver only)
Low-level input voltage (driver only)
1.9
0.8
−6
IL
Driver
I
High-level output current
mA
OH
OL
Receiver
Driver
−0.5
6
I
Low-level output current
mA
Receiver
16
T
A
Operating free-air temperature
0
70
°C
supply currents
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
15
UNIT
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
DD
V
CC
= 9 V,
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
V
SS
= −9 V
= 12 V,
= 15 V,
= 9 V,
= −12 V
= −15 V
= −9 V
19
All inputs at 1.9 V, No load
All inputs at 0.8 V, No load
All inputs at 1.9 V, No load
All inputs at 0.8 V, No load
25
I
Supply current from V
mA
DD
DD
4.5
5.5
9
= 12 V,
= 15 V,
= 9 V,
= −12 V
= −15 V
= −9 V
−15
−19
−25
−3.2
−3.2
−3.2
20
= 12 V,
= 15 V,
= 9 V,
= −12 V
= −15 V
= −9 V
I
I
Supply current from V
Supply current from V
mA
mA
SS
SS
= 12 V,
= 15 V,
= 5 V
= −12 V
= −15 V
All inputs at 5 V,
No load,
13.2
CC
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢆ
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SLLS185D − DECEMBER 1994 − REVISED JULY 2001
DRIVER SECTION
electrical characteristics over recommended operating free-air temperture range, V
= 9 V,
DD
V
= −9 V, V
= 5 V (unless otherwise noted)
SS
CC
PARAMETER
TEST CONDITIONS
MIN
MAX
UNIT
V
TYP
7.5
V
V
High-level output voltage
Low-level output voltage (see Note 3)
High-level input current
V
V
= 0.8 V,
= 1.9 V,
R
R
= 3 kΩ,
= 3 kΩ,
See Figure 1
See Figure 1
6
OH
IL
L
L
−7.5
−6
10
V
OL
IH
I
IH
V = 5 V,
I
See Figure 2
See Figure 2
µA
mA
I
IL
Low-level input current
V = 0,
I
−1.6
High-level short-circuit output current
(see Note 4)
I
V
= 0.8 V,
= 2 V,
V
= 0 or V
,
SS
See Figure 1
See Figure 1
−4.5
−10 −19.5
10 19.5
mA
OS(H)
OS(L)
IL
O
I
Low-level short-circuit output current
Output resistance (see Note 5)
V
V
V
O
= 0 or V ,
DD
4.5
mA
IH
r
= V
DD
= V
= 0, V = −2 V to 2 V
300
Ω
O
CC
SS
O
NOTES: 3. The algebraic convention, where the more positive (less negative) limit is designated as maximum, is used in this data sheet for logic
levels only (e.g., if −10 V is maximum, the typical value is a more negative voltage).
4. Output short-circuit conditions must maintain the total power dissipation below absolute maximum ratings.
5. Test conditions are those specified by TIA/EIA-232-F and as listed above.
switching characteristics, V
= 5 V, V
= 12 V, V = −12 V, T = 25°C
CC
DD SS A
PARAMETER
TEST CONDITIONS
MIN
TYP
315
75
MAX
500
175
100
UNIT
ns
t
t
Propagation delay time, low- to high-level output
R
R
R
R
= 3 kΩ to 7 kΩ, C = 15 pF, See Figure 3
L
PLH
L
L
L
L
Propagation delay time, high- to low-level output
= 3 kΩ to 7 kΩ, C = 15 pF, See Figure 3
ns
PHL
L
= 3 kΩ to 7 kΩ, C = 15 pF, See Figure 3
60
ns
L
t
Transition time, low- to high-level output
= 3 kΩ to 7 kΩ, C = 2500 pF,
TLH
L
1.7
40
2.5
75
µs
ns
µs
See Figure 3 and Note 6
R
R
= 3 kΩ to 7 kΩ, C = 15 pF, See Figure 3
L
L
L
t
Transition time, high- to low-level output
= 3 kΩ to 7 kΩ, C = 2500 pF,
THL
L
1.5
2.5
See Figure 3 and Note 7
NOTES: 6. Measured between −3-V and 3-V points of the output waveform (TIA/EIA-232-F conditions). All unused inputs are tied.
7. Measured between 3-V and −3-V points of the output waveform (TIA/EIA-232-F conditions). All unused inputs are tied.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS185D − DECEMBER 1994 − REVISED JULY 2001
RECEIVER SECTION
electrical characteristics over recommended operating conditions (unless otherwise noted)
Ĕ
PARAMETER
TEST CONDITIONS
MIN
1.75
1.55
0.75
0.5
MAX
2.3
UNIT
TYP
T
= 25°C
1.9
A
V
IT+
Positive-going threshold voltage
Negative-going threshold voltage
See Figure 5
V
T
A
= 0°C to 70°C
2.3
V
V
0.97
1.25
V
V
IT−
Input hysteresis (V
IT+
− V
)
hys
IT−
V
= 0.75 V
2.6
2.6
4
5
IH
Inputs open
V
V
High-level output voltage
Low-level output voltage
I
I
= −0.5 mA
= 10 mA,
V
V
OH
OH
V = 3 V
I
0.2
0.45
8.3
OL
OL
V = 25 V,
See Figure 5
See Figure 5
See Figure 5
See Figure 5
3.6
0.43
I
I
IH
High-level input current
Low-level input current
mA
V = 3 V,
I
V = −25 V,
−3.6
−8.3
−12
I
I
I
mA
mA
IL
V = −3 V,
−0.43
I
Short-circuit output current
−3.4
OS
†
All typical values are at T = 25°C, V
= 5, V
DD
= 9 V, and V = −9 V.
SS
A
CC
switching characteristics, V
= 5 V, V
= 12 V, V = −12 V, T = 25°C
CC
DD SS A
PARAMETER
TEST CONDITIONS
MIN
TYP
107
42
MAX
425
150
400
60
UNIT
ns
t
t
t
t
Propagation delay time, low- to high-level output
Propagation delay time, high- to low-level output
Transition time, low- to high-level output
C
C
C
C
= 50 pF,
= 50 pF,
= 50 pF,
= 50 pF,
R
R
R
R
= 5 kΩ,
= 5 kΩ,
= 5 kΩ,
= 5 kΩ,
See Figure 6
See Figure 6
See Figure 6
See Figure 6
PLH
PHL
TLH
THL
L
L
L
L
L
L
L
L
ns
175
16
ns
Transition time, high- to low-level output
ns
PARAMETER MEASUREMENT INFORMATION
I
OS(L)
V
DD
V
V
V
or GND
or GND
DD
V
DD
CC
V
CC
−I
OS(H)
I
IH
SS
V
I
V
V
I
−I
IL
V
O
R
= 3 kΩ
L
I
V
SS
V
SS
Figure 1. Driver Test Circuit
for V , V , I , and I
Figure 2. Driver Test Circuit for I and I
OH OL OS(H)
OS(L)
IH
IL
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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ꢀ ꢇꢈꢉ ꢁꢊ ꢇꢋꢌ ꢍꢎ ꢍ ꢏꢇꢈ ꢐꢊ ꢇꢋꢑꢇ ꢊꢒ ꢊꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
PARAMETER MEASUREMENT INFORMATION
3 V
0
Input
1.5 V
1.5 V
V
DD
V
Input
CC
t
t
PHL
PLH
90%
Pulse
Generator
(see Note B)
V
V
OH
90%
C
L
R
50%
10%
50%
10%
L
Output
(see Note A)
OL
V
SS
t
t
TLH
THL
TEST CIRCUIT
C includes probe and jig capacitance.
L
VOLTAGE WAVEFORMS
NOTES: A.
B. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 Ω, t = t < 50 ns.
w
O
r
f
Figure 3. Driver Test Circuit and Voltage Waveforms
V
DD
V
CC
V
DD
V
V ,
IT
−I
OH
−I
OS
CC
V
I
V
OH
V
OL
I
OL
V
I
V
SS
V
SS
Figure 5. Receiver Test Circuit
for V , V , and V
Figure 4. Receiver Test Circuit for I
IT OH
OL
OS
4 V
0
Input
50%
50%
90%
V
DD
V
Input
CC
t
t
PHL
PLH
90%
Pulse
Generator
(see Note B)
V
V
OH
C
L
R
50%
10%
50%
10%
L
Output
(see Note A)
OL
V
SS
t
t
TLH
THL
VOLTAGE WAVEFORMS
TEST CIRCUIT
C includes probe and jig capacitance.
L
NOTES: A.
B. The pulse generator has the following characteristics: t = 25 µs, PRR = 20 kHz, Z = 50 Ω, t = t < 50 ns.
w
O
r
f
Figure 6. Receiver Propagation and Transition Times
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLLS185D − DECEMBER 1994 − REVISED JULY 2001
TYPICAL CHARACTERISTICS
DRIVER
OUTPUT CURRENT
vs
DRIVER
VOLTAGE TRANSFER CHARACTERISTICS
OUTPUT VOLTAGE
20
16
12
12
V
V
T
A
= 9 V
= −9 V
= 25°C
DD
SS
V
DD
= 12 V, V
= −12 V
= −9 V
SS
SS
9
6
V
DD
= 9 V, V
V
OL
(V = 1.9 V)
I
V
DD
= 6 V, V
= −6 V
SS
8
4
3
0
0
−4
−3
−6
−8
3-kΩ
Load Line
−12
−16
−20
V
(V = 0.8 V)
I
OH
−9
R
T
A
= 3 kΩ
= 25°C
L
−12
−16 −12 −8
−4
0
4
8
12
16
0
0.2 0.4 0.6 0.8
1
1.2 1.4 1.6 1.8
2
V
O
− Output Voltage − V
V − Input Voltage − V
I
Figure 7
Figure 8
DRIVER
SHORT-CIRCUIT OUTPUT CURRENT
vs
DRIVER
SLEW RATE
vs
FREE-AIR TEMPERATURE
LOAD CAPACITANCE
12
9
1000
I
(V = 1.9 V)
I
OS(L)
6
3
100
10
1
V
V
V
= 9 V
= −9 V
= 0
DD
SS
O
0
−3
−6
V
V
R
= 9 V
= −9 V
= 3 kΩ
= 25°C
DD
SS
L
I
(V = 0.8 V)
I
OS(H)
−9
T
A
−12
0
10
T
20
30
40
50
60
70
10
100
1000
10000
− Free-Air Temperature − °C
C
− Load Capacitance − pF
A
L
Figure 9
Figure 10
8
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ꢀꢁ ꢂꢃ ꢄꢃ ꢅꢆ
ꢀ ꢇꢈꢉ ꢁꢊ ꢇꢋꢌ ꢍꢎ ꢍ ꢏꢇꢈ ꢐꢊ ꢇꢋꢑꢇ ꢊꢒ ꢊꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
TYPICAL CHARACTERISTICS
RECEIVER
INPUT THRESHOLD VOLTAGE
vs
RECEIVER
INPUT THRESHOLD VOLTAGE
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
2
1.8
1.6
2.4
2.2
2
V
IT+
V
IT+
1.4
1.8
1.2
1
1.6
1.4
V
IT−
0.8
1.2
1
0.6
0.4
V
IT−
0.8
0.6
0.4
0.2
0
2
3
4
5
6
7
8
9
10
0
10
20
30
40
50
60
70
V
CC
− Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 11
Figure 12
RECEIVER
NOISE REJECTION
RECEIVER
MAXIMUM SUPPLY VOLTAGE
vs
6
5
4
3
2
1
V
= 5 V
CC
= 25°C
T
A
FREE-AIR TEMPERATURE
See Note A
16
C
= 300 pF
C
14
12
C
= 500 pF
C
10
8
C
= 12 pF
C
C
= 100 pF
C
6
4
0
0
40
100
400 1000
4000 10000
2
0
t
− Pulse Duration − ns
w
R
≥ 3 kΩ (from each output to GND)
L
NOTE A: This figure shows the maximum amplitude of
a
0
10
20
30
40
50
60
70
positive-going pulse that, starting from 0, does not cause a
change of the output level.
T
A
− Free-Air Temperature − °C
Figure 13
Figure 14
9
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ꢀ ꢁ ꢂ ꢃꢄ ꢃ ꢅꢆ
ꢀ ꢇꢈ ꢉ ꢁ ꢊ ꢇ ꢋꢌꢍ ꢎꢍ ꢏꢇ ꢈ ꢐꢊ ꢇꢋ ꢑ ꢇ ꢊꢒꢊ ꢈ ꢐ ꢊꢇ ꢋ
SLLS185D − DECEMBER 1994 − REVISED JULY 2001
APPLICATION INFORMATION
Diodes placed in series with the V and V leads protect the TL145406 during the fault condition in which the device
DD
SS
outputs are shorted to 15 V and the power supplies are at low. Diodes also provide low-impedance paths to ground
(see Figure 15).
V
DD
V
DD
Output
15 V
TL145406
TL145406
V
SS
V
SS
Figure 15. Power-Supply Protection to Meet Power-Off Fault Conditions of ANSI TIA/EIA-232-F
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
10-May-2007
PACKAGING INFORMATION
Orderable Device
TL145406DW
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
DW
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL145406DWE4
TL145406DWG4
TL145406DWR
TL145406DWRE4
TL145406DWRG4
TL145406N
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
DW
DW
DW
DW
DW
N
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL145406NE4
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TL145406DWR
SOIC
DW
16
2000
330.0
16.4
10.75
10.7
2.7
12.0
16.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
11-Mar-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SOIC DW 16
SPQ
Length (mm) Width (mm) Height (mm)
346.0 346.0 33.0
TL145406DWR
2000
Pack Materials-Page 2
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相关型号:
TL1454ACNE4
1A DUAL SWITCHING CONTROLLER, 2000kHz SWITCHING FREQ-MAX, PDIP16, ROHS COMPLIANT, PLASTIC, DIP-16
TI
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