TL4050A50 [TI]
PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE;
| 型号： | TL4050A50 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE |
| 文件： | 总20页 (文件大小：947K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL4050-Q1
www.ti.com
SLOS588F –JUNE 2008–REVISED APRIL 2013
PRECISION MICROPOWER SHUNT VOLTAGE REFERENCE
Check for Samples: TL4050-Q1
1
FEATURES
Capacitor Required
•
Available in Extended Temperature Range:
–40°C to 125°C
•
•
Qualified for Automotive Applications
Fixed Output Voltages of 2.048 V, 2.5 V,
4.096 V, 5 V
APPLICATIONS
•
Tight Output Tolerances and Low Temperature
Coefficient
•
•
•
•
•
•
•
•
Data-Acquisition Systems
Power Supplies and Power-Supply Monitors
Instrumentation and Test Equipment
Process Controls
–
–
–
Max 0.1%, 50 ppm/°C – A Grade
Max 0.2%, 50 ppm/°C – B Grade
Max 0.5%, 50 ppm/°C – C Grade
Precision Audio
•
•
Low Output Noise: 41 μVRMS Typ
Automotive Electronics
Wide Operating Current Range:
60 μA Typ to 15 mA
Energy Management
•
Stable With All Capacitive Loads; No Output
Battery-Powered Equipment
DBZ (SOT-23-3) PACKAGE
(TOP VIEW)
DCK (SC-70) PACKAGE
(TOP VIEW)
1
1
CATHODE
5
4
ANODE
NC
NC
NC
*
3
2
3
2
ANODE
CATHODE
«Pin 3 is attached to Substrate and must
be connected to ANODE or left open.
NC – No internal connection
DESCRIPTION
The TL4050-Q1 family of shunt voltage references are versatile easy-to-use references suitable for a wide array
of applications. The two-terminal fixed-output device requires no external capacitors for operation and is stable
with all capacitive loads. Additionally, the reference offers low dynamic impedance, low noise, and low
temperature coefficient to ensure a stable output voltage over a wide range of operating currents and
temperatures.
The TL4050-Q1 is available in three initial tolerances, ranging from 0.1% (maximum) for the A grade to
0.5% (maximum) for the C grade. Thus, a great deal of flexibility is available to designers in choosing the best
cost-to-performance ratio for their applications. Packaged in the space-saving SOT-23-3 and SC-70 packages
and requiring a minimum current of 45 μA (typical), the TL4050-Q1 also is ideal for portable applications.
The TL4050x-Q1 characterization is for operation over an ambient temperature range of –40°C to 125°C.
PACKAGE AND ORDERING INFORMATION
For the most-current package and ordering information, see the Package Option Addendum at the end of this
document, or see the TI Web site at www.ti.com.
Package drawings, thermal data, and symbolization are available at www.ti.com/packaging.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Copyright © 2008–2013, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TL4050-Q1
SLOS588F –JUNE 2008–REVISED APRIL 2013
www.ti.com
FUNCTIONAL BLOCK DIAGRAM
CATHODE
+
_
ANODE
ABSOLUTE MAXIMUM RATINGS(1)
over free-air temperature range (unless otherwise noted)
MIN
MAX
20
UNIT
mA
°C
IZ
Continuous cathode current
–10
TJ
Operating virtual junction temperature
Storage temperature range
150
150
Tstg
–65
°C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2
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Copyright © 2008–2013, Texas Instruments Incorporated
TL4050-Q1
www.ti.com
SLOS588F –JUNE 2008–REVISED APRIL 2013
THERMAL INFORMATION
TL4050-Q1
THERMAL METRIC(1)
DBZ
3 PINS
331.1
107.5
63.4
DCK
5 PINS
289.9
56.4
93
UNIT
θJA
Junction-to-ambient thermal resistance(2)
Junction-to-case (top) thermal resistance(3)
Junction-to-board thermal resistance(4)
Junction-to-top characterization parameter(5)
Junction-to-board characterization parameter(6)
Junction-to-case (bottom) thermal resistance(7)
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
θJCtop
θJB
ψJT
4.9
0.7
ψJB
61.7
91.4
N/A
θJCbot
N/A
(1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953.
(2) The junction-to-ambient thermal resistance under natural convection is obtained in a simulation on a JEDEC-standard, high-K board, as
specified in JESD51-7, in an environment described in JESD51-2a.
(3) The junction-to-case (top) thermal resistance is obtained by simulating a cold plate test on the package top. No specific JEDEC-
standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
(4) The junction-to-board thermal resistance is obtained by simulating in an environment with a ring cold plate fixture to control the PCB
temperature, as described in JESD51-8.
(5) The junction-to-top characterization parameter, ψJT, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA, using a procedure described in JESD51-2a (sections 6 and 7).
(6) The junction-to-board characterization parameter, ψJB, estimates the junction temperature of a device in a real system and is extracted
from the simulation data for obtaining θJA , using a procedure described in JESD51-2a (sections 6 and 7).
(7) The junction-to-case (bottom) thermal resistance is obtained by simulating a cold plate test on the exposed (power) pad. No specific
JEDEC standard test exists, but a close description can be found in the ANSI SEMI standard G30-88.
Spacer
RECOMMENDED OPERATING CONDITIONS
MIN
(1)
MAX
15
UNIT
IZ
Cathode current
mA
I temperature
Q temperature
–40
–40
85
TA
Free-air temperature
°C
125
(1) See parametric tables
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TL4050-Q1
SLOS588F –JUNE 2008–REVISED APRIL 2013
www.ti.com
TL4050x20-Q1 ELECTRICAL CHARACTERISTICS
at extended temperature range, full range TA = –40°C to 125°C (unless otherwise noted)
TL4050A20-Q1
TL4050B20-Q1
TL4050C20-Q1
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Reverse
breakdown
voltage
VZ
IZ = 100 μA
25°C
25°C
2.048
2.048
2.048
V
Reverse
–2.048
2.048
–4.096
4.096
–10.24
10.24
breakdown
voltage
tolerance
ΔVZ
IZ = 100 μA
mV
Full
range
–12.288
12.288
–14.7456
14.7456
–17.2032
17.2032
25°C
41
60
65
41
60
65
41
60
65
Minimum
cathode
current
IZ,min
μA
Full
range
IZ = 10 mA
IZ = 1 mA
25°C
25°C
25°C
±20
±15
±15
±20
±15
±15
±20
±15
±15
Average
temperature
coefficient of
reverse
αVZ
ppm/°C
breakdown
voltage
IZ = 100 μA
Full
range
±50
0.8
1.2
6
±50
0.8
1.2
6
±50
0.8
1.2
6
25°C
0.3
2.3
0.3
2.3
0.3
2.3
Reverse
breakdown
voltage
change with
cathode
current
IZ,min < IZ < 1 mA
1 mA < IZ < 15 mA
Full
range
DVZ
DIZ
mV
25°C
Full
range
8
8
8
change
Reverse
dynamic
impedance
IZ = 1 mA,
f = 120 Hz,
IAC = 0.1 IZ
ZZ
eN
25°C
25°C
0.3
34
0.3
34
0.3
34
Ω
Wideband
noise
IZ = 100 μA,
10 Hz ≤ f ≤ 10 kHz
μVRMS
Long-term
stability of
reverse
breakdown
voltage
t = 1000 h,
TA = 25°C ± 0.1°C,
IZ = 100 μA
120
120
120
0.7
ppm
mV
Thermal
VHYST
ΔTA = –40°C to 125°C
0.7
0.7
hysteresis(1)
(1) Thermal hysteresis is defined as VZ,25°C (after cycling to –40°C) – VZ,25°C (after cycling to 125°C).
4
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TL4050-Q1
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SLOS588F –JUNE 2008–REVISED APRIL 2013
TL4050x25-Q1 ELECTRICAL CHARACTERISTICS
at extended temperature range, full range TA = –40°C to 125°C (unless otherwise noted)
TL4050B25-Q1
UNIT
PARAMETER
TEST CONDITIONS
TA
MIN
TYP
MAX
VZ
Reverse breakdown voltage IZ = 100 μA
25°C
25°C
2.5
V
–5
5
18
60
65
Reverse breakdown voltage
IZ = 100 μA
ΔVZ
mV
tolerance
Full range
25°C
–18
41
IZ,min
Minimum cathode current
IZ = 10 mA
μA
Full range
25°C
±20
±15
±15
Average temperature
coefficient of reverse
breakdown voltage
IZ = 1 mA
25°C
αVZ
ppm/°C
25°C
IZ = 100 μA
Full range
25°C
±50
0.8
1.2
6
0.3
2.3
IZ,min < IZ < 1 mA
1 mA < IZ < 15 mA
Reverse breakdown voltage
change with cathode
current change
DVZ
DIZ
Full range
25°C
mV
Full range
8
IZ = 1 mA,
f = 120 Hz,
IAC = 0.1 IZ
Reverse dynamic
impedance
ZZ
eN
25°C
25°C
0.3
41
Ω
IZ = 100 μA,
10 Hz ≤ f ≤ 10 kHz
Wideband noise
μVRMS
t = 1000 h,
TA = 25°C ± 0.1°C,
IZ = 100 μA
Long-term stability of
reverse breakdown voltage
120
0.7
ppm
mV
VHYST
Thermal hysteresis(1)
ΔTA = –40°C to 125°C
(1) Thermal hysteresis is defined as VZ,25°C (after cycling to –40°C) – VZ,25°C (after cycling to 125°C).
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TL4050-Q1
SLOS588F –JUNE 2008–REVISED APRIL 2013
www.ti.com
TL4050x41-Q1 ELECTRICAL CHARACTERISTICS
at extended temperature range, full range TA = –40°C to 125°C (unless otherwise noted)
TL4050B41-Q1
TYP
PARAMETER
TEST CONDITIONS
TA
UNIT
V
MIN
MAX
VZ
Reverse breakdown voltage IZ = 100 μA
25°C
25°C
4.096
–8.2
–29
8.2
29
68
78
Reverse breakdown voltage
IZ = 100 μA
ΔVZ
mV
tolerance
Full range
25°C
52
IZ,min
Minimum cathode current
IZ = 10 mA
μA
Full range
25°C
±30
±20
±20
Average temperature
coefficient of reverse
breakdown voltage
IZ = 1 mA
25°C
αVZ
ppm/°C
25°C
IZ = 100 μA
Full range
25°C
±50
0.9
1.2
7
0.2
2
IZ,min < IZ < 1 mA
1 mA < IZ < 15 mA
Reverse breakdown voltage
change with cathode
current change
DVZ
DIZ
Full range
25°C
mV
Full range
10
IZ = 1 mA,
f = 120 Hz,
IAC = 0.1 IZ
Reverse dynamic
impedance
ZZ
eN
25°C
25°C
0.5
93
Ω
IZ = 100 μA,
10 Hz ≤ f ≤ 10 kHz
Wideband noise
μVRMS
t = 1000 h,
TA = 25°C ± 0.1°C,
IZ = 100 μA
Long-term stability of
reverse breakdown voltage
120
ppm
mV
VHYST
Thermal hysteresis(1)
ΔTA = –40°C to 125°C
1.148
(1) Thermal hysteresis is defined as VZ,25°C (after cycling to –40°C) – VZ,25°C (after cycling to 125°C).
6
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TL4050-Q1
www.ti.com
SLOS588F –JUNE 2008–REVISED APRIL 2013
TL4050x50-Q1 ELECTRICAL CHARACTERISTICS
at extended temperature range, full range TA = –40°C to 125°C (unless otherwise noted)
TL4050A50-Q1
TL4050B50-Q1
TL4050C50-Q1
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
Reverse
breakdown
voltage
VZ
IZ = 100 μA
25°C
25°C
5
5
5
V
–5
5
30
74
90
–10
–35
10
35
74
90
–25
–50
25
50
74
90
Reverse
breakdown
voltage tolerance
ΔVZ
IZ = 100 μA
mV
Full
range
–30
25°C
56
56
56
Minimum
cathode current
IZ,min
μA
Full
range
IZ = 10 mA
IZ = 1 mA
25°C
25°C
25°C
±30
±20
±20
±30
±20
±20
±30
±20
±20
Average
temperature
coefficient of
reverse
αVZ
ppm/°C
breakdown
voltage
IZ = 100 μA
Full
range
±50
1
±50
1
±50
1
25°C
0.2
2
0.2
2
0.2
2
IZ,min < IZ < 1 mA
1 mA < IZ < 15 mA
Reverse
breakdown
voltage change
with cathode
current change
Full
range
1.4
8
1.4
8
1.4
8
DVZ
DIZ
mV
25°C
Full
range
12
12
12
IZ = 1 mA,
f = 120 Hz,
IAC = 0.1 IZ
Reverse dynamic
impedance
ZZ
eN
25°C
25°C
0.5
93
0.5
93
0.5
93
Ω
IZ = 100 μA,
10 Hz ≤ f ≤ 10 kHz
Wideband noise
μVRMS
Long-term
stability of
reverse
breakdown
voltage
t = 1000 h,
TA = 25°C ± 0.1°C,
IZ = 100 μA
120
1.4
120
1.4
120
1.4
ppm
mV
Thermal
VHYST
ΔTA = –40°C to 125°C
hysteresis(1)
(1) Thermal hysteresis is defined as VZ,25°C (after cycling to –40°C) – VZ,25°C (after cycling to 125°C).
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TL4050-Q1
SLOS588F –JUNE 2008–REVISED APRIL 2013
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TYPICAL CHARACTERISTICS
OUTPUT IMPEDANCE
OUTPUT IMPEDANCE
versus
versus
FREQUENCY
FREQUENCY
1000
100
10
1000
100
10
IZ = IZ(MIN) + 100 µA
IZ = 1 mA
VKA = 10 V
VKA = 10 V
VKA = 2.5 V
1
1
VKA = 2.5 V
0.1
0.1
100
1k
10k
100k
1M
100
1k
10k
100k
1M
Frequency – Hz
Figure 2.
Frequency – Hz
Figure 1.
REVERSE CHARACTERISTICS
AND
MINIMUM OPERATING CURRENT
NOISE VOLTAGE
versus
FREQUENCY
100
80
60
40
20
0
10
8
VKA = 2.5 V
VKA = 10 V
6
4
VKA = 10 V
2
VKA = 2.5 V
100
0
1
10
1k
10k
100k
0
1
2
3
4
5
6
7
8
9
10
Frequency – Hz
Reverse Voltage (V)
Figure 3.
Figure 4.
8
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TL4050-Q1
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SLOS588F –JUNE 2008–REVISED APRIL 2013
TYPICAL CHARACTERISTICS (continued)
LARGE SIGNAL PULSE RESPONSE
LARGE SIGNAL PULSE RESPONSE
6
5
20
15
10
5
VKA = 2.5 V
VKA = 10 V
4
3
2
1
0
0
-1
-5
-20
0
20
40
60
80
-100
0
100
Time – µs
Figure 6.
200
300
400
Time – µs
Figure 5.
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TL4050-Q1
SLOS588F –JUNE 2008–REVISED APRIL 2013
www.ti.com
APPLICATION INFORMATION
R
S
V
IN
TL4050-Q1
V
Z
1-Hz Rate
Figure 7. Start-Up Test Circuit
Output Capacitor
The TL4050-Q1 does not require an output capacitor across cathode and anode for stability. However, in an
application using an output bypass capacitor, the TL4050-Q1 is stable with all capacitive loads.
SOT-23-3 Pin Connections
There is a parasitic Schottky diode connected between pins 2 and 3 of the SOT-23-3 packaged device. Thus,
pin 3 of the SOT-23-3 package must be left floating or connected to pin 2.
Use With ADCs or DACs
The design of the TL4050x41-Q1 is as a cost-effective voltage reference, as required in 12-bit data-acquisition
systems. For 12-bit systems operating from 5-V supplies, such as the ADS7842 (see Figure 8), the TL4050x41-
Q1 (4.096 V) permits operation with an LSB of 1 mV.
ADS7842
0 V to V
REF
V
1 AIN0
2 AIN1
3 AIN2
4 AIN3
28
27
5-V Analog Supply
ANA
+
+
5 V
0.1 mF
10 mF
V
DIG
A1 26
A0 25
909
3.2-MHz Clock
BUSY Output
Write Input
V
5
6
7
8
CLK 24
REF
+
2.2 mF
AGND
DB11
DB10
23
22
21
BUSY
WR
TL4050B41-Q1
CS
9
DB9
RD 20
DB0 19
DB1 18
Read Input
10 DB8
11 DB7
12 DB6
13 DB5
14 DGND
DB2 17
DB3 16
DB4 15
Figure 8. Data-Acquisition Circuit With TL4050x41-Q1
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TL4050-Q1
www.ti.com
SLOS588F –JUNE 2008–REVISED APRIL 2013
Cathode and Load Currents
In a typical shunt-regulator configuration (see Figure 9), an external resistor, RS, connects between the supply
and the cathode of the TL4050-Q1. Proper choice of RS is essential, as RS sets the total current available to
supply the load (IL) and bias the TL4050-Q1 (IZ). In all cases, IZ must stay within a specified range for proper
operation of the reference. Taking into consideration one extreme in the variation of the load and supply voltage
(maximum IL and minimum VS), RS must be small enough to supply the minimum IZ required for operation of the
regulator, as given by data-sheet parameters. At the other extreme, maximum VS and minimum IL, RS must be
large enough to limit IZ to less than its maximum-rated value of 15 mA.
Equation 1 calculates RS:
ǒ
Ǔ
VS * VZ
RS +
(
)
IL ) IZ
(1)
V
S
R
S
I + I
Z
L
I
L
V
Z
I
Z
TL4050-Q1
Figure 9. Shunt Regulator
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
PACKAGING INFORMATION
Orderable Device
TL4050A50QDBZRQ1
TL4050A50QDCKRQ1
TL4050B25QDBZRQ1
TL4050B25QDCKRQ1
TL4050B41QDBZRQ1
TL4050B50QDBZRQ1
TL4050B50QDCKRQ1
TL4050C20QDBZRQ1
TL4050C50QDBZRQ1
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
-40 to 125
Top-Side Markings
Samples
Drawing
Qty
(1)
(2)
(3)
(4)
ACTIVE
SOT-23
SC70
DBZ
3
5
3
5
3
3
5
3
3
3000
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLGU
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
DCK
DBZ
DCK
DBZ
DBZ
DCK
DBZ
DBZ
3000
3000
3000
3000
3000
3000
3000
3000
Green (RoHS
& no Sb/Br)
7GU
SOT-23
SC70
Green (RoHS
& no Sb/Br)
TLHU
7HU
Green (RoHS
& no Sb/Br)
SOT-23
SOT-23
SC70
Green (RoHS
& no Sb/Br)
TMXU
TLJU
7JU
Green (RoHS
& no Sb/Br)
Green (RoHS
& no Sb/Br)
SOT-23
SOT-23
Green (RoHS
& no Sb/Br)
TMYU
TKZU
Green (RoHS
& no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Apr-2013
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
Multiple Top-Side Markings will be inside parentheses. Only one Top-Side Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a
continuation of the previous line and the two combined represent the entire Top-Side Marking for that device.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TL4050A50-Q1, TL4050B25-Q1, TL4050B41-Q1, TL4050B50-Q1, TL4050C50-Q1 :
Catalog: TL4050A50, TL4050B25, TL4050B41, TL4050B50, TL4050C50
•
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL4050A50QDBZRQ1
TL4050A50QDCKRQ1
TL4050B25QDBZRQ1
TL4050B25QDCKRQ1
TL4050B41QDBZRQ1
TL4050B50QDBZRQ1
TL4050B50QDCKRQ1
TL4050C20QDBZRQ1
TL4050C50QDBZRQ1
SOT-23
SC70
DBZ
DCK
DBZ
DCK
DBZ
DBZ
DCK
DBZ
DBZ
3
5
3
5
3
3
5
3
3
3000
3000
3000
3000
3000
3000
3000
3000
3000
179.0
179.0
179.0
179.0
179.0
179.0
179.0
179.0
179.0
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
8.4
3.15
2.2
2.95
2.5
1.22
1.2
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
SOT-23
SC70
3.15
2.2
2.95
2.5
1.22
1.2
SOT-23
SOT-23
SC70
3.15
3.15
2.2
2.95
2.95
2.5
1.22
1.22
1.2
SOT-23
SOT-23
3.15
3.15
2.95
2.95
1.22
1.22
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2013
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TL4050A50QDBZRQ1
TL4050A50QDCKRQ1
TL4050B25QDBZRQ1
TL4050B25QDCKRQ1
TL4050B41QDBZRQ1
TL4050B50QDBZRQ1
TL4050B50QDCKRQ1
TL4050C20QDBZRQ1
TL4050C50QDBZRQ1
SOT-23
SC70
DBZ
DCK
DBZ
DCK
DBZ
DBZ
DCK
DBZ
DBZ
3
5
3
5
3
3
5
3
3
3000
3000
3000
3000
3000
3000
3000
3000
3000
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
203.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
35.0
SOT-23
SC70
SOT-23
SOT-23
SC70
SOT-23
SOT-23
Pack Materials-Page 2
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