TL432LIBEDBZRQ1 [TI]
具有经优化的基准电流的汽车类可调节精密并联稳压器 | DBZ | 3 | -40 to 150;型号: | TL432LIBEDBZRQ1 |
厂家: | TEXAS INSTRUMENTS |
描述: | 具有经优化的基准电流的汽车类可调节精密并联稳压器 | DBZ | 3 | -40 to 150 稳压器 |
文件: | 总35页 (文件大小:1734K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TL431LI-Q1
TL432LI-Q1
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
具有经优化的基准电流的 TL431LI-Q1/TL432LI-Q1 可编程并联稳压器
1 特性
3 说明
1
•
符合汽车类 应用要求
TL431LI-Q1 是一款可调节三端并联稳压器,在适用的
汽车级、商用级和军用级温度范围内具有额定的热稳定
性。可以通过两个外部电阻器将输出电压设置为 Vref
(约为 2.495V)和 36V 之间的任意值。该器件的输出
阻抗典型值为 0.3Ω,其有源输出电路可提供快速导通
特性,从而可在板载稳压、可调节电源和开关电源等多
种 应用中完美地替代齐纳二极管。这款器件是业界通
用 TL431-Q1 的引脚对引脚替代品,具有经优化的 Iref
和 IIdev 性能。TL431LI-Q1 的较低 Iref 和 IIdev 值可帮助
设计人员提高系统精度和降低泄漏电流。TL432LI-Q1
具有与 TL431LI-Q1 完全相同的功能和电气规格,但是
具有不同的 DBZ 封装引脚排布。
•
具有符合 AEC-Q100 标准的下列特性:
–
器件温度等级 1:–40°C 至 +125°C 的环境工作
温度范围
–
器件温度等级 0:–40°C 至 +150°C 的环境工作
温度范围
•
25°C 下的基准电压容差
–
–
0.5%(B 级)
1%(A 级)
•
•
•
•
•
•
最低输出电压典型值:2.495V
可调输出电压:Vref 至 36V
等级 1 最大温漂 27mV
等级 0 最大温漂 34mV
输出阻抗典型值 0.3Ω
灌电流能力
TL431LI-Q1 具有 A、B 两个等级,初始容差(在
25°C 下)分别为 1% 和 0.5%。TL431LI-Q1 还具有两
个温度等级,即等级 1(在器件型号中用“Q”表示)和
等级 0(在器件型号中用“E”表示),最大环境工作温
度分别为 125°C 和 150°C。TL43xLI-Q1 等级 1 的额
定工作温度范围为 –40°C 至 125°C,等级 0 为 –40°C
至 150°C;其低输出温漂可确保在整个温度范围内保
持良好稳定性。
–
–
Imin = 0.6mA(最大值)
IKA = 15mA(最大值)
•
•
基准输入电流 IREF:0.4μA(最大值)
整个温度范围内的基准输入电流偏差 II(dev):0.3μA
(最大值)
2 应用
器件信息(1)
•
•
•
•
•
•
•
•
•
•
逆变器和电机控制
器件型号
TL43xLI-Q1
封装(引脚)
SOT-23 (3)
封装尺寸(标称值)
直流/直流转换器
LED 照明
2.90mm x 1.30mm
(1) 如需了解所有可用封装,请参阅数据表末尾的可订购产品附
录。
车载充电器 (OBC)
信息娱乐系统和仪表组
引擎管理传动器
变速器
动力转向
动力总成排气传感器
交流发电机起动器
简化原理图
Input
V
KA
I
KA
V
ref
1
本文档旨在为方便起见,提供有关 TI 产品中文版本的信息,以确认产品的概要。 有关适用的官方英文版本的最新信息,请访问 www.ti.com,其内容始终优先。 TI 不保证翻译的准确
性和有效性。 在实际设计之前,请务必参考最新版本的英文版本。
English Data Sheet: SNVSBA4
TL431LI-Q1
TL432LI-Q1
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
www.ti.com.cn
目录
9.3 Feature Description................................................. 12
9.4 Device Functional Modes........................................ 12
10 Applications and Implementation...................... 13
10.1 Application Information.......................................... 13
10.2 Typical Applications .............................................. 13
10.3 System Examples ................................................. 22
11 Power Supply Recommendations ..................... 25
12 Layout................................................................... 25
12.1 Layout Guidelines ................................................. 25
12.2 Layout Example .................................................... 25
13 器件和文档支持 ..................................................... 26
13.1 器件支持................................................................ 26
13.2 文档支持................................................................ 26
13.3 相关链接................................................................ 26
13.4 接收文档更新通知 ................................................. 26
13.5 支持资源................................................................ 26
13.6 商标....................................................................... 27
13.7 静电放电警告......................................................... 27
13.8 Glossary................................................................ 27
14 机械、封装和可订购信息....................................... 27
1
2
3
4
5
6
7
特性.......................................................................... 1
应用.......................................................................... 1
说明.......................................................................... 1
修订历史记录 ........................................................... 2
Device Comparison Table..................................... 3
Pin Configuration and Functions......................... 3
Specifications......................................................... 4
7.1 Absolute Maximum Ratings ...................................... 4
7.2 ESD Ratings.............................................................. 4
7.3 Recommended Operating Conditions....................... 4
7.4 Thermal Information.................................................. 4
7.5 Electrical Characteristics........................................... 5
7.6 Typical Characteristics.............................................. 6
Parameter Measurement Information .................. 9
8.1 Temperature Coefficient............................................ 9
8.2 Dynamic Impedance ............................................... 10
Detailed Description ............................................ 11
9.1 Overview ................................................................. 11
9.2 Functional Block Diagram ....................................... 11
8
9
4 修订历史记录
注:之前版本的页码可能与当前版本有所不同。
Changes from Original (May 2019) to Revision A
Page
•
将器件状态从“预告信息”更改为“生产数据”.............................................................................................................................. 1
2
Copyright © 2019, Texas Instruments Incorporated
TL431LI-Q1
TL432LI-Q1
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ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
5 Device Comparison Table
DEVICE PINOUT
INITIAL ACCURACY
OPERATING FREE-AIR TEMPERATURE (TA)
TL431LI-Q1
TL432LI-Q1
Q: -40°C to 125°C
E: -40°C to 150°C
A: 1% B: 0.5%
6 Pin Configuration and Functions
TL431LI-Q1 DBZ Package
3-Pin SOT-23
TL432LI-Q1 DBZ Package
3-Pin SOT-23
Top View
Top View
1
2
CATHODE
REF
1
2
REF
ANODE
3
ANODE
3
CATHODE
Pin Functions
PIN NUMBER
NAME
TL431LI-Q1
TL432LI-Q1
TYPE
DESCRIPTION
DBZ
DBZ
ANODE
3
1
2
3
2
1
O
I/O
I
Common pin, normally connected to ground
Shunt current/Voltage input
CATHODE
REF
Threshold relative to common anode
Copyright © 2019, Texas Instruments Incorporated
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TL432LI-Q1
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
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7 Specifications
7.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)(1)
MIN
MAX
37
UNIT
V
VKA
IKA
Cathode Voltage(2)
Continuos Cathode Current Range
Reference Input Current
–10
–5
18
mA
mA
C
II(ref)
TJ
10
Operating Junction Temperature Range
Storage Temperature Range
–40
–65
150
150
Tstg
C
(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended
Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values are with respect to ANODE, unless otherwise noted.
7.2 ESD Ratings
VALUE
±4000
±1000
UNIT
Human body model (HBM), per AEC Q100-002(1)
Charged-device model (CDM), per AEC Q100-011
Electrostatic
discharge
V(ESD)
V
(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification
7.3 Recommended Operating Conditions
MIN
MAX
36
UNIT
V
VKA
IKA
Cathode Voltage
VREF
0.6
Continuous Cathode Current Range
15
mA
C
TL43xLIxQ
TL43xLIxE
–40
–40
125
150
TA
Operating Free-Air Temperature(1)
C
(1) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ can affect reliability. Please see the Semiconductor and IC
Package Thermal Metrics Application Report for more information.
7.4 Thermal Information
TL43xLI
THERMAL METRIC(1)
DBZ
3 PINS
371.7
145.9
104.7
23.9
UNIT
RθJA
RθJC(top)
RθJB
ψJT
Junction-to-ambient thermal resistance
Junction-to-case (top) thermal resistance
Junction-to-boardthermal resistance
C/W
C/W
C/W
C/W
C/W
Junction-to-top characterization resistance
Junction-to-board characterization resistance
ψJB
102.9
(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics Application
Report.
4
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TL431LI-Q1
TL432LI-Q1
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ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
7.5 Electrical Characteristics
over recommended operating conditions, TA = 25°C (unless otherwise noted)
PARAMETER
TEST CIRCUIT
TEST CONDITIONS
TL43xLIAx devices
MIN TYP MAX
2470 2495 2520
2483 2495 2507
UNIT
mV
Vref
Reference Voltage
See 图 14
VKA = Vref, IKA = 1 mA
TL43xLIBx devices
TL43xLIxQ devices
mV
Deviation of reference
input voltage over full
temperature range
10
14
27
34
mV
VI(dev)
See 图 14
See 图 15
VKA = Vref, IKA = 1 mA
(1)
TL43xLIxE devices
mV
Ratio of change in
reference voltage to the
change in cathode
voltage
ΔVKA = 10 V - Vref
–1.4 –2.7
mV/V
ΔVref
ΔVKA
/
IKA = 1 mA
ΔVKA = 36 V - 10 V
–1
–2
mV/V
µA
Iref
Reference Input Current See 图 15
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
IKA = 1 mA, R1 = 10kΩ, R2 = ∞
0.2
0.4
Deviation of reference
input current over full
temperature range
II(dev)
See 图 15
See 图 14
0.1
0.3
µA
(1)
Minimum cathode
current for regulation
Imin
Ioff
|ZKA
VKA = Vref
0.6
1
mA
Off-state cathode
current
See 图 16
See 图 14
VKA = 36 V, Vref = 0
0.1
µA
(2)
|
Dynamic Impedance
VKA = Vref, IKA = 1 mA to 15 mA
0.3 0.75
Ω
(1) The deviation parameters VI(dev) and II(dev) are defined as the differences between the maximum and minimum values obtained over the
rated temperature range. For more details on VI(dev) and how it relates to the average temperature coefficient, see the Temperature
Coefficient section.
(2) The dynamic impedance is defined by |ZKA| = ΔVKA/ΔIKA. For more details on |ZKA| and how it relates to VKA, see the Temperature
Coefficient section.
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7.6 Typical Characteristics
Data at high and low temperatures are applicable only within the recommended operating free-air temperature
ranges of the various devices.
0.5
0.4
0.3
0.2
0.1
0
2520
2515
2510
2505
2500
2495
2490
2485
2480
2475
IKA = 1 mA
Vka = Vref
IKA = 1 mA
-50 -25 0 25 50 75 100 125 150
TA - Free-Air Temperature - °C
-50 -25
0
TA - Free-Air Temperature - °C
25 50 75 100 125 150
Book
图 2. Reference Current versus Free-Air Temperature
图 1. Reference Voltage versus Free-Air Temperature
0.064
15
VKA = 36 V
VREF = 0 V
VKA = Vref
TA = 25°C
12
0.056
0.048
0.04
9
6
0.032
0.024
0.016
0.008
0
3
0
-3
-50 -25
0
25 50 75 100 125 150
0
0.5
1
1.5
2
VKA - Cathode Voltage -V
2.5
3
TA - Free-Air Temperature - °C
图 4. Off-State Cathode Current
versus Free-Air Temperature
D003
图 3. Cathode Current versus Cathode Voltage
-0.35
75
200
160
120
80
VKA = 3 V to 36 V
Gain
Phase
-0.4
60
45
30
15
0
-0.45
-0.5
-0.55
-0.6
-0.65
-0.7
40
-0.75
-0.8
0
10M
-50 -25
0
25 50 75 100 125 150
Temperature (°C)
100
1k
10k 100k
f - Frequency - Hz
1M
D006
Gain
图 5. Ratio of Delta Reference Voltage to Delta Cathode
图 6. Small-Signal Voltage Amplification
Voltage versus Free-Air Temperature
versus Frequency
6
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TL432LI-Q1
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Typical Characteristics (接下页)
I
= 10 mA
= 25°C
100
50
KA
IKA = 1 mA
TA = 25°C
T
A
30
20
Output
232 Ω
10
5
I
KA
15 kΩ
3
2
9 µF
1
+
−
0.5
0.3
0.2
8.25 kΩ
0.1
GND
1k
10k 100k
f - Frequency - Hz
1M
图 7. Test Circuit for Voltage Amplification
图 8. Reference Impedance versus Frequency
6
1 kΩ
TA = 25èC
Input
Output
5
4
I
KA
50 Ω
3
Output
−
+
2
1
0
GND
-1
0
1
2
3
4
5
6
7
t - Time - ms
puls
图 10. Pulse Response
图 9. Test Circuit for Reference Impedance
15
12
9
220 Ω
A VKA = Vref
B VKA = 5 V
C VKA = 10 V
Output
Pulse
Stable Region
50 Ω
Generator
f = 100 kHz
6
GND
3
0
0.001
0.01
0.1
1
CL - Load Capacitance - µF
10
CTLo4p3y
The areas under the curves represent conditions that may cause the
device to oscillate. For curves B and C, R2 and V+ are adjusted to
establish the initial VKA and IKA conditions, with CL = 0. VBATT and CL
then are adjusted to determine the ranges of stability.
图 12. Stability Boundary Conditions for All TL431LI-Q1,
TL432LI-Q1 Devices
图 11. Test Circuit for Pulse Response
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TL431LI-Q1
TL432LI-Q1
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
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Typical Characteristics (接下页)
150 Ω
I
KA
+
−
V
BATT
C
L
TEST CIRCUIT FOR CURVE A
I
KA
R1 = 10 kΩ
150 Ω
C
L
+
−
R2
V
BATT
TEST CIRCUIT FOR CURVES B, C, AND D
图 13. Test Circuits for Stability Boundary Conditions
8
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TL431LI-Q1
TL432LI-Q1
www.ti.com.cn
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
8 Parameter Measurement Information
Input
V
KA
I
KA
V
ref
图 14. Test Circuit for VKA = Vref
Input
R1
V
KA
I
KA
I
ref
R2
V
ref
R1
R2
æ
ö
V
KA
= V
ref ç
1 +
+ I × R1
ref
÷
è
ø
图 15. Test Circuit for VKA > Vref
Input
V
KA
I
off
图 16. Test Circuit for Ioff
8.1 Temperature Coefficient
The deviation of the reference voltage, Vref, over the full temperature range is known as VI(dev). The parameter of
VI(dev) can be used to find the temperature coefficient of the device. The average full-range temperature
coefficient of the reference input voltage, αVref, is defined as:
αVref is positive or negative, depending on whether minimum Vref or maximum Vref, respectively, occurs at the
lower temperature. The full-range temperature coefficient is an average and therefore any subsection of the rated
operating temperature range can yield a value that is greater or less than the average. For more details on
temperature coefficient, refer to the Voltage Reference Selection Basics White Paper.
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TL432LI-Q1
ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
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8.2 Dynamic Impedance
DVKA
DIKA
ZKA
=
The dynamic impedance is defined as
. When the device is operating with two external resistors
DV
z' =
(see 图 15), the total dynamic impedance of the circuit is given by
I , which is approximately equal to
R1
≈
’
ZKA 1+
∆
÷
◊
R2
«
.
The VKA of the TL431LI-Q1 can be affected by the dynamic impedance. The TL431LI-Q1 test current Itest for VKA
is specified in the Electrical Characteristics. Any deviation from Itest can cause deviation on the output VKA. 图 17
shows the effect of the dynamic impedance on the VKA
.
Itest
IKA
IKA(min)
0
VKA (V)
图 17. Dynamic Impedance
10
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TL432LI-Q1
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ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
9 Detailed Description
9.1 Overview
This standard device has proven ubiquity and versatility across a wide range of applications, ranging from power
to signal path. This is due to its key components containing an accurate voltage reference and op amp, which
are very fundamental analog building blocks. TL43xLI-Q1 is used in conjunction with its key components to
behave as a single voltage reference, error amplifier, voltage clamp or comparator with integrated reference.
TL43xLI-Q1 can be operated and adjusted to cathode voltages from 2.495 V to 36 V, making this part optimal for
a wide range of end equipments in industrial, auto, telecom and computing. In order for this device to behave as
a shunt regulator or error amplifier, >0.6mA (Imin(max)) must be supplied in to the cathode pin. Under this
condition, feedback can be applied from the Cathode and Ref pins to create a replica of the internal reference
voltage.
Various reference voltage options can be purchased with initial tolerances (at 25°C) of 0.5% (denoted by B), and
1% (denoted by A). TL431LI-Q1 and TL432LI-Q1 are both functionally the same, but have different pinout
options.
9.2 Functional Block Diagram
CATHODE
+
_
REF
V
ref
ANODE
图 18. Equivalent Schematic
CATHODE
REF
ANODE
图 19. Detailed Schematic
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9.3 Feature Description
TL43xLI-Q1 consists of an internal reference and amplifier that outputs a sink current based on the difference
between the reference pin and the virtual internal pin. The sink current is produced by the internal Darlington
pair, shown in 图 19. A Darlington pair is used for this device to be able to sink a maximum current of 15 mA.
When operated with enough voltage headroom (≥ 2.495 V) and cathode current (IKA), TL43xLI-Q1 forces the
reference pin to 2.495 V. However, the reference pin can not be left floating, as it needs IREF ≥ 0.4 µA (see the
Specifications). This is because the reference pin is driven into an npn, which needs base current in order
operate properly.
When feedback is applied from the Cathode and Reference pins, TL43xLI-Q1 behaves as a Zener diode (refer to
图 23 for a circuit example), regulating to a constant voltage dependent on current being supplied into the
cathode. This is due to the internal amplifier and reference entering the proper operating regions. The same
amount of current needed in the above feedback situation must be applied to this device in open loop, servo, or
error amplifying implementations for it to be in the proper linear region giving TL43xLI-Q1 enough gain.
Unlike many linear regulators, TL43xLI-Q1 is internally compensated to be stable without an output capacitor
between the cathode and anode. However, if it is desired to use an output capacitor, 图 12 can be used as a
guide to assist in choosing the correct capacitor to maintain stability.
9.4 Device Functional Modes
9.4.1 Open Loop (Comparator)
When the cathode/output voltage or current of TL43xLI-Q1 is not being fed back to the reference/input pin in any
form, this device is operating in open loop. With proper cathode current (Ika) applied to this device, TL43xLI-Q1
has the characteristics shown in 图 18. With such high gain in this configuration, TL43xLI-Q1 is typically used as
a comparator. Since the reference is integrated, TL43xLI-Q1 is the preferred choice when users are trying to
monitor a certain level of a single signal. Refer to the Using the TL431 as a Voltage Comparator Application
Report for more details on open loop comparator applications on the TL431LI-Q1.
9.4.2 Closed Loop
When the cathode/output voltage or current of TL43xLI-Q1 is being fed back to the reference/input pin in any
form, this device is operating in closed loop. The majority of applications involving TL43xLI-Q1 use it in this
manner to regulate a fixed voltage or current. The feedback enables this device to behave as an error amplifier,
computing a portion of the output voltage and adjusting it to maintain the desired regulation. This is done by
relating the output voltage back to the reference pin in a manner to make it equal to the internal reference
voltage, which can be accomplished through resistive or direct feedback.
12
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TL431LI-Q1
TL432LI-Q1
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ZHCSJO9A –MAY 2019–REVISED NOVEMBER 2019
10 Applications and Implementation
注
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
10.1 Application Information
As this device has many applications and setups, there are many situations that this data sheet can not
characterize in detail. The linked application notes help the designer make the best choices when using this part.
Designing with the Improved TL431LI Application Note provides a deeper understanding of this accuracy of the
device in a flyback optocoupler application. Setting the Shunt Voltage on an Adjustable Shunt Regulator
Application Note assists designers in setting the shunt voltage to achieve optimum accuracy for this device.
10.2 Typical Applications
10.2.1 Comparator With Integrated Reference
Vsup
Rsup
Vout
CATHODE
R1
VL
RIN
REF
V
IN
+
R2
2.5V
ANODE
图 20. Comparator Application Schematic
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Typical Applications (接下页)
10.2.2 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 1. Design Parameters
DESIGN PARAMETER
Input Voltage Range
Input Resistance
EXAMPLE VALUE
0 V to 5 V
10 kΩ
Supply Voltage
24 V
Cathode Current (Ik)
Output Voltage Level
Logic Input Thresholds VIH/VIL
5 mA
~2 V – VSUP
VL
10.2.3 Detailed Design Procedure
When using TL43xLI-Q1 as a comparator with reference, determine the following:
•
•
•
•
Input voltage range
Reference voltage accuracy
Output logic input high and low level thresholds
Current source resistance
10.2.3.1 Basic Operation
In the configuration shown in 图 20, TL43xLI-Q1 behaves as a comparator, comparing the VREF pin voltage to the
internal virtual reference voltage. When provided a proper cathode current (IK), TL43xLI-Q1 has enough open
loop gain to provide a quick response. This can be seen in 图 21 where the RSUP = 10 kΩ (IKA = 500 µA) situation
responds much slower than RSUP = 1 kΩ (IKA = 5 mA). With the TL43xLI-Q1 max operating current (IMIN) being 1
mA, operation below that can result in low gain, leading to a slow response.
10.2.3.1.1 Overdrive
Slow or inaccurate responses can also occur when the reference pin is not provided enough overdrive voltage.
This is the amount of voltage that is higher than the internal virtual reference. The internal virtual reference
voltage is within the range of 2.495 V ±(0.5% or 1.0%), depending on which version is being used. The more
overdrive voltage provided, the faster the TL43xLI-Q1 responds.
For applications where TL43xLI-Q1 is being used as a comparator, it is best to set the trip point to greater than
the positive expected error (that is +1.0% for the A version). For fast response, setting the trip point to >10% of
the internal VREF suffices.
For minimal voltage drop or difference from Vin to the ref pin, TI recommends to use an input resistor <10 kΩ to
provide Iref.
14
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10.2.3.2 Output Voltage and Logic Input Level
For TL43xLI-Q1 to properly be used as a comparator, the logic output must be readable by the receiving logic
device. This is accomplished by knowing the input high and low level threshold voltage levels, typically denoted
by VIH and VIL.
As seen in 图 21, the output low level voltage of the TL43xLI in open-loop/comparator mode is approximately 2
V, which is typically sufficient for 5 V supplied logic. However, this does not work for 3.3 V and 1.8 V supplied
logic. To accommodate this, a resistive divider can be tied to the output to attenuate the output voltage to a
voltage legible to the receiving low voltage logic device.
The output high voltage of the TL43xLI is equal to VSUP due to TL43xLI-Q1 being open-collector. If VSUP is much
higher than the maximum input voltage tolerance of the maximum logic, the output must be attenuated to
accommodate the reliability of the outgoing logic.
When using a resistive divider on the output, make sure the sum of the resistive divider (R1 and R2 in 图 20) is
much greater than RSUP to not interfere with the ability of the TL43xLI to pull close to VSUP when turning off.
10.2.3.2.1 Input Resistance
TL43xLI-Q1 requires an input resistance in this application to source the reference current (IREF) needed from
this device to be in the proper operating regions while turning on. The actual voltage seen at the ref pin is VREF
=
VIN - IREFRIN. Because IREF can be as high as 0.4 µA, it is recommended to use a resistance small enough that
mitigates the error that IREF creates from VIN.
10.2.4 Application Curves
5.5
5
4.5
4
3.5
3
2.5
2
1.5
1
Vin
Vka(Rsup=10kW)
Vka(Rsup=1kW)
0.5
0
-0.5
-0.001
-0.0006
-0.0002
0.0002
0.0006
0.001
Time (s)
D001
图 21. Output Response With Various Cathode Currents
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10.2.5 Precision LED Lighting Current Sink Regulator
VCC
VCC
R1 =
IOUT
hFE
IKA
VREF
RS
IOUT
=
VCC
IOUT
R1
TL431LI-Q1
RS
GND
图 22. LED Lighting Current Sink Regulator
10.2.5.1 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 2. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Supply Voltage (VI(BATT)
)
5 V
Sink Current (IO)
100mA
5 mA
Cathode Current (Ik)
10.2.5.2 Detailed Design Procedure
When using the TL43xLI-Q1 as a constant current sink, determine the following:
•
•
•
Output current range
Output current accuracy
Power consumption for TL43xLI-Q1
10.2.5.2.1 Basic Operation
In the configuration shown, TL43xLI-Q1 acts as a control component within a feedback loop of the constant
current sink. Working with an external passing component such as a BJT, TL43xLI-Q1 provides precision current
sink with accuracy set by itself and the sense resistor RS. The LEDs are lit based on the desired current sink and
regulated for accurate brightness and color.
16
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10.2.5.2.1.1 Output Current Range and Accuracy
The output current range of the circuit is determined by the equation shown in the configuration. Keep in mind
that the VREF equals to 2.495 V. When choosing the sense resistor RS, it needs to generate 2.495 V for the
TL43xLI-Q1 when IO reaches the target current. If the overhead voltage of 2.495 V is not acceptable, consider
lower voltage reference devices such as the TLV43x-Q1 or TLVH43x-Q1.
The output current accuracy is determined by both the accuracy of TL43xLI-Q1 chosen, as well as the accuracy
of the sense resistor RS. The internal virtual reference voltage of TL43xLI-Q1 is within the range of 2.495 V
±(0.5% or 1.0%), depending on which version is being used. Another consideration for the output current
accuracy is the temperature coefficient of the TL43xLI-Q1 and RS. Refer to the Electrical Characteristics of these
parameters.
10.2.5.2.2 Power Consumption
For TL43xLI-Q1 to properly be used as a control component in this circuit, the minimum operating current needs
to be reached. This is accomplished by setting the external biasing resistor in series with the TL43xLI-Q1.
For TL43xLI, the minimum operating current is 0.6 mA and with margin consideration, most of the designs set
this current to be higher than 0.6 mA. To achieve lower power consumption, consider devices such as the
ATL43x-Q1 and ATL43xLI-Q1.
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10.2.6 Shunt Regulator/Reference
RSUP
R1
R2
V
SUP
V
O
=
1 +
V
)
ref
(
R1
0.1%
CATHODE
REF
V
ref
TL431LI-Q1
CL
ANODE
R2
0.1%
图 23. Shunt Regulator Schematic
10.2.6.1 Design Requirements
For this design example, use the parameters listed in 表 1 as the input parameters.
表 3. Design Parameters
DESIGN PARAMETER
Reference Initial Accuracy
Supply Voltage
EXAMPLE VALUE
1.0%
24 V
Cathode Current (Ik)
5 mA
Output Voltage Level
2.495 V–36 V
2 µF
Load Capacitance
Feedback Resistor Values and Accuracy (R1 and R2)
10 kΩ
10.2.6.2 Detailed Design Procedure
When using TL43xLI-Q1 as a shunt regulator, determine the following:
•
•
•
•
•
•
Input voltage range
Temperature range
Total accuracy
Cathode current
Reference initial accuracy
Output capacitance
10.2.6.2.1 Programming Output/Cathode Voltage
To program the cathode voltage to a regulated voltage, a resistive bridge must be shunted between the cathode
and anode pins with the mid point tied to the reference pin. This can be seen in 图 23, with R1 and R2 being the
resistive bridge. The cathode/output voltage in the shunt regulator configuration can be approximated by the
equation shown in 图 23. The cathode voltage can be more accurate determined by taking in to account the
cathode current:
Vo=(1+R1/R2)VREF-IREFR1
(1)
For this equation to be valid, TL43xLI-Q1 must be fully biased so that it has enough open loop gain to mitigate
any gain error. This can be done by meeting the Imin spec denoted in the Specifications.
18
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10.2.6.2.2 Total Accuracy
When programming the output above unity gain (VKA=VREF), TL43xLI-Q1 is susceptible to other errors that can
effect the overall accuracy beyond VREF. These errors include:
•
•
•
•
R1 and R2 accuracies
VI(dev): Change in reference voltage over temperature
ΔVREF / ΔVKA: Change in reference voltage to the change in cathode voltage
|zKA| - Dynamic impedance, causing a change in cathode voltage with cathode current
Worst case cathode voltage can be determined taking all of the variables in to account. The Setting the Shunt
Voltage on an Adjustable Shunt Regulator Application Note assists designers in setting the shunt voltage to
achieve optimum accuracy for this device.
10.2.6.2.3 Stability
Though TL43xLI-Q1 is stable with no capacitive load, the device that receives the output voltage of the shunt
regulator can presents a capacitive load that is within the TL43xLI-Q1 region of stability, shown in 图 12. Also,
designers can use capacitive loads to improve the transient response or for power supply decoupling. When
using additional capacitance between Cathode and Anode, refer to 图 12. Also, the Understanding Stability
Boundary Conditions Charts in TL431, TL432 Data Sheet Application Note provides a deeper understanding of
this devices stability characteristics and aids the user in making the right choices when choosing a load
capacitor.
10.2.6.2.4 Start-up Time
As shown in 图 24, TL43xLI-Q1 has a fast response up to approximately 2 V and then slowly charges to the
programmed value. This is due to the compensation capacitance (shown in 图 19) the TL43xLI-Q1 has to meet
the stability criteria. Despite the secondary delay, TL43xLI-Q1 still has a fast response suitable for many clamp
applications.
10.2.6.3 Application Curves
27
Vsup
24
Vka=Vref
R1=10kW & R2=10kW
R1=38kW & R2=10kW
21
18
15
12
9
6
3
0
-3
-6
-5E-6
-3E-6
-1E-6
1E-6
3E-6
5E-6
Time (s)
D001
图 24. TL43xLI-Q1 Start-Up Response
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10.2.7 Isolated Flyback with Optocoupler
VOUT
VIN AC
VDD
VPC
VSC
VDD
HV
UCC28740
PWM Controller
UCC24636
SR Controller
VS
FB
DRV
DRV
TBLK
CS
TL431LI-Q1
GND
图 25. Isolated Flyback with Optocoupler
10.2.7.1 Design Requirements
The TL431LI-Q1 is used in the feedback network on the secondary side in an isolated flyback with optocoupler
design. 图 25 shows the simplified flyback converter with the TL431LI-Q1. For this design example, use the
parameters in 表 4 as the input parameters. In this example, a simplified design procedure will be discussed. The
compensation network for the feedback network is beyond the scope of this section. Details on compensation
network can be found in the Compensation Design with TL431 for UCC28600 Application Report.
表 4. Design Parameters
DESIGN PARAMETER
Voltage Output
EXAMPLE VALUE
15 V
Secondary Side Feedback Loop Accuracy
< 3%
10.2.7.2 Detailed Design Procedure
The goal of this design is to design a high accuracy feedback network to meet 3% VOUT accuracy requirements
over the full temperature range. To meet the design requirements, the total secondary side feedback loop error
has to be below 3%. To meet these requirements, it is necessary to take full advantage of the improved
temperature drift, Iref(min), and II(dev) of the TL431LI-Q1.
VOUT
Rs
Error|Iref
R1 = 40.2 kΩ
IREF
TL431LI-Q1
Error|Vref
R2 = 8.06 kΩ
图 26. Feedback Quiescent Current
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10.2.7.2.1 TL431 Feedback Loop Error Calculation
图 26 shows the simplified version of the feedback network. The accuracy of the output voltage is dependent on
the regulation voltage accuracy of the TL431LI-Q1. A simplified VOUT can be seen in 公式 2, but this equation
does not include errors that deviates the output.
R1
VOUT = V ì(1+
) + R1ì(Iref
40.2kW
)
ref
R2
VOUT = (2.495 V)ì(1+
VOUT = 14.955V
) + 40.2kW ì(0.4mA)
8.06kW
(2)
The primary sources of error are the Error|Vref and Error|Iref. The Error|Vref primarily consists of the errors that
affect the internal bandgap voltage reference of the TL431LI-Q1. This consists of errors from the initial accuracy,
temperature drift, ratio of change in reference voltage to the change in cathode voltage, and dynamic impedance.
The benefit of the TL431LI-Q1 is its low temperature drift, VI(dev), which allows the Vref to be more accurate
across the full temperature range compared to typical TL431LI-Q1 devices. 公式 3 shows a simplified worst case
Vref with initial accuracy and temperature drift.
V (Error |Vref ) = V ì(1+Initial Accuracy) + VI(dev) +...
ref
ref
V (Error |Vref ) = 2.495V ì(1+ 0.5%) +17mV +...
ref
V (Error |Vref ) ö 2.524V
ref
(3)
The Error|Iref in 图 26 is dependent on the Iref and II(dev) along with R1. The TL431LI-Q1 has improved Iref and
II(dev) which allows the values of the resistor R1 to be increased to save power. Typically optocoupler feedback
design requires the Iref to be taken into account when doing VOUT calculations but the error comes from the
deviation from the maximum to typical value of Iref. In addition to this, the II(dev) is the temperature deviation on
the Iref current which affects the overall reference current into the TL431LI-Q1. 公式 4 shows the VOUT of the
TL431LI-Q1 for 图 26, which includes the improved Iref and II(dev). The VOUT equation assumes that the resistors
R1 and R2 have a 0.5% accuracy tolerance.
R1
VOUT(Error |Iref ) = Vref (Error |Vref ) ì(1+
) +R1ì(Iref +II(dev))
R2
40.2kW ì(1+ 0.5%)
8.06kW ì(1- 0.5%)
VOUT(Error |Iref ) = (2.495 V ì(1+ 0.5%) + 0.017 V)ì(1+
)
+40.2kW ì(1+ 0.5%)ì(0.4mA + 0.3mA)
VOUT = 15.270 V
(4)
Comparing the calculated VOUT without and without error, the expected worst case max error is 2.1% which
meets the 3% error target.
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10.3 System Examples
V
I(BATT)
R
2N222
(see Note A)
2N222
30 Ω
4.7 kΩ
0.01 µF
TL431LI-Q1
V
O
R1
0.1%
R2
R1
R2
æ
ö
V
=
1 +
V
ref
O
ç
÷
0.1%
è
ø
R should provide cathode current ≥0.6 mA to the TL431LI-Q1 at minimum V(BATT)
.
图 27. Precision High-Current Series Regulator
V
I(BATT)
IN
OUT
uA7805
V
O
Common
TL431LI-Q1
R1
R2
R1
V
1
V
ref
=
+
(
(
O
+
Vref 5 V
Minimum V
=
O
R2
图 28. Output Control of a Three-Terminal Fixed Regulator
V
V
O
I(BATT)
R1
R2
R1
V
1
V
(
ref
=
+
(
O
TL431LI-Q1
R2
图 29. High-Current Shunt Regulator
V
I(BATT)
V
O
R1
TL431LI-Q1
C
(see Note A)
R2
Refer to the stability boundary conditions in 图 12 to determine allowable values for C.
图 30. Crowbar Circuit
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System Examples (接下页)
IN
OUT
LM317
Adjust
V
V ≈5 V, 1.5 A
O
I(BATT)
8.2 kΩ
243 Ω
0.1%
TL431LI-Q1
243 Ω
0.1%
图 31. Precision 5-V, 1.5-A Regulator
V
V ≈5 V
O
I(BATT)
R
b
(see Note A)
27.4 kΩ
0.1%
TL431LI-Q1
27.4 kΩ
0.1%
Rb should provide cathode current ≥0.6 mA to the TL431LI-Q1.
图 32. Efficient 5-V Low-Dropout (LDO) Regulator Configuration
12 V
V
CC
6.8 kΩ
10 kΩ
5 V
−
10 kΩ
+
0.1%
TL598
X
Not
TL431LI-Q1
Used
10 kΩ
0.1%
Feedback
图 33. PWM Converter With Reference
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System Examples (接下页)
R3
(see Note A)
V
I(BATT)
R4
R1B
R2B
R1A
(see Note A)
R1B
R2B
Low Limit = 1 +
High Limit = 1 +
Vref
TL431LI-Q1
R1A
R2A
Vref
LED on When Low Limit < V
< High Limit
I(BATT)
R2A
Select R3 and R4 to provide the desired LED intensity and cathode current ≥0.6 mA to the TL431LI-Q1 at the
available VI(BATT)
.
图 34. Voltage Monitor
650
12 V
R
2 k
TL431LI-Q1
C
ꢀ
ꢁ
12 V
12 V – V
On
Delay = R × C × ln
!
!
Off
ref
"
#
图 35. Delay Timer
R
CL
I
O
0.1%
Vref
RCL
V
I(BATT)
Iout
R1
+ IKA
=
=
VI(BATT
R1
)
TL431LI-Q1
I
O
I
+
KA
h
FE
图 36. Precision Current Limiter
V
I(BATT)
I
O
Vref
I
=
O
RS
TL431LI-Q1
R
S
0.1%
图 37. Precision Constant-Current Sink
24
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11 Power Supply Recommendations
When using TL43xLI-Q1 as a Linear Regulator to supply a load, designers typically use a bypass capacitor on
the output/cathode pin. When doing this, be sure that the capacitance is within the stability criteria shown in 图
12.
To not exceed the maximum cathode current, be sure that the supply voltage is current limited. Also, be sure to
limit the current being driven into the Ref pin, as not to exceed the absolute maximum rating.
For applications shunting high currents, pay attention to the cathode and anode trace lengths, adjusting the width
of the traces to have the proper current density.
12 Layout
12.1 Layout Guidelines
Bypass capacitors must be placed as close to the part as possible. Current-carrying traces need to have widths
appropriate for the amount of current they are carrying; in the case of the TL43xLI-Q1, these currents are low.
12.2 Layout Example
TL432LI-Q1 - DBZ
(TOP VIEW)
Rref
REF
Vin
1
2
ANODE
3
Rsup
CATHODE
GND
Vsup
CL
GND
图 38. DBZ Layout Example
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13 器件和文档支持
13.1 器件支持
13.1.1 器件命名规则
TI 通过分配后缀和前缀来区分 TL43xLI-Q1 系列的所有组合。更多详细信息和可以订购的组合请参见“封装选项附
录”。
TL431LI X X XXX X XX
Initial
Accuracy
Operating Free-Air Package
Type
Package
Quantity Qualification
Product
1: TL431LI
Temperature
B: 0.5%
Q: -40°C to 125°C
DBZ: SOT-23-3
R: Tape & Reel
Q1: AEC-Q100
2: TL432LI*
A: 1%
E: -40°C to 150°C
*(Cathode and REF
pins are switched)
13.2 文档支持
13.2.1 相关文档
请参阅如下相关文档:
•
•
•
德州仪器 (TI),《了解 TL431/TL432 数据表中的稳定性边界条件图》
德州仪器 (TI),《在可调节并联稳压器上设置并联电压》
德州仪器 (TI),《使用改进的 TL431LI 进行设计》
13.3 相关链接
下表列出了快速访问链接。类别包括技术文档、支持和社区资源、工具和软件,以及立即订购快速访问。
表 5. 相关链接
器件
产品文件夹
单击此处
单击此处
立即订购
单击此处
单击此处
技术文档
单击此处
单击此处
工具与软件
单击此处
单击此处
支持和社区
单击此处
单击此处
TL431LI-Q1
TL432LI-Q1
13.4 接收文档更新通知
要接收文档更新通知,请导航至 ti.com. 上的器件产品文件夹。单击右上角的通知我进行注册,即可每周接收产品
信息更改摘要。有关更改的详细信息,请查看任何已修订文档中包含的修订历史记录。
13.5 支持资源
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
26
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13.6 商标
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
13.7 静电放电警告
ESD 可能会损坏该集成电路。德州仪器 (TI) 建议通过适当的预防措施处理所有集成电路。如果不遵守正确的处理措施和安装程序 , 可
能会损坏集成电路。
ESD 的损坏小至导致微小的性能降级 , 大至整个器件故障。 精密的集成电路可能更容易受到损坏 , 这是因为非常细微的参数更改都可
能会导致器件与其发布的规格不相符。
13.8 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
14 机械、封装和可订购信息
以下页面包含机械、封装和可订购信息。这些信息是指定器件的最新可用数据。数据如有变更,恕不另行通知,且
不会对此文档进行修订。如需获取此数据表的浏览器版本,请查阅左侧的导航栏。
版权 © 2019, Texas Instruments Incorporated
27
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TL431LIAEDBZRQ1
TL431LIAQDBZRQ1
TL431LIBEDBZRQ1
TL431LIBQDBZRQ1
TL432LIAEDBZRQ1
TL432LIAQDBZRQ1
TL432LIBEDBZRQ1
TL432LIBQDBZRQ1
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3
3
3
3
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
3000 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
-40 to 150
-40 to 125
-40 to 150
-40 to 125
-40 to 150
-40 to 125
-40 to 150
-40 to 125
23CP
22TP
23DP
22UP
23EP
22VP
23FP
22WP
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TL431LIAEDBZRQ1
TL431LIAQDBZRQ1
TL431LIBEDBZRQ1
TL431LIBQDBZRQ1
TL432LIAEDBZRQ1
TL432LIAQDBZRQ1
TL432LIBEDBZRQ1
TL432LIBQDBZRQ1
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3
3
3
3
3000
3000
3000
3000
3000
3000
3000
3000
178.0
178.0
178.0
178.0
178.0
178.0
178.0
178.0
9.0
9.0
9.0
9.0
9.0
9.0
9.0
9.0
3.15
3.15
3.15
3.15
3.15
3.15
3.15
3.15
2.77
2.77
2.77
2.77
2.77
2.77
2.77
2.77
1.22
1.22
1.22
1.22
1.22
1.22
1.22
1.22
4.0
4.0
4.0
4.0
4.0
4.0
4.0
4.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
8.0
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Q3
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Apr-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TL431LIAEDBZRQ1
TL431LIAQDBZRQ1
TL431LIBEDBZRQ1
TL431LIBQDBZRQ1
TL432LIAEDBZRQ1
TL432LIAQDBZRQ1
TL432LIBEDBZRQ1
TL432LIBQDBZRQ1
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
SOT-23
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
DBZ
3
3
3
3
3
3
3
3
3000
3000
3000
3000
3000
3000
3000
3000
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
180.0
18.0
18.0
18.0
18.0
18.0
18.0
18.0
18.0
Pack Materials-Page 2
PACKAGE OUTLINE
DBZ0003A
SOT-23 - 1.12 mm max height
S
C
A
L
E
4
.
0
0
0
SMALL OUTLINE TRANSISTOR
C
2.64
2.10
1.12 MAX
1.4
1.2
B
A
0.1 C
PIN 1
INDEX AREA
1
0.95
(0.125)
3.04
2.80
1.9
3
(0.15)
NOTE 4
2
0.5
0.3
3X
0.10
0.01
(0.95)
TYP
0.2
C A B
0.25
GAGE PLANE
0.20
0.08
TYP
0.6
0.2
TYP
SEATING PLANE
0 -8 TYP
4214838/D 03/2023
NOTES:
1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing
per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. Reference JEDEC registration TO-236, except minimum foot length.
4. Support pin may differ or may not be present.
www.ti.com
EXAMPLE BOARD LAYOUT
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X (0.95)
2
(R0.05) TYP
(2.1)
LAND PATTERN EXAMPLE
SCALE:15X
SOLDER MASK
OPENING
SOLDER MASK
OPENING
METAL UNDER
SOLDER MASK
METAL
0.07 MIN
ALL AROUND
0.07 MAX
ALL AROUND
NON SOLDER MASK
DEFINED
SOLDER MASK
DEFINED
(PREFERRED)
SOLDER MASK DETAILS
4214838/D 03/2023
NOTES: (continued)
4. Publication IPC-7351 may have alternate designs.
5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.
www.ti.com
EXAMPLE STENCIL DESIGN
DBZ0003A
SOT-23 - 1.12 mm max height
SMALL OUTLINE TRANSISTOR
PKG
3X (1.3)
1
3X (0.6)
SYMM
3
2X(0.95)
2
(R0.05) TYP
(2.1)
SOLDER PASTE EXAMPLE
BASED ON 0.125 THICK STENCIL
SCALE:15X
4214838/D 03/2023
NOTES: (continued)
6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate
design recommendations.
7. Board assembly site may have different recommendations for stencil design.
www.ti.com
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