TL750M05CKTTR [TI]
LOW-DROPOUT VOLTAGE REGULATORS; 低压差稳压器
| 型号： | TL750M05CKTTR |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LOW-DROPOUT VOLTAGE REGULATORS |
| 文件： | 总20页 (文件大小：690K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
FEATURES
•
Very Low Dropout Voltage, Less Than 0.6 V
at 750 mA
•
•
•
•
60-V Load-Dump Protection
Overvoltage Protection
•
•
Low Quiescent Current
Internal Thermal-Overload Protection
Internal Overcurrent-Limiting Circuitry
TTL- and CMOS-Compatible Enable on
TL751M Series
TL750M...KC PACKAGE(1)
(TOP VIEW)
TL750M...KTP PACKAGE(1)
(TOP VIEW)
OUTPUT
COMMON
INPUT
OUTPUT
COMMON
INPUT
TL750M...KTE PACKAGE(1)
(TOP VIEW)
TL750M...KTT PACKAGE(1)
(TOP VIEW)
OUTPUT
COMMON
INPUT
OUTPUT
COMMON
INPUT
TL751M...KTG PACKAGE(1)
(TOP VIEW)
NC
OUTPUT
COMMON
INPUT
ENABLE
NC - No inter nal connection
(1) The common terminal is in electrical contact with the mounting base.
DESCRIPTION/ORDERING INFORMATION
The TL750M and TL751M series are low-dropout positive voltage regulators specifically designed for
battery-powered systems. The TL750M and TL751M series incorporate onboard overvoltage and current-limiting
protection circuitry to protect the devices and the regulated system. Both series are fully protected against 60-V
load-dump and reverse-battery conditions. Extremely low quiescent current, even during full-load conditions,
makes the TL750M and TL751M series ideal for standby power systems.
The TL750M and TL751M series offers 5-V, 8-V, 10-V, and 12-V options. The TL751M series has the addition of
an enable (ENABLE) input. The ENABLE input gives the designer complete control over power up, allowing
sequential power up or emergency shutdown. When ENABLE is high, the regulator output is placed in the
high-impedance state. The ENABLE input is TTL and CMOS compatible.
The TL750MxxC and TL751MxxC are characterized for operation over the virtual junction temperature range
0°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PowerFLEX is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 1988–2006, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
ORDERING INFORMATION
TJ
VO TYP
PACKAGE(1)
ORDERABLE PART NUMBER(2)
TOP-SIDE MARKING
TL750M05C
TL751M05C
750M05C
PowerFLEX™ – KTE
PowerFLEX – KTG
PowerFLEX – KTP
TO-220 – KC
Reel of 2000
Reel of 2000
Reel of 3000
Tube of 50
Reel of 500
Tube of 50
Tube of 50
TL750M05CKTER
TL751M05CKTGR
TL750M05CKTPR
TL750M05CKC
5 V
0°C to 125°C
TL750M05C
TL750M05C
TL750M10C
TL750M12C
TO-263 – KTT
TL750M05CKTTR
TL750M10CKC
10 V
12 V
TO-220 – KC
TO-220 – KC
TL750M12CKC
(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2) For the most current ordering information, see the Package Option Addendum at the end of this data sheet.
TL751Mxx FUNCTIONAL BLOCK DIAGRAM
INPUT
Current
Limiting
ENABLE
Enable
28 V
_
+
OUTPUT
Bandgap
Overvoltage/
Thermal
Shutdown
COMMON
DEVICE COMPONENT COUNT
Transistors
Diodes
46
14
44
4
Resistors
Capacitors
JFETs
1
Tunnels (emitter R)
2
2
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
Absolute Maximum Ratings(1)
over virtual junction temperature range (unless otherwise noted)
MIN
MAX UNIT
Continuous input voltage
26
60
V
V
V
V
Transient input voltage (see Figure 3)
Continuous reverse input voltage
–15
–50
22
Transient reverse input voltage
t = 100 ms
KC package
KTE package
KTG package
KTP package
KTT package
23
θJA
Package thermal impedance(2)(3)
23 °C/W
28
25.3
TJ
Virtual junction temperature range
Lead temperature
0
150
260
150
°C
°C
°C
1,6 mm (1/16 in) from case for 10 s
Tstg
Storage temperature range
–65
(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating
conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient
temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. Due to variation in
individual device electrical characteristics and thermal resistance, the built-in thermal-overload protection may be activated at power
levels slightly above or below the rated dissipation.
(3) The package thermal impedance is calculated in accordance with JESD 51.
Recommended Operating Conditions
MIN
6
MAX
26
UNIT
TL75xM05
TL75xM08
TL75xM10
TL75xM12
TL751Mxx
TL751Mxx
TL75xMxxC
TL75xMxxC
9
26
VI
Input voltage
V
11
13
2
26
26
VIH
VIL
IO
High-level ENABLE input voltage
Low-level ENABLE input voltage
Output current
15
V
V
0
0.8
750
125
mA
°C
TJ
Operating virtual junction temperature
0
TL751MxxC Switching Characteristics
VI = 14 V, IO = 300 mA, TJ = 25°C (unless otherwise noted)
TL751MxxC
PARAMETER
UNIT
TYP
tr
Response time, ENABLE to output
50
µs
3
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
TL75xM05C Electrical Characteristics(1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M05, TJ = 25°C (unless otherwise noted)
TL750M05C
TL751M05C
PARAMETER
TEST CONDITIONS
UNIT
MIN
4.95
4.9
TYP
MAX
5
5.05
5.1
25
Output voltage
V
TJ = 0°C to 125°C
VI = 9 V to 16 V, IO = 250 mA
VI = 6 V to 26 V, IO = 250 mA
VI = 8 V to 18 V, f = 120 Hz
IO = 5 mA to 750 mA
IO = 500 mA
10
12
55
20
Input voltage regulation
mV
50
Ripple rejection
50
dB
Output regulation voltage
50
0.5
0.6
mV
Dropout voltage
V
IO = 750 mA
Output noise voltage
Bias current
f = 10 Hz to 100 kHz
IO = 750 mA
500
60
µV
mA
µA
75
5
IO = 10 mA
Bias current (TL751Mxx only)
ENABLE ≥ 2 V
200
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL75xM08C Electrical Characteristics(1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M08, TJ = 25°C (unless otherwise noted)
TL750M08C
TL751M08C
PARAMETER
TEST CONDITIONS
UNIT
MIN
7.92
7.84
TYP
MAX
8.08
8.16
40
8
Output voltage
V
TJ = 0°C to 125°C
VI = 10 V to 17 V, IO = 250 mA
VI = 9 V to 26 V, IO = 250 mA
VI = 11 V to 21 V, f = 120 Hz
IO = 5 mA to 750 mA
IO = 500 mA
12
15
55
24
Input voltage regulation
mV
68
Ripple rejection
50
dB
Output regulation voltage
80
0.5
0.6
mV
Dropout voltage
V
IO = 750 mA
Output noise voltage
Bias current
f = 10 Hz to 100 kHz
IO = 750 mA
500
60
µV
mA
µA
75
5
IO = 10 mA
Bias current (TL751Mxx only)
ENABLE ≥ 2 V
200
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
4
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
TL75xM10C Electrical Characteristics(1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M10, TJ = 25°C (unless otherwise noted)
TL750M10C
TL751M10C
PARAMETER
TEST CONDITIONS
UNIT
MIN
9.9
TYP
MAX
10.1
10.2
43
10
Output voltage
V
TJ = 0°C to 125°C
9.8
VI = 12 V to 18 V, IO = 250 mA
VI = 11 V to 26 V, IO = 250 mA
VI = 13 V to 23 V, f = 120 Hz
IO = 5 mA to 750 mA
IO = 500 mA
15
20
55
30
Input voltage regulation
mV
75
Ripple rejection
50
dB
Output regulation voltage
100
0.5
0.6
mV
Dropout voltage
V
IO = 750 mA
Output noise voltage
Bias current
f = 10 Hz to 100 kHz
IO = 750 mA
1000
60
µV
mA
µA
75
5
IO = 10 mA
Bias current (TL751Mxx only)
ENABLE ≥ 2 V
200
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
TL75xM12C Electrical Characteristics(1)
VI = 14 V, IO = 300 mA, ENABLE = 0 V for TL751M12, TJ = 25°C (unless otherwise noted)
TL750M12C
TL751M12C
PARAMETER
TEST CONDITIONS
UNIT
MIN
11.88
11.76
TYP
MAX
12.12
12.24
43
12
Output voltage
V
TJ = 0°C to 125°C
VI = 14 V to 19 V, IO = 250 mA
VI = 13 V to 26 V, IO = 250 mA
VI = 13 V to 23 V, f = 120 Hz
IO = 5 mA to 750 mA
IO = 500 mA
15
20
55
30
Input voltage regulation
mV
78
Ripple rejection
50
dB
Output regulation voltage
120
0.5
0.6
mV
Dropout voltage
V
IO = 750 mA
Output noise voltage
Bias current
f = 10 Hz to 100 kHz
IO = 750 mA
1000
60
µV
mA
µA
75
5
IO = 10 mA
Bias current (TL751Mxx only)
ENABLE ≥ 2 V
200
(1) Pulse-testing techniques maintain the junction temperature as close to the ambient temperature as possible. Thermal effects must be
taken into account separately. All characteristics are measured with a 0.1-µF capacitor across the input and a 10-µF tantalum capacitor
on the output, with equivalent series resistance within the guidelines shown in Figure 1.
5
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
PARAMETER MEASUREMENT INFORMATION
The TL750Mxx is a low-dropout regulator. This means that the capacitance loading is important to the
performance of the regulator because it is a vital part of the control loop. The capacitor value and the equivalent
series resistance (ESR) both affect the control loop and must be defined for the load range and the temperature
range. Figure 1 and Figure 2 can establish the capacitance value and ESR range for the best regulator
performance.
Figure 1 shows the recommended range of ESR for a given load with a 10-µF capacitor on the output. This
figure also shows a maximum ESR limit of 2 Ω and a load-dependent minimum ESR limit.
For applications with varying loads, the lightest load condition should be chosen because it is the worst case.
Figure 2 shows the relationship of the reciprocal of ESR to the square root of the capacitance with a minimum
capacitance limit of 10 µF and a maximum ESR limit of 2 Ω. This figure establishes the amount that the
minimum ESR limit shown in Figure 1 can be adjusted for different capacitor values.
For example, where the minimum load needed is 200 mA, Figure 1 suggests an ESR range of 0.8 Ω to 2 Ω for
10 µF. Figure 2 shows that changing the capacitor from 10 µF to 400 µF can change the ESR minimum by
greater than 3/0.5 (or 6). Therefore, the new minimum ESR value is 0.8/6 (or 0.13 Ω ). This allows an ESR
range of 0.13 Ω to 2 Ω , achieving an expanded ESR range by using a larger capacitor at the output. For better
stability in low-current applications, a small resistance placed in series with the capacitor (see Table 1) is
recommended, so that ESRs better approximate those shown in Figure 1 and Figure 2.
Table 1. Compensation for Increased Stability at Low Currents
ESR
TYP
PART
NUMBER
ADDITIONAL
RESISTANCE
∆I
L
MANUFACTURER
CAPACITANCE
Applied Load
Current
<br/>
AVX
<br/>
15 µF
0.9 Ω
TAJB156M010S
1 Ω
Load
Voltage
<br/>
KEMET
<br/>
33 µF
0.6 Ω T491D336M010AS
0.5 Ω
∆V = ∆I × ESR
∆V
L
L
L
OUTPUT CAPACITOR
<br/>
EQUIVALENT SERIES RESISTANCE (ESR)
STABILITY
vs
EQUIVALENT SERIES RESISTANCE (ESR)
vs
LOAD CURRENT RANGE
0.04
3
2.8
2.6
2.4
2.2
2
Not Recommended
Recommended Min ESR
Potential Instability
C = 10 µF
L
C = 0.1 µF
0.035
0.03
I
This Region Not
Recommended for
Operation
f = 120 Hz
1000 µF
Region of
Best Stability
0.025
0.02
1.8
1.6
1.4
1.2
1
Max ESR Boundary
400 µF
Region of Best Stability
200 µF
100 µF
0.015
0.01
0.8
0.6
0.4
0.2
0
Min ESR
Boundary
0.005
0
22 µF
Potential Instability Region
10 µF
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
0
0.1
0.2
0.3
0.4
0.5
1/ESR
I − Load Current Range − A
L
Figure 1.
Figure 2.
6
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Transient input voltage vs Time
3
4
Output voltage vs Input voltage
IO = 10 mA
5
Input current vs Input voltage
IO = 100 mA
6
Dropout voltage vs Output current
Quiescent voltage vs Output current
Load transient response
7
8
9
Line transient response
10
TRANSIENT INPUT VOLTAGE
OUTPUT VOLTAGE
vs
INPUT VOLTAGE
vs
TIME
60
50
14
I
= 10 mA
O
T = 25°C
V = 14 V + 46e
I
for t ≥ 5 ms
J
TL75xM12
(−t/0.230)
T = 25°C
J
12
10
TL75xM10
TL75xM08
40
30
8
6
t = 1 ms
r
20
10
TL75xM05
4
2
0
0
0
100
200
300
400
500
600
0
2
4
6
8
10
12
14
t − Time − ms
V − Input Voltage − V
I
Figure 3.
Figure 4.
7
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
INPUT CURRENT
vs
INPUT VOLTAGE
INPUT CURRENT
vs
INPUT VOLTAGE
200
350
300
250
I
= 10 mA
O
I
O
= 100 mA
180
160
T = 25°C
J
T = 25°C
J
140
120
100
200
150
80
60
100
50
40
20
0
0
0
2
4
6
8
10
12
14
0
2
4
6
8
10
12
14
V − Input Voltage − V
I
V − Input Voltage − V
I
Figure 5.
Figure 6.
DROPOUT VOLTAGE
vs
OUTPUT CURRENT
QUIESCENT CURRENT
vs
OUTPUT CURRENT
250
225
12
10
8
T = 25°C
J
T = 25°C
V = 14 V
I
J
200
175
150
125
6
4
2
100
75
50
0
0
0
50
100
150
200
250
300
20
40
60
80
100 150 250 350
I
O
− Output Current − mA
I
O
− Output Current − mA
Figure 7.
Figure 8.
8
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TL750M SERIES, TL751M SERIES
LOW-DROPOUT VOLTAGE REGULATORS
www.ti.com
SLVS021K–JANUARY 1988–REVISED OCTOBER 2006
LOAD TRANSIENT RESPONSE
LINE TRANSIENT RESPONSE
200
100
0
V
= V + 1 V
O
I(NOM)
ESR = 2
I = 20 mA
L
C = 10 µF
T = 25°C
J
L
− 100
V
I(NOM)
= V + 1 V
O
ESR = 2
C = 10 µF
T = 25°C
J
− 200
150
100
50
L
0
0
50
100 150 200 250 300 350
0
20
40
60
80
100 150 250 350
t − Time − µs
t − Time − µs
Figure 9.
Figure 10.
9
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PACKAGE OPTION ADDENDUM
www.ti.com
15-Jan-2007
PACKAGING INFORMATION
Orderable Device
TL750M05CKC
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
NRND
TO-220
KC
3
3
3
50
Pb-Free
(RoHS)
CU SN
CU SN
CU SN
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
TL750M05CKCE3
TL750M05CKCSE3
NRND
TO-220
TO-220
KC
50
Pb-Free
(RoHS)
ACTIVE
KCS
50
Pb-Free
(RoHS)
TL750M05CKTER
TL750M05CKTPR
NRND
NRND
PFM
PFM
KTE
KTP
3
2
2000
TBD
CU SNPB
CU SN
Level-1-220C-UNLIM
Level-1-260C-UNLIM
3000 Green (RoHS &
no Sb/Br)
TL750M05CKTPRG3
TL750M05CKTTR
TL750M05CKTTRG3
TL750M05CKVURG3
TL750M08CKCE3
TL750M08CKCSE3
TL750M08CKTPRG3
TL750M08CKVURG3
TL750M10CKC
NRND
ACTIVE
ACTIVE
ACTIVE
NRND
PFM
KTP
KTT
KTT
KVU
KC
2
3
3
3
3
3
2
3
3
3
3
3000 Green (RoHS &
no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Level-1-260C-UNLIM
Level-3-245C-168 HR
Level-3-245C-168 HR
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
DDPAK/
TO-263
500 Green (RoHS &
no Sb/Br)
DDPAK/
TO-263
500 Green (RoHS &
no Sb/Br)
PFM
TO-220
TO-220
PFM
2500 Green (RoHS &
no Sb/Br)
50
Pb-Free
(RoHS)
ACTIVE
NRND
KCS
KTP
KVU
KC
50
Pb-Free
(RoHS)
3000 Green (RoHS &
no Sb/Br)
ACTIVE
NRND
PFM
2500 Green (RoHS &
no Sb/Br)
TO-220
TO-220
TO-220
50
Pb-Free
(RoHS)
TL750M10CKCE3
TL750M10CKCSE3
NRND
KC
50
Pb-Free
(RoHS)
ACTIVE
KCS
50
Pb-Free
(RoHS)
TL750M10CKTER
TL750M10CKTPR
NRND
NRND
PFM
PFM
KTE
KTP
3
2
2000
TBD
CU SNPB
CU SN
Level-1-220C-UNLIM
Level-1-260C-UNLIM
3000 Green (RoHS &
no Sb/Br)
TL750M10CKTPRG3
TL750M10CKVURG3
TL750M12CKC
NRND
ACTIVE
NRND
PFM
PFM
KTP
KVU
KC
2
3
3
3
3
2
3
5
3000 Green (RoHS &
no Sb/Br)
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
CU SN
Call TI
Level-1-260C-UNLIM
Level-3-260C-168 HR
N / A for Pkg Type
N / A for Pkg Type
N / A for Pkg Type
Level-1-260C-UNLIM
Level-3-260C-168 HR
Call TI
2500 Green (RoHS &
no Sb/Br)
TO-220
TO-220
TO-220
PFM
50
50
50
Pb-Free
(RoHS)
TL750M12CKCE3
TL750M12CKCSE3
TL750M12CKTPRG3
TL750M12CKVURG3
TL751M05CKTGR
NRND
KC
Pb-Free
(RoHS)
ACTIVE
NRND
KCS
KTP
KVU
KTG
Pb-Free
(RoHS)
3000 Green (RoHS &
no Sb/Br)
ACTIVE
OBSOLETE
PFM
2500 Green (RoHS &
no Sb/Br)
PFM
TBD
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
15-Jan-2007
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
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Addendum-Page 2
MECHANICAL DATA
MPFM001E – OCTOBER 1994 – REVISED JANUARY 2001
KTE (R-PSFM-G3)
PowerFLEX PLASTIC FLANGE-MOUNT
0.375 (9,52)
0.365 (9,27)
0.080 (2,03)
0.070 (1,78)
0.360 (9,14)
0.350 (8,89)
0.050 (1,27)
0.040 (1,02)
0.220 (5,59)
NOM
0.010 (0,25) NOM
Thermal Tab
(See Note C)
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
0.310 (7,87)
0.420 (10,67)
0.410 (10,41)
1
3
0.025 (0,63)
0.031 (0,79)
Seating Plane
0.004 (0,10)
0.010 (0,25)
M
0.100 (2,54)
0.200 (5,08)
0.005 (0,13)
0.001 (0,03)
0.041 (1,04)
0.031 (0,79)
0.010 (0,25)
NOM
Gage Plane
3°–6°
0.010 (0,25)
4073375/F 12/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. Falls within JEDEC MO-169
PowerFLEX is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPFM003F – OCTOBER 1994 – REVISED MARCH 2002
KTG (R-PSFM-G5)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.375 (9,52)
0.365 (9,27)
0.080 (2,03)
0.070 (1,78)
0.360 (9,14)
0.350 (8,89)
0.050 (1,27)
0.040 (1,02)
0.220 (5,59)
NOM
0.010 (0,25) NOM
0.360 (9,14)
0.350 (8,89)
0.295 (7,49)
NOM
0.320 (8,13)
Thermal Tab
(See Note C)
0.420 (10,67)
0.410 (10,41)
0.310 (7,87)
1
5
Seating Plane
0.004 (0,10)
0.031 (0,79)
0.025 (0,63)
0.067 (1,70)
0.268 (6,81)
0.010 (0,25)
M
0.005 (0,13)
0.001 (0,03)
0.041 (1,04)
0.031 (0,79)
0.010 (0,25)
NOM
Gage Plane
3°–ā6°
0.010 (0,25)
4073377/G 12/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. FAlls within JEDEC MO–169
PowerFLEX is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPSF001F – JANUARY 1996 – REVISED JANUARY 2002
KTP (R-PSFM-G2)
PowerFLEX PLASTIC FLANGE-MOUNT PACKAGE
0.080 (2,03)
0.070 (1,78)
0.243 (6,17)
0.233 (5,91)
0.228 (5,79)
0.218 (5,54)
0.050 (1,27)
0.040 (1,02)
0.130 (3,30) NOM
0.010 (0,25) NOM
Thermal Tab
(See Note C)
0.215 (5,46)
0.287 (7,29)
0.277 (7,03)
NOM
0.247 (6,27)
0.237 (6,02)
0.381 (9,68)
0.371 (9,42)
0.100 (2,54)
0.090 (2,29)
0.032 (0,81) MAX
Seating Plane
0.004 (0,10)
0.090 (2,29)
0.180 (4,57)
0.005 (0,13)
0.001 (0,02)
0.031 (0,79)
0.025 (0,63)
0.010 (0,25)
M
0.047 (1,19)
0.037 (0,94)
0.010 (0,25) NOM
Gage Plane
0.010 (0,25)
2°–ā6°
4073388/M 01/02
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. The center lead is in electrical contact with the thermal tab.
D. Dimensions do not include mold protrusions, not to exceed 0.006 (0,15).
E. Falls within JEDEC TO-252 variation AC.
PowerFLEX is a trademark of Texas Instruments.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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