TL7700CPWG4 [TI]
SUPPLY-VOLTAGE SUPERVISOR; 供给电压监控器
| 型号： | TL7700CPWG4 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | SUPPLY-VOLTAGE SUPERVISOR |
| 文件： | 总17页 (文件大小：401K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ꢀꢁ ꢂꢂ ꢃꢃ
ꢄꢅ ꢆꢆꢁꢇꢈꢉꢊ ꢁꢀꢋꢌ ꢍ ꢄꢅ ꢆꢍ ꢎꢉ ꢏꢄ ꢊ ꢎ
SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
P, PS, OR PW PACKAGE
(TOP VIEW)
D
Adjustable Sense Voltage With Two
External Resistors
D
Adjustable Hysteresis of Sense Voltage
CT
SENSE
NC
RESET
NC
NC
1
2
3
4
8
7
6
5
D
Wide Operating Supply-Voltage
Range . . . 1.8 V to 40 V
GND
V
D
D
D
Wide Operating Temperature
Range . . . −40°C to 85°C
CC
NC − No internal connection
Low Power Consumption (I
= 0.6 mA
CC
TYP, V
= 40 V)
CC
Minimum External Components
description/ordering information
The TL7700 is a bipolar integrated circuit designed for use as a reset controller in microcomputer and
microprocessor systems. The SENSE voltage can be set to any value greater than 0.5 V using two external
resistors. The hysteresis value of the sense voltage also can be set by the same resistors. The device includes
a precision voltage reference, fast comparator, timing generator, and output driver, so it can generate a
power-on reset signal in a digital system.
The TL7700 has an internal 1.5-V temperature-compensated voltage reference from which all function blocks
are supplied. Circuit function is very stable, with supply voltage in the 1.8-V to 40-V range. Minimum supply
current allows use with ac line operation, portable battery operation, and automotive applications.
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP (P)
Tube of 50
TL7700CP
TL7700CP
SOP (PS)
Reel of 2000
Tube of 150
Reel of 2000
TL7700CPSR
TL7700CPW
TL7700CPWR
T7700
−40°C to 85°C
TSSOP (PW)
T7700
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2004, Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
functional block diagram
V
CC
V
s
= 500 mV TYP
RESET
Reference
Voltage
+
−
+
−
+
−
SENSE
†
I
CT
High:
On
R
S
Q
†
I
S
GND
†
I
= 15 µA TYP; I = 2.5 µA TYP
s
CT
CT
Terminal Functions
TERMINAL
DESCRIPTION
NAME
NO.
Timing capacitor connection. This terminal sets the RESET output pulse duration (t ). It is connected internally to a
po
15-µA constant-current source. There is a limit on the switching speed of internal elements; even if CT is set to 0,
response speeds remain at approximately 5 to 10 µs. If CT is open, the device can be used as an adjustable-threshold
noninverting comparator. If CT is low, the internal output-stage comparator is active, and the RESET output transistor
is on. An external voltage must not be applied to this terminal due to the internal structure of the device. Therefore, drive
the device using an open-collector transistor, FET, or 3-state buffer (in the low-level or high-impedance state).
CT
1
GND
NC
4
Ground. Keep this terminal as low impedance to reduce circuit noise.
No internal connection
3, 6, 7
8
Reset output. This terminal can be connected directly to a system that resets in the active-low state. A pullup resistor
usually is required because the output is an npn open-collector transistor. An additional transistor should be connected
when the active-high reset or higher output current is required.
RESET
SENSE
Voltage sense. This terminal has a threshold level of 500 mV. The sense voltage and hysteresis can be set at the same
time when the two voltage-dividing resistors are connected. The reference voltage is temperature compensated to inhibit
temperature drift in the threshold voltage within the operating temperature range.
2
5
V
CC
Power supply. This terminal is used in an operating-voltage range of 1.8 V to 40 V.
2
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
CC
Sense input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 41 V
s
Output voltage, V
(off state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41 V
OH
Output current, I (on state) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
OL
Package thermal impedance, θ (see Notes 2 and 3): P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
JA
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . 149°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) − T )/θ . Operating at the absolute maximum T of 150°C can impact reliability.
D
J
A
JA
J
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions
MIN
MAX
40
UNIT
V
V
CC
Supply voltage
1.8
I
Low-level output current
Operating free-air temperature
3
mA
°C
OL
T
−40
85
A
electrical characteristics, V
= 3 V, T = 25°C (unless otherwise noted)
CC
A
PARAMETER
MIN
495
490
2
TYP
MAX
505
510
3
UNIT
TEST CONDITIONS
500
V
s
SENSE input voltage
mV
T
= −40°C to 85°C
A
2.5
0.6
I
I
SENSE input current
Supply current
V
= 0.4 V
µA
s
s
T
A
= −40°C to 85°C
1.5
3.5
1
V
= 40 V,
V
s
= 0.6 V,
No load
mA
CC
CC
I
I
= 1.5 mA
= 3 mA
0.4
0.8
1
OL
V
Low-level output voltage
High-level output current
V
OL
OL
I
I
V
V
= 40 V,
OH
= 0.6 V
V
s
= 0.6 V,
T = −40°C to 85°C
A
µA
µA
OH
Timing-capacitor charge current
11
15
19
CT
s
switching characteristics, V
= 3 V, T = 25°C (unless otherwise noted)
CC
A
PARAMETER
TEST CONDITIONS
MIN
2
TYP
MAX
UNIT
µs
t
t
t
t
t
SENSE pulse duration
Output pulse duration
Output rise time
C
C
C
C
C
= 0.01 µF
= 0.01 µF
= 0.01 µF,
= 0.01 µF,
= 0.01 µF
pi
po
r
T
T
T
T
T
0.5
1
1.5
15
ms
µs
R
R
= 2.2 kΩ,
= 2.2 kΩ,
C
C
= 100 pF
= 100 pF
L
L
L
L
Output fall time
0.5
10
µs
f
Propagation delay time, SENSE to output
µs
pd
3
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
−
+
A
V
CC
V
s
SENSE
V
CC
0.6 V
GND
Figure 1. V
vs I
Measurement Circuit
CC
CC
V
CC
V
s
CT
SENSE
V
CC
+
0.6 V
A
−
GND
Figure 2. V
vs I
CT
CC
Test
Point
V
CC
RESET
CT
V
s
3 V
SENSE
0.4 V
GND
0.01 µF
Figure 3. I
vs V
OL
OL
4
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
PARAMETER MEASUREMENT INFORMATION
2.2 kΩ
V
CC
Test
Point
RESET
CT
V
s
+
−
V
CC
A
SENSE
V
s
GND
0.01 µF
Figure 4. V , I Characteristics
S
S
2.2 kΩ
V
CC
Test
Point
RESET
CT
V
s
3 V
SENSE
GND
100 pF
C
t
Figure 5. Switching Characteristics
5
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
†
TYPICAL CHARACTERISTICS
SUPPLY CURRENT
vs
TIMING-CAPACITOR CHARGE CURRENT
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
1.2
1.0
0.8
16
15
14
T
A
= −40°C
T
A
= 25°C
= 85°C
T
= 85°C
= 25°C
= −40°C
A
T
A
T
T
A
0.6
0.4
0.2
0
13
12
11
10
A
0
10
20
30
40
50
60
0
10
20
30
40
50
60
V
CC
− Supply Voltage − V
V
CC
− Supply Voltage − V
Figure 6
Figure 7
V
vs
SENSE INPUT VOLTAGE
vs
OL
I
TEMPERATURE
OL
506
504
1.2
1.0
T
= 25°C
= 500.8 mV
A
V
s
502
500
498
496
494
T
= 85°C
= 25°C
A
0.8
0.6
T
A
T
V
= 25°C
= 498.3 mV
T
A
= −40°C
0.4
0.2
A
s
492
490
488
0
−75 −50 −25
0
25 50 75 100 125 150
0
1
2
3
4
5
6
T
A
− Free-Air Temperature − °C
I
− Low-Level Output Current − mA
OL
Figure 8
Figure 9
†
Data at high and low temperatures are applicable only within the recommended operating conditions.
6
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
†
TYPICAL CHARACTERISTICS
SENSE INPUT CURRENT
vs
SENSE INPUT VOLTAGE
SENSE INPUT CURRENT
vs
TEMPERATURE
3.5
3.0
3.4
3.2
2.5
2.0
1.5
1.0
0.5
3.0
2.8
2.6
2.4
2.2
0
2.0
1.8
1.6
−0.5
−1.0
0
0.1 0.2 0.3 0.4 0.5 0.6 1.0 10 40
−75 −50 −25
0
25 50 75 100 125 150
V
s
− Sense Input Voltage − V
T
A
− Free-Air Temperature − °C
Figure 10
Figure 11
OUTPUT PULSE DURATION
vs
TIMING CAPACITOR
9
8
10
10
7
10
6
10
5
10
4
10
3
10
2
1
1
10
10
1
2
3
4
5
6
7
8
9
1
10 10 10 10 10 10 10 10 10
C − Timing Capacitor − pF
t
Figure 12
†
Data at high and low temperatures are applicable only within the recommended operating conditions.
7
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS
Test
Point 1
TP1
2.2 kΩ
240 kΩ
V
CC
Test
Point 2
RESET
TP2
V
s
SENSE
6 V
CT
30 kΩ
GND
510 pF
100 pF
X-Axis = 0.2 ms/Division
Figure 13. V
vs Output Test Circuit 1
Figure 14. V
vs Output Waveform 1
CC
CC
Test
TP1
Point 1
2.2 kΩ
240 kΩ
V
CC
Test
Point 2
RESET
TP2
V
s
SENSE
6 V
CT
30 kΩ
GND
100 pF
510 pF
X-Axis = 0.2 ms/Division
Figure 15. V
vs Output Test Circuit 2
Figure 16. V
vs Output Waveform 2
CC
CC
8
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
TYPICAL CHARACTERISTICS
Test
Point 1
TP1
TP2
2.2 kΩ
240 kΩ
V
CC
Test
Point 2
RESET
V
s
SENSE
CT
30 kΩ
GND
100 pF
510 pF
X-Axis = 0.2 ms/Division
Figure 18. V
vs Output Waveform 3
Figure 17. V
vs Output Test Circuit 3
CC
CC
detailed description
sense-voltage setting
The SENSE terminal input voltage, V , of the TL7700 typically is 500 mV. By using two external resistors, the
s
circuit designer can obtain any sense voltage over 500 mV. In Figure 19, the sensing voltage, V , is calculated
s’
as:
V = V × (R1 + R2)/R2
s’
s
Where:
V = 500 mV, typically at T = 25°C
s
A
At room temperature, V has a variation of 500 mV 5 mV. In the basic circuit shown in Figure 19, variations
s
of [ 5 × (R1 + R2)/R2] mV are superimposed on V .
s
V
CC
R
L
V
R1
R2
CC
RESET
CT
RESET
V
s
SENSE
GND
C
t
GND
Figure 19
9
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SLVS220C − JULY 1999 − REVISED NOVEMBER 2004
sense-voltage hysteresis setting
If the sense voltage, V , does not have hysteresis in it, and the voltage on the sensing line contains ripples, the
s’
resetting of TL7700 will be unstable. Hysteresis is added to the sense voltage to prevent such problems. As
shown in Figure 20, the hysteresis, V , is added, and the value is determined as:
hys
V
= I × R1
s
hys
Where:
I = 2.5 µA, typically at T = 25°C
s
A
At room temperature, I has variations of 2.5 µA 0.5 µA. Therefore, in the circuit shown in Figure 19, V
hys
has
s
variations of ( 0.5 × R1) µV. In circuit design, it is necessary to consider the voltage-dividing resistor tolerance
and temperature coefficient in addition to variations in V and V
.
hys
s
V
CC
V
hys
V
s’
1.5 V
T
RESET
t
t
po
po
T
NOTE A: The sense voltage, V , is different from the SENSE terminal input voltage, V . V normally is 500 mV for
s’
s
s
triggering.
Figure 20. V -RESET Timing Chart
CC
output pulse-duration setting
Constant-current charging starts on the timing capacitor when the sensing-line voltage reaches the TL7700
sense voltage. When the capacitor voltage exceeds the threshold level of the output drive comparator, RESET
changes from a low to a high level. The output pulse duration is the time between the point when the sense-pin
voltage exceeds the threshold level and the point when the RESET output changes from a low level to a high
level. When the TL7700 is used for system power-on reset, the output pulse duration, t , must be set longer
po
than the power rise time. The value of t is:
po
5
t
= C × 10 seconds
po
t
Where:
C is the timing capacitor in farads
t
There is a limit on the device response speed. Even if C = 0, t is not 0, but approximately 5 µs to 10 µs.
t
po
Therefore, when the TL7700 is used as a comparator with hysteresis, without connecting C , switching speeds
t
(t /t , t /t , etc.) must be considered.
r f po pd
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
24-May-2007
PACKAGING INFORMATION
Orderable Device
TL7700CP
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
PDIP
P
8
8
8
8
8
8
8
8
8
8
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7700CPE4
PDIP
SO
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7700CPSR
TL7700CPSRG4
TL7700CPW
PS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SO
PS
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
TSSOP
PW
PW
PW
PW
PW
PW
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7700CPWE4
TL7700CPWG4
TL7700CPWR
TL7700CPWRE4
TL7700CPWRG4
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
150 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) (mm) Quadrant
(mm)
330
(mm)
16
TL7700CPSR
TL7700CPWR
PS
8
8
SITE 41
SITE 41
8.2
7.0
6.6
3.6
2.5
1.6
12
8
16
12
Q1
Q1
PW
330
12
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
24-Sep-2007
Device
Package
Pins
Site
Length (mm) Width (mm) Height (mm)
TL7700CPSR
TL7700CPWR
PS
8
8
SITE 41
SITE 41
346.0
346.0
346.0
346.0
0.0
0.0
PW
Pack Materials-Page 2
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
9,80
9,60
A MAX
A MIN
7,70
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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Copyright © 2007, Texas Instruments Incorporated
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