TL7712ACDRE4 [TI]
SUPPLY-VOLTAGE SUPERVISORS; 电源电压监事型号: | TL7712ACDRE4 |
厂家: | TEXAS INSTRUMENTS |
描述: | SUPPLY-VOLTAGE SUPERVISORS |
文件: | 总17页 (文件大小:346K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
TL7702A, TL7709A, TL7712A, TL7715A . . . D OR P PACKAGE
TL7705A . . . D, P, OR PS PACKAGE,
(TOP VIEW)
Power-On Reset Generator
Automatic Reset Generation After Voltage
Drop
Wide Supply-Voltage Range
Precision Voltage Sensor
REF
RESIN
CT
V
CC
1
2
3
4
8
7
6
5
SENSE
RESET
RESET
Temperature-Compensated Voltage
Reference
GND
True and Complement Reset Outputs
Externally Adjustable Pulse Duration
description/ordering information
ORDERING INFORMATION
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
†
PACKAGE
T
A
PDIP (P)
SOIC (D)
PDIP (P)
SOIC (D)
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Reel of 2000
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Tube of 50
Tube of 75
Reel of 2500
Tube of 50
Tube of 75
Reel of 2500
TL7702ACP
TL7702ACP
TL7702ACD
TL7702ACDR
TL7705ACP
TL7705ACD
TL7705ACDR
TL7705ACPSR
TL7709ACP
TL7709ACD
TL7709ACDR
TL7712ACP
TL7712ACD
TL7712ACDR
TL7715ACP
TL7715ACD
TL7702AIP
7702AC
TL7705ACP
7705AC
SOP (PS)
PDIP (P)
T7705A
0°C to 70°C
TL7709ACP
SOIC (D)
PDIP (P)
SOIC (D)
7709AC
TL7709ACP
7712AC
PDIP (P)
SOIC (D)
PDIP (P)
TL7715ACP
7715AC
TL7702AIP
TL7702AID
SOIC (D)
PDIP (P)
SOIC (D)
7702AI
TL7702AIDR
TL7705AIP
–40°C to 85°C
TL7705AIP
7705AI
TL7705AID
TL7705AIDR
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
description/ordering information (continued)
The TL77xxA family of integrated-circuit supply-voltage supervisors is designed specifically for use as reset
controllers in microcomputer and microprocessor systems. The supply-voltage supervisor monitors the supply
for undervoltage conditions at the SENSE input. During power up, the RESET output becomes active (low)
when V attains a value approaching 3.6 V. At this point (assuming that SENSE is above V ), the delay timer
CC
IT+
function activates a time delay, after which outputs RESET and RESET go inactive (high and low, respectively).
When an undervoltage condition occurs during normal operation, RESET and RESET go active. To ensure that
a complete reset occurs, the reset outputs remain active for a time delay after the voltage at the SENSE input
exceeds the positive-going threshold value. The time delay is determined by the value of the external capacitor
4
C : t = 1.3 × 10 × C , where C is in farads (F) and t is in seconds (s).
T
d
T
T
d
During power down and when SENSE is below V , the outputs remain active until V
this, the outputs are undefined.
falls below 2 V. After
IT–
CC
An external capacitor (typically 0.1 µF) must be connected to REF to reduce the influence of fast transients in
the supply voltage.
functional block diagram
The functional block diagram is shown for illustrative purposes only; the actual circuit includes a trimming
network to adjust the reference voltage and sense-comparator trip point.
8
V
CC
Reference
Voltage
≈100 µA
6
5
RESET
RESET
3
7
CT
SENSE
R1
(see Note A)
R2
(see Note A)
2
4
RESIN
GND
1
REF
NOTES: A. TL7702A: R1 = 0 Ω, R2 = open
TL7705A: R1 = 7.8 kΩ, R2 = 10 kΩ
TL7709A: R1 = 19.7 kΩ, R2 = 10 kΩ
TL7712A: R1 = 32.7 kΩ, R2 = 10 kΩ
TL7715A: R1 = 43.4 kΩ, R2 = 10 kΩ
B. Resistor values shown are nominal.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
timing diagram
V
CC
and SENSE
Threshold Voltage
≈ 3.6 V
V
CC
V
CC
≈ 2 V
RESET
t
d
t
d
Output
Undefined
Output
Undefined
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
CC
Input voltage range, V , RESIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
Input voltage range, V , SENSE:TL7702A (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 6 V
I
I
TL7705A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
TL7709A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
TL7712A, TL7715A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 20 V
High-level output current, I , RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –30 mA
OH
Low-level output current, I , RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
OL
Package thermal impedance, θ (see Notes 3 and 4): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
JA
P package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85°C/W
PS package . . . . . . . . . . . . . . . . . . . . . . . . . . . 95°C/W
Operating virtual junction temperature, T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150°C
J
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to GND.
2. For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed V
is less.
– 1 V or 6 V, whichever
CC
3. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
JA
J
A
ambient temperature is P = (T (max) – T )/θ . Operating at the absolute maximum T of 150°C can affect reliability.
D
J
A
JA
J
4. The package thermal impedance is calculated in accordance with JESD 51-7.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
recommended operating conditions
MIN
3.5
2
MAX
UNIT
V
V
CC
V
IH
V
IL
Supply voltage
18
High-level input voltage at RESIN
Low-level input voltage at RESIN
V
0.6
V
TL7702A
TL7705A
TL7709A
TL7712A
TL7715A
0
0
0
0
0
See Note 2
10
15
V
I
Input voltage, SENSE
V
20
20
I
I
High-level output current, RESET
Low-level output current, RESET
–16
16
mA
mA
OH
OL
TL77xxAC
TL77xxAI
0
70
85
T
A
Operating free-air temperature range
°C
–40
NOTE 2: For proper operation of the TL7702A, the voltage applied to the SENSE terminal should not exceed V
CC
– 1 V or 6 V, whichever is less.
electrical characteristics over recommended operating conditions (unless otherwise noted)
TL77xxAC
TL77xxAI
†
PARAMETER
UNIT
TEST CONDITIONS
MIN
TYP
MAX
V
V
High-level output voltage, RESET
Low-level output voltage, RESET
Reference voltage
I
I
= –16 mA
V –1.5
CC
V
V
V
OH
OH
= 16 mA
0.4
2.58
2.58
4.6
OL
OL
V
ref
T
= 25°C
2.48
2.48
4.5
2.53
2.53
4.55
7.6
10.8
13.5
10
A
TL7702A
TL7705A
TL7709A
TL7712A
TL7715A
TL7702A
TL7705A
TL7709A
TL7712A
TL7715A
Negative-going input threshold voltage,
SENSE
V
IT–
T
= 25°C
7.5
7.7
V
A
10.6
13.2
11
13.8
15
V
hys
Hysteresis, SENSE (V
Input current
– V
)
T = 25°C
A
20
mV
IT+
IT–
35
45
V = 2.4 V to V
I
20
–100
2
CC
– 1.5 V
CC
RESIN
I
I
V = 0.4 V
I
µA
SENSE
TL7702A
V
< V < V
I
0.5
1.8
ref
I
I
I
High-level output current, RESET
Low-level output current, RESET
Supply current
V
= 18 V
= 0
50
µA
µA
OH
O
O
V
–50
3
OL
CC
All inputs and outputs open
mA
†
All electrical characteristics are measured with 0.1-µF capacitors connected at REF, CT, and V
to GND.
CC
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
switching characteristics over recommended operating conditions (unless otherwise noted)
TL77xxAC
TL77xxAI
†
PARAMETER
UNIT
TEST CONDITIONS
MIN
0.65
0.4
TYP
MAX
Output pulse duration
C
= 0.1 µF
1.2
2.6
msec
T
Input pulse duration at RESIN
µs
Pulse duration
at SENSE input to switch outputs
t
t
V
V
= V
+ 200 mV,
V
= V
– 200 mV
2
µs
µs
w(S)
IH
IT–
IL
IT–
Propagation delay time, RESIN to RESET
= 5 V
= 5 V,
1
0.2
3.5
3.5
0.2
pd
CC
RESET
t
Rise time
V
See Note 5
See Note 5
µs
µs
r
f
CC
CC
RESET
RESET
t
Fall time
V
= 5 V,
RESET
†
All switching characteristics are measured with 0.1-µF capacitors connected at REF and V
to GND.
CC
NOTE 5: The rise and fall times are measured with a 4.7-kΩ load resistor at RESET and RESET.
PARAMETER MEASUREMENT INFORMATION
Voltage
Drop
t
w(S)
V
V
IT–
IT+
V
IT+
SENSE
RESIN
0 V
V
IH
Undefined
2 V
0.7 V
V
IL
t
f
t
t
r
pd
V
OH(RESET)
90%
90%
90%
RESET
RESET
50%
10%
90%
t
d
t
t
d
t
f
d
50%
10%
r
10%
10%
10%
V
OL(RESET)
t
Figure 1. Voltage Waveforms
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
†
TYPICAL CHARACTERISTICS
DEASSERTION TIME
vs
ASSERTION TIME
vs
LOAD RESISTANCE
LOAD RESISTANCE
7
6
5
4
3
42
38
34
30
26
22
18
V
= 5 V
= 0.1 µF
= 10 pF
= 25°C
V
= 5 V
= 0.1 µF
= 10 pF
= 25°C
CC
T
L
CC
T
L
C
C
T
C
C
T
A
A
RESET t
f
RESET t
r
2
1
0
RESET t
r
RESET t
4
f
0
2
4
6
8
10
0
2
6
8
10
R
– Load Resistance – kΩ
R
– Load Resistance – kΩ
L
L
Figure 2
Figure 3
DEASSERTION TIME
vs
ASSERTION TIME
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
3.6
3.2
2.8
2.4
2
44
V
C
R
= 5 V
= 0.1 µF
= 4.7 kΩ
= 25°C
CC
T
L
V
C
R
= 5 V
CC
T
L
= 0.1 µF
= 4.7 kΩ
= 25°C
40
36
32
28
24
20
T
A
T
A
RESET t
f
RESET t
r
RESET t
1.6
1.2
0.8
r
RESET t
f
0
25
50
75
100 125 150 175 200
0
25
50
C
75
100 125 150 175 200
– Load Capacitance – pF
C
– Load Capacitance – pF
L
L
Figure 4
Figure 5
†
For proper operation, both RESET and RESET should be terminated with resistors of similar value. Failure to do so may cause unwanted
plateauing in either output waveform during switching.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
APPLICATION INFORMATION
5 V
12 V
8
8
10 kΩ
22 kΩ
V
CC
V
CC
SENSE
7
2
7
2
SENSE
5
5
System Reset
RESET
RESIN
RESIN
RESET
TL7712A
TL7705A
RESET
6
1
10 kΩ
6
1
RESET
REF
3
3
CT
CT
REF
10 kΩ
GND
GND
4
10 kΩ
4
C
C
T
T
0.1 µF
0.1 µF
GND
td s
1.3 104
8
( )
CT(F)
V
CC
7
2
SENSE
5
6
RESET
RESIN
TL7712A
RESET
3
1
CT
REF
10 kΩ
GND
4
C
T
0.1 µF
–12 V
Figure 6. Multiple Power-Supply System Reset Generation
5 V
8
10 kΩ
V
CC
V
CC
7
2
SENSE
5
RESET
TMS7000
RESIN
RESET
td s
1.3 104
TL7705A
RESET
REF
( )
6
1
CT(F)
3
CT
V
SS
GND
4
10 kΩ
0.1 µF
C
T
GND
Figure 7. Reset Controller for TMS7000 System
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7702A, TL7705A, TL7709A, TL7712A, TL7715A
SUPPLY-VOLTAGE SUPERVISORS
SLVS028H – APRIL 1983 – REVISED MAY 2003
APPLICATION INFORMATION
5 V
µA7805
INPUT OUTPUT
4.7 kΩ
25 kΩ
8
V
CC
SENSE
System RESET
7
3
S
Input
G
5
Q1
2N3994
RESET
TL7705A
RESET
COMMON
6
1
D
CT
REF
GND
4
4.7 kΩ
C
C
C
T
I
O
0.1 µF
Figure 8. Eliminating Undefined States Using a P-Channel JFET
V
CC
10 kΩ
750 Ω
Q1
2N4036
8
2.7 kΩ
V
System RESET
CC
7
2
5
SENSE Input
SENSE
RESET
TL77xxA
6
1
RESIN
RESET
3
10 kΩ
1 kΩ
CT
REF
GND
4
C
T
0.1 µF
Figure 9. Eliminating Undefined States Using a pnp Transistor
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
SOIC
Drawing
5962-88685012A
TL7702ACD
OBSOLETE
ACTIVE
FK
D
20
8
TBD
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702ACDE4
TL7702ACDG4
TL7702ACDR
TL7702ACDRE4
TL7702ACDRG4
TL7702ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
D
D
P
P
D
D
D
D
D
D
P
P
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702ACPE4
TL7702AID
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702AIDE4
TL7702AIDG4
TL7702AIDR
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7702AIDRE4
TL7702AIDRG4
TL7702AIP
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702AIPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7702AMFKB
TL7702AMJG
TL7702AMJGB
TL7705ACD
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
FK
JG
JG
D
20
8
TBD
TBD
TBD
Call TI
Call TI
Call TI
Call TI
Call TI
Call TI
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7705ACDE4
TL7705ACDG4
TL7705ACDR
TL7705ACDRE4
TL7705ACDRG4
TL7705ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
D
D
D
D
D
P
8
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
CU NIPDAU N / A for Pkg Type
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
(RoHS)
TL7705ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
Call TI Call TI
TL7705ACPSLE
TL7705ACPSR
OBSOLETE
ACTIVE
SO
SO
PS
PS
8
8
TBD
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7705ACPSRE4
TL7705AID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SO
PS
D
D
D
D
D
D
P
8
8
8
8
8
8
8
8
8
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7705AIDE4
TL7705AIDG4
TL7705AIDR
TL7705AIDRE4
TL7705AIDRG4
TL7705AIP
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7705AIPE4
P
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7705AMFKB
TL7705AMJG
TL7705AMJGB
TL7709ACD
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
LCCC
CDIP
CDIP
SOIC
FK
JG
JG
D
20
8
TBD
TBD
TBD
Call TI
Call TI
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Call TI
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7709ACDE4
TL7709ACDR
TL7709ACDRE4
TL7709ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
D
D
D
P
P
8
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7709ACPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7709AID
TL7709AIP
TL7712ACD
OBSOLETE
OBSOLETE
ACTIVE
SOIC
PDIP
SOIC
D
P
D
8
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7712ACDE4
TL7712ACDR
TL7712ACDRE4
TL7712ACP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
D
D
D
P
8
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
CU NIPDAU N / A for Pkg Type
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
31-Oct-2006
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
(RoHS)
TL7712ACPE4
ACTIVE
PDIP
P
8
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7712AID
TL7712AIP
TL7715ACD
OBSOLETE
OBSOLETE
ACTIVE
SOIC
PDIP
SOIC
D
P
D
8
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7715ACDE4
TL7715ACP
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
PDIP
D
P
P
8
8
8
75 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7715ACPE4
50
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7715AID
TL7715AIP
OBSOLETE
OBSOLETE
SOIC
PDIP
D
P
8
8
TBD
TBD
Call TI
Call TI
Call TI
Call TI
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 3
MECHANICAL DATA
MCER001A – JANUARY 1995 – REVISED JANUARY 1997
JG (R-GDIP-T8)
CERAMIC DUAL-IN-LINE
0.400 (10,16)
0.355 (9,00)
8
5
0.280 (7,11)
0.245 (6,22)
1
4
0.065 (1,65)
0.045 (1,14)
0.310 (7,87)
0.290 (7,37)
0.063 (1,60)
0.015 (0,38)
0.020 (0,51) MIN
0.200 (5,08) MAX
0.130 (3,30) MIN
Seating Plane
0.023 (0,58)
0.015 (0,38)
0°–15°
0.100 (2,54)
0.014 (0,36)
0.008 (0,20)
4040107/C 08/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
MECHANICAL DATA
MPDI001A – JANUARY 1995 – REVISED JUNE 1999
P (R-PDIP-T8)
PLASTIC DUAL-IN-LINE
0.400 (10,60)
0.355 (9,02)
8
5
0.260 (6,60)
0.240 (6,10)
1
4
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.020 (0,51) MIN
0.015 (0,38)
Gage Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.021 (0,53)
0.430 (10,92)
MAX
0.010 (0,25)
M
0.015 (0,38)
4040082/D 05/98
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001
For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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