TL7770-5_06 [TI]
DUAL POWER-SUPPLY SUPERVISORS; 双电源监事
| 型号： | TL7770-5_06 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL POWER-SUPPLY SUPERVISORS |
| 文件： | 总15页 (文件大小：389K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
DW OR N PACKAGE
(TOP VIEW)
Power-On Reset Generator
Automatic Reset Generation After Voltage
Drop
V
1RESIN
1CT
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CC
RESET Defined When V
Exceeds 1 V
2RESIN
CC
2CT
1RESET
1RESET
1VSU
Wide Supply-Voltage Range . . . 3.5 V
to 18 V
2RESET
2RESET
2VSU
Precision Overvoltage and Undervoltage
Sensing
1VSO
2VSO
2SCR DRIVE
1SCR DRIVE
GND
250-mA Peak Output Current for Driving
SCR Gates
2-mA Active-Low SCR Gate Drive for
False-Trigger Protection
Temperature-Compensated Voltage
Reference
True and Complementary Reset Outputs
Externally Adjustable Output Pulse
Duration
description
The TL7770 is an integrated-circuit system supervisor designed for use as a reset controller in microcomputer
and microprocessor power-supply systems. This device contains two independent supply-voltage supervisors
that monitor the supplies for overvoltage and undervoltage conditions at the VSO and VSU terminals,
respectively. When V attains the minimum voltage of 1 V during power up, the RESET output becomes active
CC
(low). As V approaches 3.5 V, the time-delay function activates, latching RESET and RESET active (high and
CC
low, respectively) for a time delay (t ) after system voltages have achieved normal levels. Above V
= 3.5 V,
d
CC
taking RESIN low activates the time-delay function during normal system-voltage levels. To ensure that the
microcomputer system has reset, the outputs remain active until the voltage at VSU exceeds the threshold
value, V , for a time delay, which is determined by an external timing capacitor such that:
IT+
td
20 103 capacitance
where t is in seconds and capacitance is in farads.
d
Theovervoltage-detectioncircuitisprogrammableforawiderangeofdesigns. Duringanovervoltagecondition,
an internal silicon-controlled rectifier (SCR) is triggered, providing 250-mA peak instantaneous current and
25-mA continuous current to the SCR gate drive terminal, which can drive an external high-current SCR gate
or an overvoltage-warning circuit.
The TL7770C series is characterized for operation from 0°C to 70°C. The TL7770I series is characterized for
operation from –40°C to 85°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1999, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
AVAILABLE OPTIONS
PACKAGED DEVICES
CHIP FORM
(Y)
T
A
SMALL OUTLINE
PLASTIC DIP
(DW)
(N)
TL7770-5CDW
TL7770-12CDW
TL7770-5CN
TL7770-12CN
TL7770-5Y
TL7770-12Y
0°C to 70°C
–40°C to 85°C
TL7770-5IDW
TL7770-5IN
—
DW package is available taped and reeled. Add the suffix R to the device type
(e.g., TL7770-5CDWR). Chip forms are tested at 25°C.
functional block diagram (each channel)
V
CC
V
ref
65 µA (TYP)
CT
RESET
RESET
VSU
R1
R2
RESIN
VSO
1 VSU
2 VSU
SCR DRIVE
DEVICE
†
†
R2
R1
R2
R1
TL7770-5
TL7770-12
24 kΩ
70 kΩ
10 kΩ
10 kΩ
Short
Short
Open
Open
2 mA
(TYP)
†
The values listed are nominal.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
timing requirements
V
IT+
IT–
V
VSU
V
CC
= 1 V (TYP)
t
t
t
d
d
d
V
V
OH
RESET
OL
Undefined Operation
for V Less Than 1 V
CC
V
T
VSO
V
V
OH
SCR DRIVE
OL
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 V
CC
Input voltage range, V : 1VSU, 2VSU, 1VSO, and 2VSO (see Note 1) . . . . . . . . . . . . . . . . . . . . –0.3 V to 18 V
Low-level output current (1RESET and 2RESET), I
High-level output current (1RESET and 2RESET), I
Package thermal impedance, θ (see Notes 2 and 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . 57°C/W
I
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –20 mA
OL
OH
JA
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88°C/W
Lead temperature 1,6 mm (1/16 in) from case for 10 seconds: DW or N package . . . . . . . . . . . . . . . . . 260°C
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
stg
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values are with respect to the network ground terminal.
2. Maximum power dissipation is a function of T (max), θ , and T . The maximum allowable power dissipation at any allowable
J
JA
A
ambient temperature is P = (T (max) – T )/θ . Operating at the absolute maximum T of 150°C can impact reliability.
D
J
A
JA
J
3. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
recommended operating conditions
MIN
3.5
0
MAX
18
18
5
UNIT
V
Supply voltage, V
CC
Input voltage range, V (see Note 4)
1VSU, 2VSU, 2VSO, 1VSO
V
I
Output voltage, V (1CT, 2CT)
V
O
High-level input voltage range, V (1RESIN, 2RESIN)
IH
2
0
18
0.8
50
–16
16
25
10
70
85
V
Low-level input voltage range, V (1RESIN, 2RESIN)
IL
V
Output sink current, I (1CT, 2CT)
µA
mA
mA
mA
µF
°C
°C
O
High-level output current, I
(1RESET, 2RESET)
(1RESET, 2RESET)
OH
Low-level output current, I
OL
Continuous output current, I (1SCR DRIVE, 2SCR DRIVE)
O
Timing capacitor, C
T
TL7770C series
TL7770I series
0
Operating free-air temperature, T
A
–40
NOTE 4: The algebraic convention, in which the least positive (most negative) value is designated minimum, is used in this data sheet for logic
voltage levels only.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
electrical characteristics over recommended operating conditions (unless otherwise noted)
supply supervisor section
TL7770-5C
TL7770-12C
TL7770-5I
TEST
CONDITIONS
PARAMETER
UNIT
†
‡
MIN TYP
MAX
RESET
I
I
I
= –15 mA
= –20 mA
= 15 mA
V
V
–1.5
OH
OH
OL
CC
V
V
High-level output voltage
Low-level output voltage
V
V
OH
SCR DRIVE
–1.5
CC
RESET
0.4
4.64
OL
TL7770-5 (5-V sense, 1VSU)
TL7770-12 (12-V sense, 1VSU)
4.46
Undervoltage input threshold
at VSU (negative-going)
10.68
11.12
V
IT–
T
= MIN to MAX
V
A
TL7770-5, TL7770-12
(programmable sense, 2VSU)
1.47
1.53
TL7770-5 (5-V sense, 1VSU)
TL7770-12 (12-V sense, 1VSU)
15
36
Hysteresis at VSU
V
V
T
= MIN to MAX
= MIN to MAX
mV
hys
A
(V
IT+
– V
)
IT–
TL7770-5, TL7770-12
(programmable sense, 2VSU)
5
Overvoltage threshold at VSO
Input current
TL7770-5, TL7770-12 (VSO)
T
A
2.48
250
2.68
–10
2
V
T
RESIN
V = 5.5 V or 0.4 V
I
I
I
µA
VSO
V = 2.4 V
0.5
I
I
I
I
High-level output current
Low-level output current
Peak output current
RESET
RESET
SCR DRIVE
V
V
= 18 V
= 0
50
µA
µA
OH
OL
OH
O
–50
O
Duration = 1 ms
mA
†
‡
For conditions shown as MIN or MAX, use the appropriate value specified in the recommended operating conditions.
Typical values are at V = 5 V, T = 25°C.
CC
A
total device
TL7770-5C
TL7770-12C
TL7770-5I
†
PARAMETER
UNIT
TEST CONDITIONS
‡
MIN TYP
MAX
§
V
Power-up reset voltage
Supply current
V
= VSU
0.8
1
V
res
CC
1VSU = 18 V, 2VSU = 2 V,
1RESIN and 2RESIN at V
1VSO and 2VSO at 0 V
T
= 25°C
5
A
,
I
mA
CC
CC
T
A
= MIN to MAX
6.5
†
‡
§
For conditions shown as MIN or MAX, use the appropriate value specified in the recommended operating conditions.
Typical values are at V = 5 V, T = 25°C.
This is the lowest voltage at which RESET becomes active.
CC
A
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
electrical characteristics over recommended operating conditions (unless otherwise noted)
supply supervisor section
TL7770-5Y
TL7770-12Y
TEST
CONDITIONS
PARAMETER
UNIT
†
MIN TYP
MAX
4.64
TL7770-5 (5-V sense, 1VSU)
TL7770-12 (12-V sense, 1VSU)
4.46
Undervoltage input threshold at VSU
(negative-going)
10.68
11.12
V
IT–
T
A
= MIN to MAX
V
TL7770-5, TL7770-12
(programmable sense, 2VSU)
1.47
1.53
TL7770-5 (5-V sense, 1VSU)
TL7770-12 (12-V sense, 1VSU)
15
36
Hysteresis at VSU
V
V
T
= MIN to MAX
= MIN to MAX
mV
hys
A
(V
IT+
– V
)
IT–
TL7770-5, TL7770-12
(programmable sense, 2VSU)
5
Overvoltage threshold at VSO
Input current
TL7770-5, TL7770-12 (VSO)
VSO
T
A
2.48
2.68
V
T
I
I
V = 2.4 V
0.5
µA
I
†
Typical values are at V
CC
= 5 V, T = 25°C.
A
total device
TL7770-5Y
TL7770-12Y
PARAMETER
TEST CONDITIONS
UNIT
†
MIN TYP
MAX
‡
V
Power-up reset voltage
Supply current
V
= VSU,
V
= 0.4 V, I = 1 mA
OL
0.8
V
res
CC
OL
T = 25°C
A
1VSU = 18 V, 2VSU = 2 V,
1RESIN and 2RESIN at V
1VSO and 2VSO at 0 V
I
,
5
mA
CC
CC
†
‡
Typical values are at V
CC
= 5 V, T = 25°C.
A
This is the lowest voltage at which RESET becomes active.
switching characteristics, V
= 5 V, C open, T = 25°C
CC
T
A
FROM
(INPUT)
TO
TEST
PARAMETER
MIN
TYP
MAX
UNIT
(OUTPUT) CONDITIONS
t
t
t
t
t
t
Propagation delay time, low-to-high-level output
RESET
270
270
500
500
75
ns
ns
RESIN
RESIN
PLH
Propagation delay time, high-to-low-level output
RESET
PHL
Rise time
Fall time
Rise time
Fall time
See Figures 1
r
f
r
f
RESET
and 3
ns
ns
ns
150
75
RESET
50
See Figure 2a
See Figure 2b
150
100
RESIN
VSU
t
Minimum effective pulse duration
w(min)
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
PARAMETER MEASUREMENT INFORMATION
5 V
5 V
V
CC
511 Ω
DUT
RESET
DUT
15 pF
RESET
(see Note A)
15 pF
(see Note A)
511 Ω
GND
RESET OUTPUT CONFIGURATION
RESET OUTPUT CONFIGURATION
NOTE A: This includes jig and probe capacitance.
Figure 1. RESET and RESET Output Configurations
t
t
w
w
5 V
V
+ 2 V
– 2 V
IT
2.5 V
0 V
V
V
IT
IT
a) RESIN
b) VSU
WAVEFORMS
Figure 2. Input Pulse Definition
Voltage
Fault
V
IT+
V
IT+
V
IT–
VSU
0 V
V
IH
Undefined
RESIN
RESET
2 V
0.8 V
V
V
IL
t
t
t
f
r
PLH
OH
90%
90%
90%
50%
50%
10%
90%
t
t
t
t
d
d
f
d
RESET
10%
r
10%
10%
10%
V
OL
t
t
PHL
Figure 3. Voltage Waveforms
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TL7770-5, TL7770-12
DUAL POWER-SUPPLY SUPERVISORS
SLVS019F – OCTOBER 1987 – REVISED JULY 1999
APPLICATION INFORMATION
V
S
System Supply
16
CC
10 kΩ
V
4
3
5
1
1VSU
1RESET
To System Reset
Reset Input
(from system)
1RESIN
R
T
(see Note B)
2
To System Reset
1CT
1RESET
GND
C
T
10 kΩ
8
NOTE B: WhenV
CC
and1VSUareconnectedtothesamepoint,itisrecommendedthatseriesresistance(R )beaddedbetweenthetime-delay
T
programming capacitor (C ) and the voltage-supervisor device terminal (1CT). The suggested R value is given by:
T
T
VI VIT
RT
3 , where VI
the lesser of 7.1 V or VS
1
10
Whenthisseriesresistorisused, thet calculationisasfollows:
d
5
(
)
5
1.3
6.5E
10
RT
td
CT
5
6.5 10
Figure 4. System Reset Controller With Undervoltage Sensing
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
CDIP
LCCC
CDIP
SOIC
Drawing
5962-9093201MEA
5962-9093202M2A
5962-9093202MEA
TL7770-12CDW
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
J
FK
J
16
20
16
16
TBD
TBD
TBD
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DW
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7770-12CDWE4
TL7770-12CDWR
TL7770-12CDWRE4
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
DW
DW
DW
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7770-12CN
TL7770-12MJB
TL7770-5CDW
OBSOLETE
OBSOLETE
ACTIVE
PDIP
CDIP
SOIC
N
J
16
16
16
TBD
TBD
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DW
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7770-5CDWE4
TL7770-5CDWR
TL7770-5CDWRE4
TL7770-5CN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
SOIC
DW
DW
DW
N
16
16
16
16
16
16
16
16
16
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
TL7770-5CNE4
TL7770-5IDW
N
25
Pb-Free
(RoHS)
CU NIPDAU N / A for Pkg Type
DW
DW
DW
DW
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7770-5IDWE4
TL7770-5IDWR
TL7770-5IDWRE4
40 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
TL7770-5MFKB
TL7770-5MJB
TL7770-5QDW
TL7770-5QDWR
TL7770-5QN
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
OBSOLETE
LCCC
CDIP
SOIC
SOIC
PDIP
FK
J
20
16
16
16
16
TBD
TBD
TBD
TBD
TBD
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DW
DW
N
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Jul-2006
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
MECHANICAL DATA
MLCC006B – OCTOBER 1996
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINAL SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.739
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/D 10/96
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold plated.
E. Falls within JEDEC MS-004
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相关型号：
TL7780-15CD
IC IC,VOLT DETECTOR,FIXED,+13.64V,BIPOLAR,SOP,16PIN,PLASTIC, Power Management Circuit
TI
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