TLC2254QDREP [TI]
VERY LOW-POWER OPERATIONAL AMPLIFIERS; 超低功耗运算放大器
| 型号： | TLC2254QDREP |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | VERY LOW-POWER OPERATIONAL AMPLIFIERS |
| 文件： | 总37页 (文件大小：863K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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SGLS216 − NOVEMBER 2003
D
Controlled Baseline
− One Assembly/Test Site, One Fabrication
Site
D
Output Swing Includes Both Supply Rails
Low Noise . . . 19 nV/√Hz Typ at f = 1 kHz
Low Input Bias Current . . . 1 pA Typ
D
D
D
D
D
D
D
D
Extended Temperature Performance of
−40°C to 125°C
Enhanced Diminishing Manufacturing
Sources (DMS) Support
Fully Specified for Both Single-Supply and
Split-Supply Operation
D
Very Low Power . . . 35 µA Per Channel Typ
Common-Mode Input Voltage Range
Includes Negative Rail
D
Enhanced Product-Change Notification
†
Qualification Pedigree
D
Low Input Offset Voltage
ESD Protection Exceeds 2000 V Per
850 µV Max at T = 25°C (TLC225xA)
A
MIL-STD-883, Method 3015; Exceeds 150 V
(TLC2252/52A) and 100 V (TLC2254/54A)
Using Machine Model (C = 200 pF, R = 0)
D
Macromodel Included
D
Performance Upgrades for the TS27L2/L4
and TLC27L2/L4
†
Component qualification in accordance with JEDEC and industry
standards to ensure reliable operation over an extended
temperature range. This includes, but is not limited to, Highly
Accelerated Stress Test (HAST) or biased 85/85, temperature
cycle, autoclave or unbiased HAST, electromigration, bond
intermetallic life, and mold compound life. Such qualification
testing should not be viewed as justifying use of this component
beyond specified performance and environmental limits.
EQUIVALENT INPUT NOISE VOLTAGE
description
vs
FREQUENCY
60
The TLC2252 and TLC2254 are dual and
quadruple operational amplifiers from Texas
Instruments. Both devices exhibit rail-to-rail
output performance for increased dynamic range
in single- or split-supply applications. The
TLC225x family consumes only 35 µA of supply
current per channel. This micropower operation
makes them good choices for battery-powered
applications. The noise performance has been
dramatically improved over previous generations
of CMOS amplifiers. Looking at Figure 1, the
TLC225x has a noise level of 19 nV/√Hz at 1kHz;
four times lower than competitive micropower
solutions.
V
= 5 V
= 20 Ω
= 25°C
DD
R
T
A
S
50
40
30
20
10
0
The TLC225x amplifiers, exhibiting high input
impedance and low noise, are excellent for
small-signal conditioning for high-impedance
sources, such as piezoelectric transducers.
Because of the micropower dissipation levels,
these devices work well in hand-held monitoring
and remote-sensing applications. In addition, the
rail-to-rail output feature with single or split
1
2
3
4
10
10
10
10
f − Frequency − Hz
Figure 1
supplies makes this family a great choice when interfacing with analog-to-digital converters (ADCs). For
precision applications, the TLC225xA family is available and has a maximum input offset voltage of 850 µV. This
family is fully characterized at 5 V and 5 V.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Advanced LinCMOS is a trademark of Texas Instruments.
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Copyright 2003 Texas Instruments Incorporated
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1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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SGLS216 − NOVEMBER 2003
description/ordering information (continued)
The TLC2252/4 also makes great upgrades to the TLC27L2/L4 or TS27L2/L4 in standard designs. They offer
increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set
allows them to be used in a wider range of applications. For applications that require higher output drive and
wider input voltage ranges, see the TLV2432 and TLV2442 devices. If the design requires single amplifiers,
please see the TLV2211/21/31 family. These devices are single rail-to-rail operational amplifiers in the SOT-23
package. Their small size and low power consumption, make them ideal for high density, battery-powered
equipment.
ORDERING INFORMATION
V
max
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
IO
†
PACKAGE
T
A
AT 25°C
850 µV
SOIC (D)
SOIC (D)
SOIC (D)
SOIC (D)
Tape and reel
Tape and reel
Tape and reel
Tape and reel
TLC2252AQDREP
TLC2252QDREP
TLC2254AQDREP
TLC2254QDREP
2252AE
1550 µV
850 µV
2252EP
−40°C to 125°C
TLC2254AEP
TLC2254EP
1550 µV
†
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available
at www.ti.com/sc/package.
TLC2254, TLC2254A
D PACKAGE
TLC2252, TLC2252A
D PACKAGE
(TOP VIEW)
(TOP VIEW)
1OUT
1IN−
1IN+
V
1
2
3
4
5
6
7
14
13
12
11
10
9
1
2
3
4
8
7
6
5
1OUT
1IN−
1IN+
4OUT
4IN−
4IN+
DD+
2OUT
2IN−
2IN+
V
/GND
V
V
/GND
DD−
DD+
DD−
2IN+
2IN−
2OUT
3IN+
3IN−
3OUT
8
2
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SGLS216 − NOVEMBER 2003
equivalent schematic (each amplifier)
V
DD+
Q3
Q6
Q9
Q12
Q14
Q16
R6
IN+
IN−
OUT
C1
R5
Q1
Q4
Q13
Q15
Q17
D1
Q2
R3
Q5
R4
Q7
Q8
Q10
Q11
R1
R2
V
DD−/GND
†
ACTUAL DEVICE COMPONENT COUNT
COMPONENT
Transistors
TLC2252
TLC2254
38
30
9
76
56
18
6
Resistors
Diodes
Capacitors
3
†
Includes both amplifiers and all ESD, bias, and trim circuitry
3
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SGLS216 − NOVEMBER 2003
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V
DD+
DD−
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V
ID
Input voltage, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
I
Input current, I (each input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
O
Total current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
DD+
DD−
Total current out of V
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : Q suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40°C to 125°C
A
Storage temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
and V
.
DD+
DD −
2. Differential voltages are at IN+ with respect to IN−. Excessive current flows when input is brought below V
− 0.3 V.
DD−
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D−8
724 mW
5.8 mW/°C
7.6 mW/°C
464 mW
377 mW
144 mW
D−14
950 mW
608 mW
450 mW
190 mW
recommended operating conditions
MIN
MAX
UNIT
Supply voltage, V
DD
2.2
8
V
V
Input voltage range, V
V
V
V
V
−1.5
−1.5
I
DD−
DD+
Common-mode input voltage, V
IC
V
DD−
−40
DD+
125
Operating free-air temperature, T
°C
A
‡
Referenced to 2.5 V
4
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SGLS216 − NOVEMBER 2003
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC2252-EP
TLC2252A-EP
MIN TYP MAX
†
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP MAX
25°C
200 1500
1750
200
850
V
IO
Input offset voltage
µV
Full range
1000
Temperature coefficient
of input offset voltage
25°C
to 125°C
α
VIO
0.5
0.5
µV/°C
Input offset voltage
long-term drift
(see Note 4)
V
V
=
2.5 V,
V
R
= 0,
= 50 Ω
S
DD
= 0,
IC
25°C
0.003
0.5
0.003
0.5
µV/mo
O
25°C
Full range
25°C
60
1000
60
60
1000
60
I
I
Input offset current
Input bias current
pA
pA
IO
1
1
IB
Full range
1000
1000
0
to
4
−0.3
to
4.2
0
to
4
−0.3
to
4.2
25°C
Common-mode input
voltage range
V
V
V
R
= 50 Ω,
|V | ≤5 mV
IO
V
V
ICR
OH
OL
S
0
to
3.5
0
to
3.5
Full range
I
I
I
= −20 µA
= −75 µA
25°C
25°C
4.98
4.94
4.98
4.94
OH
OH
OH
4.9
4.8
4.8
4.9
4.8
4.8
High-level output
voltage
Full range
25°C
= −150 µA
4.88
0.01
0.09
4.88
0.01
0.09
V
IC
= 2.5 V,
I
I
= 50 µA
25°C
OL
25°C
0.15
0.15
1
0.15
0.15
1
V
IC
= 2.5 V,
= 2.5 V,
= 500 µA
Low-level output
voltage
OL
Full range
25°C
V
0.8
350
0.7
350
V
IC
I
= 4 mA
OL
Full range
25°C
1.2
1.2
100
10
100
10
‡
R
R
= 100 kΩ
Large-signal differential
voltage amplification
V
IC
V
O
= 2.5 V,
= 1 V to 4 V
L
L
Full range
25°C
A
VD
V/mV
‡
1700
1700
= 1 MΩ
Differential input
resistance
12
10
12
10
Ω
Ω
r
r
25°C
25°C
25°C
25°C
id
ic
Common-mode input
resistance
12
10
12
10
Common-mode input
capacitance
c
z
f = 10 kHz,
f = 25 kHz,
f = 10 kHz,
8
8
pF
Ω
ic
o
Closed-loop output
impedance
A
V
= 10
200
83
200
83
25°C
70
70
70
70
Common-mode
rejection ratio
V
R
= 0 to 2.7 V,
= 50 Ω
V
O
= 2.5 V,
IC
S
CMRR
dB
dB
µA
Full range
Supply-voltage
rejection ratio
25°C
80
80
95
70
80
80
95
70
V
V
= 4.4 V to 16 V,
DD
IC
k
SVR
= V
/2,
No load
DD
Full range
(∆V
/∆V )
DD
IO
25°C
125
150
125
150
I
Supply current
V
O
= 2.5 V,
No load
DD
Full range
†
‡
Full range is −40°C to 125°C for Q suffix.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
5
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SGLS216 − NOVEMBER 2003
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC2252-EP
TLC2252A-EP
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
25°C
0.07
0.12
0.07
0.12
Slew rate at unity
gain
V
R
= 0.5 V to 3.5 V,
= 100 kΩ ,
O
L
SR
V/µs
Full
range
‡
‡
C
= 100 pF
L
0.05
0.05
f = 10 Hz
f = 1 kHz
25°C
25°C
36
19
36
19
Equivalent input
noise voltage
nV/√Hz
V
n
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
25°C
25°C
0.7
1.1
0.7
1.1
V
I
µV
N(PP)
Equivalent input
noise current
25°C
25°C
0.6
0.6
fA√Hz
n
Total harmonic
distortion plus
noise
V
= 0.5 V to 2.5 V,
A
= 1
0.2%
1%
0.2%
1%
O
V
f = 10 kHz,
THD + N
‡
A
V
= 10
R
= 50 kΩ
L
‡
Gain-bandwidth
product
f = 50 kHz,
R
= 50 kΩ ,
L
25°C
25°C
0.2
30
0.2
30
MHz
kHz
‡
C
= 100 pF
L
Maximum output-
swing bandwidth
V
R
= 2 V,
= 50 kΩ ,
A
= 1,
O(PP)
L
V
B
OM
‡
‡
C
= 100 pF
L
L
Phase margin at
unity gain
φ
m
25°C
25°C
63°
63°
‡
‡
R
= 50 kΩ ,
C
= 100 pF
L
Gain margin
15
15
dB
†
‡
Full range is −40°C to 125°C for Q suffix.
Referenced to 2.5 V
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢎ
ꢜ
ꢊ
ꢋ
ꢌ
ꢙ
ꢍ
ꢇ
ꢎ
ꢕ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
ꢊ
ꢗ
ꢇ
ꢕꢘ
ꢁ
ꢓ
ꢙ
ꢆ
ꢈ
ꢓ
ꢓ
ꢈ
ꢇ
ꢕ
ꢊꢀ
ꢖ
ꢓ
ꢚ
ꢊ
ꢁ
ꢒ
ꢈ
ꢁ
ꢖ
ꢛ
ꢖ
ꢇ
ꢕ
ꢔ
SGLS216 − NOVEMBER 2003
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC2252-EP
TLC2252A-EP
†
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
TYP
MAX
1500
1750
MIN
TYP
MAX
25°C
200
200
850
V
IO
Input offset voltage
µV
Full range
1000
Temperature coefficient of
input offset voltage
25°C
to 125°C
α
0.5
0.5
µV/°C
µV/mo
VIO
Input offset voltage long-
term drift (see Note 4)
V
= 0,
= 50 Ω
V
O
= 0,
IC
R
25°C
0.003
0.5
0.003
0.5
S
25°C
Full range
25°C
60
1000
60
60
1000
60
I
I
Input offset current
Input bias current
pA
pA
IO
1
1
IB
Full range
1000
1000
−5
to
4
−5.3
to
4.2
−5
to
4
−5.3
to
4.2
25°C
Common-mode input
voltage range
V
V
V
R
= 50 Ω, |V | ≤5 mV
S IO
V
V
ICR
−5
to
3.5
−5
to
3.5
Full range
I
O
= −20 µA
25°C
25°C
4.98
4.93
4.98
4.93
4.9
4.7
4.8
4.9
4.7
4.8
Maximum positive peak
output voltage
I
= −100 µA
= −200 µA
OM+
OM−
O
O
Full range
25°C
I
4.86
4.86
V
IC
= 0,
I
I
= 50 µA
25°C
−4.99
−4.99
O
25°C
−4.85 −4.91
−4.85 −4.91
−4.85
V
IC
= 0,
= 500 µA
Maximum negative
peak output voltage
O
Full range −4.85
V
25°C
Full range
25°C
−4
−3.8
40
−4.3
150
−4
−3.8
40
−4.3
V
V
= 0,
I
O
= 4 mA
IC
150
R
R
= 100 kΩ
= 1 MΩ
Large-signal differential
voltage amplification
L
L
Full range
25°C
10
10
A
VD
=
4 V
V/mV
O
3000
3000
Differential input
resistance
12
10
12
10
Ω
Ω
r
r
25°C
25°C
25°C
25°C
id
ic
Common-mode input
resistance
12
10
12
10
Common-mode input
capacitance
c
z
f = 10 kHz,
f = 25 kHz,
P package
= 10
8
8
pF
Ω
ic
o
Closed-loop output
impedance
A
V
190
88
190
88
25°C
Full range
25°C
75
75
80
80
75
75
80
80
Common-mode
rejection ratio
V
IC
V
O
= −5 V to 2.7 V,
= 0,
CMRR
dB
dB
µA
R = 50 Ω
S
95
80
95
80
Supply-voltage rejection
V
V
=
2.2 V to 8 V,
DD
IC
k
SVR
ratio (∆V
DD
/∆V
IO
)
= 0, No load
Full range
25°C
125
150
125
150
I
Supply current
V
O
= 2.5 V, No load
DD
Full range
†
Full range is −40°C to 125°C for Q suffix.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC2252-EP
TLC2252A-EP
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
25°C
0.07
0.12
0.07
0.12
V
C
=
2 V,
R
= 100 kΩ,
L
O
L
SR
Slew rate at unity gain
V/µs
Full
range
= 100 pF
0.05
0.05
f = 10 Hz
25°C
25°C
25°C
25°C
38
19
38
19
Equivalent input noise
voltage
nV/√Hz
V
n
f = 1 kHz
f = 0.1 Hz to 1 Hz
0.8
1.1
0.8
1.1
Peak-to-peak equivalent
input noise voltage
V
I
µV
N(PP)
f = 0.1 Hz to 10 Hz
Equivalent input noise
current
25°C
0.6
0.6
fA√Hz
n
V
R
=
2.3 V,
A
= 1
0.2%
1%
0.2%
1%
O
L
V
Total harmonic distortion
plus noise
= 50 kΩ,
THD + N
25°C
A
V
= 10
f = 10 kHz
f =10 kHz,
R
= 50 kΩ,
L
Gain-bandwidth product
25°C
25°C
0.21
14
0.21
14
MHz
kHz
C
= 100 pF
L
Maximum output-swing
bandwidth
V
R
= 4.6 V, A = 1,
O(PP) V
B
OM
= 50 kΩ,
= 50 kΩ,
C
C
= 100 pF
= 100 pF
L
L
L
L
Phase margin at unity
gain
φ
m
25°C
25°C
63°
63°
R
Gain margin
15
15
dB
†
Full range is −40°C to 125°C for Q suffix.
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢎ
ꢜ
ꢊ
ꢋ
ꢌ
ꢙ
ꢍ
ꢇ
ꢎ
ꢕ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
ꢊ
ꢗ
ꢇ
ꢕꢘ
ꢁ
ꢓ
ꢙꢆ
ꢈ
ꢓ
ꢓ
ꢈ
ꢇ
ꢕ
ꢊꢀ
ꢖ
ꢓ
ꢚ
ꢊ
ꢁ
ꢒ
ꢈ
ꢁ
ꢖ
ꢛ
ꢖ
ꢇ
ꢕ
ꢔ
SGLS216 − NOVEMBER 2003
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC2254-EP
TLC2254A-EP
MIN TYP MAX
†
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP MAX
25°C
200 1500
1750
200
0.5
850
V
Input offset voltage
µV
IO
Full range
1000
Temperature
coefficient of input
offset voltage
25°C
to 125°C
α
VIO
0.5
µV/°C
Input offset voltage
long-term drift
(see Note 4)
V
V
=
2.5 V,
V
R
= 0,
= 50 Ω
S
DD
= 0,
IC
25°C
0.003
0.5
0.003
0.5
µV/mo
O
25°C
125°C
25°C
60
1000
60
60
1000
60
I
I
Input offset current
Input bias current
pA
pA
IO
1
1
IB
125°C
1000
1000
0
to
4
−0.3
to
4.2
0
to
4
−0.3
to
4.2
25°C
Common-mode input
voltage range
V
R
= 50 Ω,
|V | ≤5 mV
IO
V
V
ICR
S
0
to
3.5
0
to
3.5
Full range
I
I
I
= −20 µA
= −75 µA
25°C
25°C
4.98
4.94
4.98
4.94
OH
OH
OH
4.9
4.8
4.8
4.9
4.8
4.8
High-level output
voltage
V
V
OH
Full range
25°C
= −150 µA
4.88
0.01
0.09
4.88
0.01
0.09
V
IC
= 2.5 V,
I
I
= 50 µA
25°C
OL
25°C
0.15
0.15
1
0.15
0.15
1
V
IC
= 2.5 V,
= 2.5 V,
= 500 µA
Low-level output
voltage
OL
Full range
25°C
V
OL
0.8
350
0.7
350
V
IC
I
= 4 mA
OL
Full range
25°C
1.2
1.2
100
10
100
10
Large-signal
differential
voltage amplification
‡
R
R
= 100 kΩ
V
IC
V
O
= 2.5 V,
= 1 V to 4 V
L
L
Full range
25°C
A
VD
V/mV
‡
1700
1700
= 1 MΩ
Differential input
resistance
12
10
12
10
r
r
25°C
25°C
25°C
25°C
Ω
Ω
i(d)
i(c)
Common-mode input
resistance
12
10
12
10
Common-mode input
capacitance
c
z
f = 10 kHz,
f = 25 kHz,
N package
8
8
pF
Ω
i(c)
o
Closed-loop output
impedance
A
V
= 10
200
83
200
83
25°C
70
70
70
70
Common-mode
rejection ratio
V
R
= 0 to 2.7 V,
= 50 Ω
V
= 2.5 V,
O
IC
S
CMRR
dB
dB
µA
Full range
Supply-voltage
rejection ratio
25°C
80
80
95
80
80
95
V
V
= 4.4 V to 16 V,
DD
IC
k
SVR
= V
/2,
No load
DD
Full range
(∆V
/∆V )
DD
IO
25°C
Full range
140
250
300
140
250
300
Supply current
(four amplifiers)
I
V
O
= 2.5 V,
No load
DD
†
‡
Full range is −40°C to 125°C for Q suffix.
Referenced to 2.5 V
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC2254-EP
TLC2254A-EP
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
25°C
0.07
0.12
0.07
0.12
V
R
C
= 0.5 V to 3.5 V,
O
L
L
Slew rate at unity
gain
‡
SR
V/µs
= 100 kΩ ,
Full
range
0.05
0.05
‡
= 100 pF
f = 10 Hz
f = 1 kHz
25°C
25°C
36
19
36
19
Equivalent input
noise voltage
nV/√Hz
V
n
Peak-to-peak
equivalent input
noise voltage
f = 0.1 Hz to 1 Hz
f = 0.1 Hz to 10 Hz
25°C
25°C
0.7
1.1
0.7
1.1
V
I
µV
N(PP)
Equivalent input
noise current
25°C
25°C
0.6
0.6
fA/√Hz
n
Total harmonic
distortion plus
noise
V
= 0.5 V to 2.5 V,
A
= 1
0.2%
1%
0.2%
1%
O
V
f = 20 kHz,
THD + N
‡
A
V
= 10
R
= 50 kΩ
L
‡
Gain-bandwidth
product
f = 50 kHz,
R
= 50 kΩ ,
L
25°C
25°C
0.2
30
0.2
30
MHz
kHz
‡
C
= 100 pF
L
Maximum output-
swing bandwidth
V
R
= 2 V,
= 50 kΩ ,
A
= 1,
O(PP)
L
V
B
OM
‡
‡
C
= 100 pF
L
L
Phase margin at
unity gain
φ
m
25°C
25°C
63°
63°
‡
‡
R
= 50 kΩ ,
C
= 100 pF
L
Gain margin
15
15
dB
†
‡
Full range is −40°C to 125°C for Q suffix.
Referenced to 2.5 V
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢎ
ꢜ
ꢊ
ꢋ
ꢌ
ꢙ
ꢍ
ꢇ
ꢎ
ꢕ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
ꢊ
ꢗ
ꢇ
ꢕ
ꢘ
ꢁ
ꢓ
ꢙꢆ
ꢈ
ꢓ
ꢓ
ꢈ
ꢇ
ꢕ
ꢊꢀ
ꢖ
ꢓ
ꢚ
ꢊ
ꢁ
ꢒ
ꢈ
ꢁ
ꢖ
ꢛ
ꢖ
ꢇ
ꢕ
ꢔ
SGLS216 − NOVEMBER 2003
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC2254-EP
TLC2254A-EP
†
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
TYP
MAX
1500
1750
MIN
TYP
MAX
25°C
200
200
850
V
IO
Input offset voltage
µV
Full range
1000
Temperature coefficient of
input offset voltage
25°C
to 125°C
α
0.5
0.5
µV/°C
µV/mo
VIO
Input offset voltage
long-term drift (see Note 4)
V
= 0,
= 50 Ω
V
O
= 0,
IC
R
25°C
0.003
0.5
0.003
0.5
S
25°C
125°C
25°C
60
1000
60
60
1000
60
I
I
Input offset current
Input bias current
pA
pA
IO
1
1
IB
125°C
1000
1000
−5
to
4
−5.3
to
4.2
−5
to
4
−5.3
to
4.2
25°C
Common-mode input
voltage range
V
V
V
R
= 50 Ω, |V | ≤5 mV
S IO
V
V
ICR
−5
to
3.5
−5
to
3.5
Full range
I
O
= −20 µA
25°C
25°C
4.98
4.93
4.98
4.93
4.9
4.7
4.8
4.9
4.7
4.8
Maximum positive peak
output voltage
I
= −100 µA
= −200 µA
OM+
OM−
O
O
Full range
25°C
I
4.86
4.86
V
IC
= 0,
I
= 50 µA
25°C
−4.99
−4.99
O
O
25°C
−4.85 −4.91
−4.85 −4.91
−4.85
V
IC
= 0,
I
= 500 µA
Maximum negative peak
output voltage
Full range −4.85
V
25°C
Full range
25°C
−4
−3.8
40
−4.3
150
−4
−3.8
40
−4.3
V
V
= 0,
I
O
= 4 mA
IC
150
R
R
= 100 kΩ
= 1 MΩ
Large-signal differential
voltage amplification
L
L
Full range
25°C
10
10
A
VD
=
4 V
V/mV
O
3000
3000
12
10
12
10
r
r
Differential input resistance
25°C
Ω
Ω
i(d)
i(c)
Common-mode input
resistance
12
10
12
10
25°C
25°C
25°C
Common-mode input
capacitance
c
z
f = 10 kHz, N package
f = 25 kHz, = 10
8
8
pF
i(c)
o
Closed-loop output
impedance
A
V
190
88
190
88
Ω
25°C
Full range
25°C
75
75
80
80
75
75
80
80
Common-mode rejection
ratio
V
IC
V
O
= −5 V to 2.7 V,
CMRR
dB
dB
µA
= 0,
R = 50 Ω
S
95
95
Supply-voltage rejection
V
V
=
ā2.2 V to ā8 V,
/2, No load
DD
IC
k
SVR
ratio (∆V
DD
/∆V
IO
)
= V
Full range
25°C
DD
160
250
300
160
250
300
Supply current
(four amplifiers)
I
V
O
= 0,
No load
DD
Full range
†
Full range is −40°C to 125°C for Q suffix.
NOTE 4: Typical values are based on the input offset voltage shift observed through 500 hours of operating life test at T = 150°C extrapolated
A
to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
A
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕ
ꢊ
ꢖ
ꢁ
ꢆ
ꢀ
ꢓ
ꢆ
ꢕ
ꢊ
ꢖ
ꢁ
SGLS216 − NOVEMBER 2003
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC2254-EP
TLC2254A-EP
†
T
A
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
25°C
0.07
0.12
0.07
0.12
V
C
=
2 V,
R
= 100 kΩ,
L
O
L
SR
Slew rate at unity gain
V/µs
Full
range
= 100 pF
0.05
0.05
f = 10 Hz
f = 1 kHz
25°C
25°C
38
19
38
19
Equivalent input noise
voltage
nV/√Hz
V
n
Peak-to-peak
equivalent input noise
voltage
f = 0.1 Hz to 1 Hz
25°C
25°C
0.8
1.1
0.8
1.1
V
I
µV
N(PP)
f = 0.1 Hz to 10 Hz
Equivalent input noise
current
25°C
25°C
0.6
0.6
fA/√Hz
n
V
R
=
2.3 V,
A
= 1
0.2%
1%
0.2%
1%
O
L
V
Total harmonic
distortion plus noise
= 50 kΩ,
THD + N
A
V
= 10
f = 20 kHz
f =10 kHz,
R
= 50 kΩ,
L
Gain-bandwidth product
25°C
25°C
0.21
14
0.21
14
MHz
kHz
C
= 100 pF
L
Maximum output-swing
bandwidth
V
R
= 4.6 V,
= 50 kΩ,
A
= 1,
= 100 pF
O(PP)
L
V
B
OM
C
L
L
Phase margin at unity
gain
φ
m
25°C
25°C
63°
63°
R
= 50 kΩ,
C
= 100 pF
L
Gain margin
15
15
dB
†
Full range is −40°C to 125°C for Q suffix.
12
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SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
Distribution
vs Common-mode input voltage
2 − 5
6, 7
V
IO
Input offset voltage
α
Input offset voltage temperature coefficient
Input bias and input offset currents
Distribution
8 − 11
12
VIO
I
/I
vs Free-air temperature
IB IO
vs Supply voltage
vs Free-air temperature
13
14
V
I
Input voltage range
V
V
V
V
V
High-level output voltage
vs High-level output current
vs Low-level output current
vs Output current
15
16, 17
18
OH
Low-level output voltage
OL
Maximum positive peak output voltage
Maximum negative peak output voltage
Maximum peak-to-peak output voltage
OM+
OM−
O(PP)
vs Output current
19
vs Frequency
20
vs Supply voltage
vs Free-air temperature
21
22
I
Short-circuit output current
OS
V
O
Output voltage
Differential gain
vs Differential input voltage
vs Load resistance
23, 24
25
vs Frequency
vs Free-air temperature
26, 27
28, 29
A
Large-signal differential voltage amplification
Output impedance
VD
z
vs Frequency
30, 31
o
vs Frequency
vs Free-air temperature
32
33
CMRR
Common-mode rejection ratio
Supply-voltage rejection ratio
Supply current
vs Frequency
vs Free-air temperature
34, 35
36
k
SVR
vs Supply voltage
vs Free-air temperature
37
38
I
DD
vs Load capacitance
vs Free-air temperature
39
40
SR
Slew rate
V
O
V
O
V
O
V
O
V
n
Inverting large-signal pulse response
Voltage-follower large-signal pulse response
Inverting small-signal pulse response
Voltage-follower small-signal pulse response
Equivalent input noise voltage
41, 42
43, 44
45, 46
47, 48
49, 50
51
vs Frequency
Noise voltage (referred to input)
Over a 10-second period
vs Frequency
Integrated noise voltage
52
THD + N
Total harmonic distortion plus noise
vs Frequency
53
vs Free-air temperature
vs Supply voltage
54
55
Gain-bandwidth product
vs Frequency
vs Load capacitance
26, 27
56
φ
Phase margin
Gain margin
m
A
B
vs Load capacitance
57
m
Unity-gain bandwidth
vs Load capacitance
vs Load capacitance
58
59
1
Overestimation of phase margin
13
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ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢊ
ꢆ
ꢇ
ꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
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ꢊ
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ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2252
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC2252
INPUT OFFSET VOLTAGE
35
35
682 Amplifiers From 1 Wafer Lots
682 Amplifiers From 1 Wafer Lots
V
=
2.5 V
P Package
= 25°C
V
=
5 V
P Package
= 25°C
DD
DD
30
25
20
15
30
25
20
15
T
A
T
A
10
5
10
5
0
−1.6
0
−1.6
−0.8
0
0.8
1.6
−0.8
0
0.8
1.6
V
IO
− Input Offset Voltage − mV
V
IO
− Input Offset Voltage − mV
Figure 2
Figure 3
DISTRIBUTION OF TLC2254
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC2254
INPUT OFFSET VOLTAGE
20
15
25
20
15
1020 Amplifiers From 1 Wafer Lot
1020 Amplifiers From 1 Wafer Lot
V
T
=
5 V
V
T
=
2.5 V
DD
DD
= 25°C
= 25°C
A
A
10
10
5
5
0
0
−1.6
−0.8
0
0.8
1.6
−1.6
−0.8
0
0.8
1.6
V
IO
− Input Offset Voltage − mV
V
IO
− Input Offset Voltage − mV
Figure 4
Figure 5
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ꢄ
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ꢊ
ꢆ
ꢇ
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ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
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ꢔ
ꢕ
ꢊ
ꢖ
ꢁ
ꢆ
ꢀ
ꢓ
ꢆ
ꢕ
ꢊ
ꢖ
ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
INPUT OFFSET VOLTAGE
INPUT OFFSET VOLTAGE
vs
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
1
1
V
= 5 V
= 50 Ω
= 25°C
DD
V
R
T
A
= 5 V
DD
0.8
R
S
0.8
= 50 Ω
= 25°C
S
T
A
0.6
0.4
0.2
0.6
0.4
0.2
0
0
−0.2
−0.4
−0.2
−0.4
−0.6
−0.8
−1
−0.6
−0.8
−1
−1
0
1
2
3
4
5
−6 −5 −4 −3 −2 −1
0
1
2
3
4
5
V
IC
− Common-Mode Input Voltage − V
V
IC
− Common-Mode Input Voltage − V
Figure 6
Figure 7
DISTRIBUTION OF TLC2252 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLC2252 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
20
15
25
20
15
62 Amplifiers From
P Package
62 Amplifiers From
1 Wafer Lot
1 Wafer Lot
T
A
= 25°C to 125°C
V
= 2.5 V
V
=
5 V
DD
DD
P Package
T
A
= 25°C to 125°C
10
5
10
5
0
0
−1
0
1
2
−1
0
1
2
α
α
VIO
− Temperature Coefficient − µV/°C
− Temperature Coefficient − µV/°C
VIO
Figure 8
Figure 9
†
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
15
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ꢂ
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ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC2254 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
DISTRIBUTION OF TLC2254 INPUT OFFSET
VOLTAGE TEMPERATURE COEFFICIENT
25
20
15
25
20
15
62 Amplifiers From
1 Wafer Lot
62 Amplifiers From
1 Wafer Lot
V
=
2.5 V
DD
V
=
5 V
DD
P Package
P Package
T
A
= 25°C to 125°C
T
A
= 25°C to 125°C
10
5
10
5
0
−2
0
−1
0
1
2
−2
−1
0
1
2
α
VIO
− Temperature Coefficient of
Input Offset Voltage − µV/°C
α
− Temperature Coefficient of
VIO
Input Offset Voltage − µV/°C
Figure 10
Figure 11
†
INPUT VOLTAGE RANGE
vs
INPUT BIAS AND INPUT OFFSET CURRENTS
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
10
8
35
30
25
R
T
A
= 50 Ω
= 25°C
V
V
V
= 2.5 V
= 0
= 0
= 50 Ω
S
DD
IC
O
6
4
R
S
I
IB
2
20
15
0
| V | ≤ 5 mV
IO
−2
−4
I
IO
10
−6
5
0
−8
−10
2
3
4
5
6
7
8
25
45
65
85
105
125
| V
DD
| − Supply Voltage − V
T
A
− Free-Air Temperature − °C
Figure 12
Figure 13
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†‡
†
HIGH-LEVEL OUTPUT VOLTAGE
vs
INPUT VOLTAGE RANGE
vs
HIGH-LEVEL OUTPUT CURRENT
FREE-AIR TEMPERATURE
5
4
3
5
4
3
2
1
V
= 5 V
DD
V
DD
= 5 V
T
= −55°C
A
T
A
= −40°C
= 25°C
T
A
2
1
0
T
A
= 125°C
0
−1
0
200
400
600
800
−75 −55 −35 −15
5
25 45 65 85 105 125
|I
OH
| − High-Level Output Current − µA
T
A
− Free-Air Temperature − °C
Figure 14
Figure 15
†‡
LOW-LEVEL OUTPUT VOLTAGE
vs
‡
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
1.4
1.2
1.2
1
V
V
= 5 V
DD
= 2.5 V
V
T
A
= 5 V
= 25°C
DD
IC
T
A
= 125°C
V
= 1.25 V
IC
V
= 0
IC
1
0.8
0.6
0.4
0.8
0.6
0.4
0.2
0
T
= 25°C
A
V
= 2.5 V
IC
T
A
= −40°C
T
A
= −55°C
0.2
0
0
1
2
3
4
5
6
0
1
2
3
4
5
I − Low-Level Output Current − mA
OL
I
− Low-Level Output Current − mA
OL
Figure 16
Figure 17
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
17
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SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE
†
MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE
vs
vs
OUTPUT CURRENT
OUTPUT CURRENT
5
4
3
−3.8
−4
V
V
= 5 V
DD
= 0
IC
T
= 125°C
A
−4.2
−4.4
T
A
= 25°C
T
= −40°C
A
T
A
= 25°C
T
= −40°C
= −55°C
A
2
1
0
−4.6
−4.8
−5
T
= 125°C
T
A
T
= −55°C
A
A
V
=
5 V
DD
0
200
400
600
800
0
1
2
3
4
5
6
I
O
− Output Current − µA
I
O
− Output Current − mA
Figure 18
Figure 19
‡
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
SHORT-CIRCUIT OUTPUT CURRENT
vs
vs
FREQUENCY
SUPPLY VOLTAGE
10
9
10
R
T
= 50 kΩ
= 25°C
L
A
V
= 5 V
DD
9
8
7
6
5
4
3
2
1
8
7
6
V
ID
= −100 mV
V
T
= 0
= 25°C
= 0
O
A
V
IC
V
DD
= 5 V
5
4
3
2
1
0
0
V
= 100 mV
7
ID
−1
2
3
4
5
10
10
10
10
2
3
4
5
6
8
f − Frequency − Hz
| V
DD
| − Supply Voltage − V
Figure 20
Figure 21
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
18
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ꢏ
ꢐ
ꢋ
ꢁ
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ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
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ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
‡
SHORT-CIRCUIT OUTPUT CURRENT
OUTPUT VOLTAGE
vs
vs
FREE-AIR TEMPERATURE
DIFFERENTIAL INPUT VOLTAGE
11
5
4
3
2
V
R
= 5 V
= 50 kΩ
= 2.5 V
DD
L
V
V
= 0
O
10
9
=
5 V
DD
V
T
IC
A
= 25°C
V
ID
= −100 mV
8
7
6
5
4
3
2
1
0
1
V
ID
= 100 mV
0
−1
0
250 500 750 1000
−75 −50 −25
0
25
50
75
100 125
−1000 −750 −500 −250
V
ID
− Differential Input Voltage − µV
T
A
− Free-Air Temperature − °C
Figure 22
Figure 23
‡
OUTPUT VOLTAGE
vs
DIFFERENTIAL GAIN
vs
DIFFERENTIAL INPUT VOLTAGE
LOAD RESISTANCE
4
10
3
10
2
10
5
3
V
V
= 5 V
V
T
= 2 V
= 25°C
DD
= 0
O (PP)
A
IC
R
T
= 50 kΩ
= 25°C
L
A
V
DD
= 5 V
1
V
DD
= 5 V
−1
−3
−5
10
1
10
2
10
3
10
0
250 500 750 1000
−1000 −750 −500 −250
1
R
− Load Resistance − kΩ
V
ID
− Differential Input Voltage − µV
L
Figure 24
Figure 25
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
19
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ꢜ
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ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
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ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
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SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
†
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
180°
135°
V
R
= 5 V
= 50 kΩ
DD
L
L
C = 100 pF
T
A
= 25°C
40
90°
45°
Phase Margin
20
0
Gain
0°
−20
−40
−45°
−90°
3
4
5
6
7
10
10
10
f − Frequency − Hz
10
10
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE MARGIN
vs
FREQUENCY
80
60
180°
135°
V
=
10 V
DD
L
L
R = 50 kΩ
C = 100 pF
T
A
= 25°C
40
90°
45°
Phase Margin
20
0
Gain
0°
−20
−40
−45°
−90°
3
4
5
6
7
10
10
10
10
f − Frequency − Hz
10
Figure 27
†
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
†‡
†
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
4
3
4
3
10
10
10
10
V
V
V
=
= 0
5 V
V
V
V
= 5 V
= 2.5 V
= 1 V to 4 V
DD
DD
IC
O
IC
O
=
4 V
R
= 1 MΩ
R
= 1 MΩ
L
L
R
= 50 kΩ
R
= 50 kΩ
L
L
2
1
2
10
10
10
1
10
−75 −50 −25
0
25
50
75
100 125
−75 −50 −25
0
25
50
75 100 125
T
A
− Free-Air Temperature − °C
T
A
− Free-Air Temperature − °C
Figure 28
Figure 29
‡
OUTPUT IMPEDANCE
vs
OUTPUT IMPEDANCE
vs
FREQUENCY
FREQUENCY
1000
100
10
1000
100
10
V
T
=
5 V
V
T
= 5 V
= 25°C
DD
A
DD
A
= 25°C
A
V
= 100
A
= 100
V
A
V
= 10
A
= 10
= 1
V
1
1
A
V
A
V
= 1
0.1
10
0.1
10
2
3
4
5
6
10
2
3
4
5
6
10
10
10
f − Frequency − Hz
10
10
10
10
f − Frequency − Hz
Figure 30
Figure 31
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†‡
COMMON-MODE REJECTION RATIO
†
COMMON-MODE REJECTION RATIO
vs
vs
FREE-AIR TEMPERATURE
FREQUENCY
100
80
94
92
90
88
86
84
V
= 5 V
DD
V
= 5 V
DD
V
DD
= 5 V
60
V
DD
= 5 V
40
20
0
82
80
1
10
2
3
4
5
6
16
−75 −50 −25
0
25
50
75
100 125
10
10
10
10
T
A
− Free-Air Temperature − °C
f − Frequency − Hz
Figure 32
Figure 33
†
SUPPLY-VOLTAGE REJECTION RATIO
SUPPLY-VOLTAGE REJECTION RATIO
vs
vs
FREQUENCY
FREQUENCY
100
80
60
40
20
100
80
60
40
20
V
T
= 5 V
V
T
=
5 V
= 25°C
A
DD
= 25°C
DD
k
SVR+
k
SVR+
A
k
SVR−
k
SVR−
0
0
−20
−20
1
2
3
4
5
6
1
2
3
4
5
6
10
10
10
10
10
10
10
10
10
10
10
10
f − Frequency − Hz
f − Frequency − Hz
Figure 34
Figure 35
†
‡
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢊ
ꢆ
ꢇ
ꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
SUPPLY-VOLTAGE REJECTION RATIO
†
SUPPLY CURRENT
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
110
105
240
200
160
120
80
V
V
=
2.2 V to 8 V
DD
= 0
V
= 0
O
O
No Load
T
= −55°C
A
T
A
= 25°C
100
95
T
A
= 125°C
T
= −40°C
A
40
90
0
−75 −50 −25
0
25
50
75
100 125
0
1
2
3
4
5
6
7
8
T
A
− Free-Air Temperature − °C
| V
DD
| − Supply Voltage − V
Figure 36
Figure 37
†‡
‡
SUPPLY CURRENT
vs
SLEW RATE
vs
FREE-AIR TEMPERATURE
LOAD CAPACITANCE
0.2
0.18
0.16
0.14
0.12
0.1
240
200
160
120
80
V
= 5 V
DD
= −1
A
V
T = 25°C
V
V
=
= 0
5 V
A
DD
O
SR−
V
= 5 V
DD
= 2.5 V
V
O
SR+
0.08
0.06
0.04
40
0.02
0
0
1
2
3
4
10
−75 −50 −25
0
25
50
75 100 125
10
10
10
T
A
− Free-Air Temperature − °C
C
− Load Capacitance − pF
L
Figure 38
Figure 39
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†‡
SLEW RATE
vs
INVERTING LARGE-SIGNAL PULSE
‡
RESPONSE
FREE-AIR TEMPERATURE
0.2
5
4
V
= 5 V
V
= 5 V
= 50 kΩ
= 100 pF
= −1
DD
L
L
DD
L
L
R
C
A
= 50 kΩ
= 100 pF
= 1
R
C
A
0.16
0.12
0.08
0.04
0
V
V
A
T
= 25°C
SR−
3
2
SR+
1
0
0
10 20 30 40 50 60 70 80 90 100
−75 −50 −25
0
25
50
75
100 125
t − Time − µs
T
A
− Free-Air Temperature − °C
Figure 40
Figure 41
VOLTAGE-FOLLOWER LARGE-SIGNAL
INVERTING LARGE-SIGNAL PULSE
RESPONSE
‡
PULSE RESPONSE
5
5
V
R
C
= 5 V
= 50 kΩ
= 100 pF
= 1
DD
L
L
V
R
C
= 5 V
DD
L
L
4
3
= 50 kΩ
= 100 pF
= −1
4
3
2
A
V
A
A
V
A
T
= 25°C
T
= 25°C
2
1
0
−1
−2
−3
1
0
−4
−5
0
10 20 30 40 50 60 70 80 90 100
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 42
Figure 43
†
‡
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
For curves where V = 5 V, all loads are referenced to 2.5 V.
DD
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
INVERTING SMALL-SIGNAL
VOLTAGE-FOLLOWER LARGE-SIGNAL
PULSE RESPONSE
†
PULSE RESPONSE
2.65
2.6
5
4
V
= 5 V
V
= 5 V
= 50 kΩ
= 100 pF
= −1
DD
L
L
DD
L
L
R
C
A
= 50 kΩ
= 100 pF
= 1
R
C
A
3
V
A
V
A
T
= 25°C
T
= 25°C
2
2.55
2.5
1
0
−1
−2
−3
2.45
2.4
−4
−5
0
10
20
30
40
50
0
10 20 30 40 50 60 70 80 90 100
t − Time − µs
t − Time − µs
Figure 44
Figure 45
INVERTING SMALL-SIGNAL
PULSE RESPONSE
VOLTAGE-FOLLOWER SMALL-SIGNAL
†
PULSE RESPONSE
0.1
2.65
2.6
V
= 5 V
V
DD
= 5 V
DD
L
L
R
C
A
= 50 kΩ
= 100 pF
= −1
R
C
A
= 50 kΩ
= 100 pF
= 1
L
L
V
V
A
0.05
0
T
= 25°C
T
A
= 25°C
2.55
2.5
−0.05
−0.1
2.45
2.4
0
10
20
30
40
50
0
10
20
30
40
50
t − Time − µs
t − Time − µs
Figure 46
Figure 47
†
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢊ
ꢆ
ꢇ
ꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
EQUIVALENT INPUT NOISE VOLTAGE
VOLTAGE-FOLLOWER SMALL-SIGNAL
PULSE RESPONSE
vs
FREQUENCY
0.1
60
50
40
30
20
V
R
C
= 5 V
DD
L
L
V
R
T
A
= 5 V
= 20 Ω
= 25°C
DD
S
= 50 kΩ
= 100 pF
= 1
A
V
A
T
= 25°C
0.05
0
−0.05
−0.1
10
0
0
10
20
30
40
50
1
2
3
4
10
10
10
10
t − Time − µs
f − Frequency − Hz
Figure 48
Figure 49
EQUIVALENT INPUT NOISE VOLTAGE
EQUIVALENT INPUT NOISE VOLTAGE OVER
vs
†
A 10-SECOND PERIOD
FREQUENCY
1000
750
500
250
0
60
V
=
5 V
V
= 5 V
DD
S
DD
f = 0.1 Hz to 10 Hz
R
T
= 20 Ω
= 25°C
T
A
= 25°C
50
A
40
30
−250
−500
20
10
0
−750
−1000
1
2
3
4
10
0
2
4
6
8
10
10
10
10
f − Frequency − Hz
t − Time − s
Figure 50
Figure 51
†
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
†
TOTAL HARMONIC DISTORTION PLUS NOISE
INTEGRATED NOISE VOLTAGE
vs
vs
FREQUENCY
FREQUENCY
1
100
Calculated Using Ideal Pass-Band Filter
Low Frequency = 1 Hz
A
V
= 100
T
= 25°C
A
10
0.1
A
V
= 10
1
0.01
A
V
= 1
V
R
T
A
= 5 V
= 50 kΩ
= 25°C
DD
L
0.001
0.1
1
2
3
4
5
10
10
10
10
10
1
10
2
3
4
5
10
1
10
10
10
f − Frequency − Hz
f − Frequency − Hz
Figure 52
Figure 53
†‡
GAIN-BANDWIDTH PRODUCT
vs
GAIN-BANDWIDTH PRODUCT
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
280
250
230
210
T
A
= 25°C
V
= 5 V
DD
f = 10 kHz
R
C
= 50 kΩ
= 100 pF
L
L
240
200
160
120
80
190
170
150
0
1
2
3
4
5
6
7
8
−75 −50 −25
0
25
50
75
100 125
T
A
− Free-Air Temperature − °C
| V
DD
| − Supply Voltage − V
Figure 54
Figure 55
†
‡
For curves where V
DD
= 5 V, all loads are referenced to 2.5 V.
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
GAIN MARGIN
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
20
15
10
75°
60°
45°
R
= 200 Ω
T
A
= 25°C
null
R
= 500 Ω
null
R
= 500 Ω
null
R
= 200 Ω
= 100 Ω
null
R
= 100 Ω
R
null
null
R
= 50 Ω
= 10 Ω
null
R
= 50 Ω
= 10 Ω
null
30°
R
null
R
null
50 kΩ
5
0
V
15°
0°
DD +
R
= 0
null
3
50 kΩ
R
null
R
= 0
V
−
+
null
I
C
L
T
= 25°C
A
V
DD −
1
2
3
4
5
10
1
2
4
5
10
10
10
10
10
10
C
10
10
10
C
− Load Capacitance − pF
L
− Load Capacitance − pF
L
Figure 56
Figure 57
†
OVERESTIMATION OF PHASE MARGIN
†
UNITY-GAIN BANDWIDTH
vs
vs
LOAD CAPACITANCE
LOAD CAPACITANCE
25
200
175
150
T
= 25°C
A
T
A
= 25°C
R
= 500 Ω
null
20
15
10
5
125
100
R
= 100 Ω
null
R
= 200 Ω
null
75
50
R
= 50 Ω
= 10 Ω
null
R
null
25
0
10
0
10
1
2
3
4
5
10
1
2
3
4
5
10
10
10
10
10
10
10
C
− Load Capacitance − pF
L
C
− Load Capacitance − pF
L
Figure 58
Figure 59
†
See application information
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢆꢇ ꢈꢉ ꢀ ꢁꢂ ꢃꢃ ꢄꢅ ꢊꢆ ꢇꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗꢇ ꢕꢘ ꢁ ꢓ ꢙꢆꢈꢓ ꢙ ꢇꢕ ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢚꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢛꢖ ꢇꢕ ꢔ
ꢂ
ꢒ
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ꢔ
ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ
SGLS216 − NOVEMBER 2003
APPLICATION INFORMATION
driving large capacitive loads
The TLC225x is designed to drive larger capacitive loads than most CMOS operational amplifiers. Figure 56
and Figure 57 illustrate its ability to drive loads up to 1000 pF while maintaining good gain and phase margins
(R
= 0).
null
A smaller series resistor (R ) at the output of the device (see Figure 60) improves the gain and phase margins
null
when driving large capacitive loads. Figure 56 and Figure 57 show the effects of adding series resistances of
10 Ω, 50 Ω, 100 Ω, 200 Ω, and 500 Ω. The addition of this series resistor has two effects: the first is that it adds
a zero to the transfer function and the second is that it reduces the frequency of the pole associated with the
output load in the transfer function.
The zero introduced to the transfer function is equal to the series resistance times the load capacitance. To
calculate the improvement in phase margin, equation 1 can be used.
–1
ǒ2 × π × UGBW × R
LǓ
∆φ
+ tan
× C
(1)
m1
null
Where :
∆φ
+ Improvement in phase margin
m1
UGBW + Unity-gain bandwidth frequency
R
+ Output series resistance
+ Load capacitance
null
C
L
The unity-gain bandwidth (UGBW) frequency decreases as the capacitive load increases (see Figure 58). To
use equation 1, UGBW must be approximated from Figure 58.
Using equation 1 alone overestimates the improvement in phase margin, as illustrated in Figure 59. The
overestimation is caused by the decrease in the frequency of the pole associated with the load, thus providing
additional phase shift and reducing the overall improvement in phase margin.
Using Figure 60, with equation 1 enables the designer to choose the appropriate output series resistance to
optimize the design of circuits driving large capacitance loads.
50 kΩ
V
DD+
50 kΩ
R
null
V
I
−
+
C
L
V
DD−/GND
Figure 60. Series-Resistance Circuit
29
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢆ
ꢇ
ꢈ
ꢉ
ꢀ
ꢁ
ꢂ
ꢃ
ꢃ
ꢄ
ꢅ
ꢊ
ꢆ
ꢇ
ꢈ
ꢜ
ꢊ
ꢋ
ꢌ
ꢍ
ꢎ
ꢏ
ꢐ
ꢋ
ꢁ
ꢑ
ꢎ
ꢗ ꢇꢕꢘ ꢁ ꢓꢙꢆꢈ ꢓꢙꢇ ꢕ ꢓ ꢈꢇ ꢕꢊꢀꢖ ꢓ ꢚꢊ ꢁ ꢊꢒ ꢈꢁ ꢖꢛ ꢖꢇ ꢕꢔ
ꢂ
ꢒ
ꢓ
ꢔ
ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ
SGLS216 − NOVEMBER 2003
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using MicroSim Parts, the model generation software used
with MicroSim PSpice. The Boyle macromodel (see Note 5) and subcircuit in Figure 61 are generated using
the TLC225x typical electrical and operating characteristics at T = 25°C. Using this information, output
A
simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
D
D
D
D
D
Maximum positive output voltage swing
Maximum negative output voltage swing
Slew rate
D
D
D
D
D
D
Unity-gain frequency
Common-mode rejection ratio
Phase margin
Quiescent power dissipation
Input bias current
DC output resistance
AC output resistance
Short-circuit output current limit
Open-loop voltage amplification
NOTE 4: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal
of Solid-State Circuits, SC-9, 353 (1974).
99
DLN
3
EGND
+
−
V
CC+
92
9
FB
+
91
90
RSS
ISS
RO2
−
+
−
+
VB
DLP
RP
2
VLP
VLN
HLIM
−
+
−
10
+
−
VC
IN −
IN+
R2
C2
J1
J2
7
DP
6
53
+
−
1
VLIM
11
DC
12
RD2
GA
GCM
8
C1
RD1
60
RO1
+
−
DE
VAD
5
54
V
CC−
−
+
4
VE
OUT
.SUBCKT TLC225x 1 2 3 4 5
RD1
RD2
R01
R02
RP
RSS
VAD
VB
VC
VE
60
60
8
11
12
5
37.23E3
37.23E3
84
C1
11
6
12
7
6.369E−12
C2
25.00E−12
DC
5
53
5
DX
DX
DX
DX
DX
7
99
4
84
DE
54
90
92
4
3
71.43E3
64.52E6
−.5
DLP
DLN
DP
91
90
3
10
60
9
99
4
0
DC 0
EGND
FB
99
7
0
99
POLY (2) (3,0) (4,0) 0 .5 .5
POLY (5) VB VC VE VLP
3
53
4
DC .605
DC .605
DC 0
54
7
+ VLN 0 57.62E6 −60E6 60E6 60E6 −60E6
VLIM
VLP
VLN
8
GA
6
0
6
11
10
12 26.86E−6
99 2.686E−9
91
0
0
DC −.235
DC 7.5
GCM
ISS
HLIM
J1
0
92
3
10
0
DC 3.1E−6
VLIM 1K
10 JX
10 JX
100.0E3
.MODEL DX D (IS=800.0E−18)
90
11
12
6
.MODEL JX PJF (IS=500.0E−15 BETA=139E−6
2
1
+ VTO=−.05)
.ENDS
J2
R2
9
Figure 61. Boyle Macromodel and Subcircuit
PSpice and Parts are trademarks of MicroSim Corporation.
30
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
PACKAGING INFORMATION
Orderable Device
TLC2252AQDREP
TLC2252QDREP
TLC2254AQDREP
TLC2254QDREP
V62/04682-01XE
V62/04682-02XE
V62/04682-03YE
V62/04682-04YE
Status (1)
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
Drawing
SOIC
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
SOIC
D
D
D
D
D
D
D
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
14
14
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
8
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
14
14
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM
no Sb/Br)
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF TLC2252-EP, TLC2252A-EP, TLC2254-EP, TLC2254A-EP :
Catalog: TLC2252, TLC2252A, TLC2254, TLC2254A
Automotive: TLC2252-Q1, TLC2252A-Q1, TLC2254-Q1, TLC2254A-Q1
Military: TLC2252M, TLC2252AM, TLC2254M, TLC2254AM
•
•
•
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
18-Sep-2008
NOTE: Qualified Version Definitions:
Catalog - TI's standard catalog product
Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects
Military - QML certified for Military and Defense Applications
•
•
•
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2008
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0 (mm)
B0 (mm)
K0 (mm)
P1
W
Pin1
Diameter Width
(mm) W1 (mm)
(mm) (mm) Quadrant
TLC2252AQDREP
TLC2252QDREP
TLC2254AQDREP
TLC2254QDREP
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
2500
2500
2500
2500
330.0
330.0
330.0
330.0
12.4
12.4
16.4
16.4
6.4
6.4
6.5
6.5
5.2
5.2
9.0
9.0
2.1
2.1
2.1
2.1
8.0
8.0
8.0
8.0
12.0
12.0
16.0
16.0
Q1
Q1
Q1
Q1
14
14
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
5-Nov-2008
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC2252AQDREP
TLC2252QDREP
TLC2254AQDREP
TLC2254QDREP
SOIC
SOIC
SOIC
SOIC
D
D
D
D
8
8
2500
2500
2500
2500
346.0
346.0
333.2
333.2
346.0
346.0
345.9
345.9
29.0
29.0
28.6
28.6
14
14
Pack Materials-Page 2
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相关型号：
TLC2254QDRG4Q1
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