TLC2274MDREP_技术文档

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SGLS131B − JULY 2002 − REVISED DECEMBER 2003

D

Controlled Baseline

− One Assembly/Test Site, One Fabrication

Site

D

Low Noise . . . 9 nV/√Hz Typ at f = 1 kHz

Low Input Bias Current . . . 1 pA Typ

Fully Specified for Both Single-Supply and

Split-Supply Operation

D

Extended Temperature Performance of

−55°C to 125°C

Enhanced Diminishing Manufacturing

Sources (DMS) Support

Common-Mode Input Voltage Range

Includes Negative Rail

High-Gain Bandwidth . . . 2.2 MHz Typ

High Slew Rate . . . 3.6 V/µs Typ

Low Input Offset Voltage

D

Enhanced Product Change Notification

†

Qualification Pedigree

Output Swing Includes Both Supply Rails

950 µV Max at T = 25°C

A

†

Component qualification in accordance with JEDEC and industry

standards to ensure reliable operation over an extended

temperature range. This includes, but is not limited to, Highly

Accelerated Stress Test (HAST) or biased 85/85, temperature

cycle, autoclave or unbiased HAST, electromigration, bond

intermetallic life, and mold compound life. Such qualification

testing should not be viewed as justifying use of this component

beyond specified performance and environmental limits.

D

Macromodel Included

D

Performance Upgrades for the TS272,

TS274, TLC272, and TLC274

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

vs

SUPPLY VOLTAGE

description

16

T

A

= 25°C

The TLC2272A and TLC2274A are dual and

quadruple operational amplifiers from Texas

Instruments. Both devices exhibit rail-to-rail

output performance for increased dynamic range

in single- or split-supply applications. The

TLC227xA family offers 2 MHz of bandwidth and

3 V/µs of slew rate for higher speed applications.

These devices offer comparable ac performance

while having better noise, input offset voltage, and

power dissipation than existing CMOS

operational amplifiers. The TLC227xA has a noise

voltage of 9 nV/√Hz, two times lower than

competitive solutions.

14

12

10

8

I

O

= 50 µA

I

O

=

500 µA

6

The TLC227xA, exhibiting high input impedance

and low noise, is excellent for small-signal

conditioning for high-impedance sources, such as

piezoelectric transducers. Because of the micro-

power dissipation levels, these devices work well

in hand-held monitoring and remote-sensing

applications. In addition, the rail-to-rail output

feature, with single- or split-supplies, makes this

4

6

8

10

12

14

16

|V

DD

| − Supply Voltage − V

family a great choice when interfacing with analog-to-digital converters (ADCs). For precision applications, the

TLC227xA family has a maximum input offset voltage of 950 µV. This family is fully characterized at 5 V and

5 V.

The TLC2272/4 also makes great upgrades to the TLC272/4 or TS272/4 in standard designs. They offer

increased output dynamic range, lower noise voltage, and lower input offset voltage. This enhanced feature set

allows them to be used in a wider range of applications.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

Advanced LinCMOS is a trademark of Texas Instruments.

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CopyrighCtopy2r0ig0h2t −22000033, Texas Instruments Incorporated

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1

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

AVAILABLE OPTIONS

PACKAGED DEVICES

V

IO

max At

25°C

SMALL

OUTLINE

(D)

T

A

TSSOP

(PW)

950 µV

2.5 mV

TLC2272AMDREP

TLC2272MDREP

TLC2272AMPWREP

TLC2272MPWREP

−55°C to 125°C

950 µV

2.5 mV

TLC2274AMDREP

TLC2274MDREP

TLC2274AMPWREP

TLC2274MPWREP

TLC2272

D OR PW PACKAGE

(TOP VIEW)

TLC2274

D OR PW PACKAGE

(TOP VIEW)

1OUT

1IN−

1IN+

1OUT

1IN−

1IN+

/GND

V

4OUT

4IN−

4IN+

1

2

3

4

8

7

6

5

1

2

3

4

5

6

7

14

13

12

11

10

9

DD+

2OUT

2IN−

2IN+

V

DD+

DD−

2IN+

2IN−

3IN+

3IN−

3OUT

2OUT

8

2

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

equivalent schematic (each amplifier)

V

DD+

Q3

Q6

Q9

Q12

Q14

Q16

IN+

IN−

OUT

C1

R5

Q1

Q4

Q13

Q15

Q17

D1

Q2

R3

Q5

R4

Q7

Q8

Q10

Q11

R1

R2

V

DD−

†

ACTUAL DEVICE COMPONENT COUNT

COMPONENT

Transistors

TLC2272

TLC2274

38

26

9

76

52

18

6

Resistors

Diodes

Capacitors

3

†

Includes both amplifiers and all ESD, bias, and trim circuitry

3

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

†

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage, V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V

(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −8 V

DD+

DD−

Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 V

Input voltage range, V (any input, see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V

ID

− 0.3 V to V

I

DD−

DD+

Input current, I (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mA

I

Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

O

Total current into V

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA

DD+

DD−

Total current out of V

Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . unlimited

Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table

Operating free-air temperature range, T

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −55°C to 125°C

A

Storage temperature range (see Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or PW package . . . . . . . . . . . . . . . 260°C

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and

functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not

implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V

and V

.

DD+

DD −

2. Differential voltages are at IN+ with respect to IN−. Excessive current will flow if input is brought below V

− 0.3 V.

DD−

3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum

dissipation rating is not exceeded.

4. Long term high-temperature storage and/or extended use at maximum recommended operating conditions may result in a reduction

of overall device life. See http://www.ti.com/ep_quality for additional information on enhanced plastic packaging.

DISSIPATION RATING TABLE

T

≤ 25°C

DERATING FACTOR

T

= 70°C

T

= 85°C

T = 125°C

A

PACKAGE

POWER RATING

ABOVE T = 25°C

POWER RATING POWER RATING POWER RATING

A

D-8

D-14

725 mW

5.8 mW/°C

7.6 mW/°C

4.2 mW/°C

5.6 mW/°C

464 mW

608 mW

336 mW

448 mW

337 mW

494 mW

273 mW

364 mW

145 mW

190 mW

105 mW

—

950 mW

PW-8

PW-14

525 mW

700 mW

recommended operating conditions

MIN

MAX

UNIT

V

Supply voltage, V

DD

2.2

8

Input voltage, V

V

−1.5

V

I

DD−

DD+

Common-mode input voltage, V

IC

−1.5

V

DD−

−55

DD+

Operating free-air temperature, T

125

°C

A

4

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2272-EP electrical characteristics at specified free-air temperature, V

otherwise noted)

= 5 V (unless

DD

TLC2272-EP

TLC2272A-EP

MIN TYP MAX

†

PARAMETER

TEST CONDITIONS

T

UNIT

A

MIN

TYP MAX

300 2500

3000

25°C

300

950

V

IO

Input offset voltage

µV

Full range

1500

Temperature coefficient

of input offset voltage

25°C

to 125°C

α

VIO

2

µV/°C

Input offset voltage long-

term drift (see Note 5)

V

IC

V

O

= 0 V,

V

R

=

2.5 V,

DD

S

25°C

0.002

0.5

µV/mo

= 50 Ω

25°C

Full range

25°C

0.5

1

60

800

60

800

60

I

Input offset current

Input bias current

pA

IO

1

IB

Full range

800

0

−0.3

0

−0.3

25°C

to 4 to 4.2

Common-mode input

voltage

V

R

= 50 Ω,

|V | ≤ 5 mV

IO

V

ICR

OH

S

0

Full range

to 3.5

I

= −20 µA

25°C

4.99

4.93

4.99

4.93

OH

4.85

4.25

4.85

4.25

= −200 µA

High-level output

voltage

OH

Full range

25°C

V

4.65

I

= −1 mA

= 2.5 V,

OH

Full range

25°C

V

I

= 50 µA

0.01

0.09

0.01

0.09

IC

OL

25°C

0.15

1.5

0.15

1.5

V

= 500 µA

OL

Full range

25°C

V

A

Low-level output voltage

V

OL

0.9

35

0.9

35

V

IC

= 2.5 V,

I

= 5 mA

OL

Full range

25°C

1.5

10

Large-signal

differential voltage

amplification

‡

R

= 10 kΩ

V

IC

V

O

= 2.5 V,

= 1 V to 4 V

L

Full range

25°C

V/mV

VD

‡

175

= 1 mΩ

Differential input

resistance

12

10

12

10

Ω

r

25°C

id

Common-mode input

resistance

12

10

12

10

i

Common-mode input

capacitance

c

z

f = 10 kHz,

f = 1 MHz,

P package

8

pF

Ω

i

Closed-loop output

impedance

A

V

= 10

140

75

140

75

o

25°C

Full range

25°C

70

80

70

80

Common-mode rejection

ratio

V

= 0 V to 2.7 V,

= 2.5 V,

IC

O

CMRR

dB

R

= 50 Ω

S

95

Supply-voltage rejection

V

DD

V

IC

= 4.4 V to 16 V,

k

SVR

ratio (∆V ∆V

DD/ IO

)

= V

/2,

No load

Full range

25°C

DD

2.2

3

2.2

3

I

Supply current

V

O

= 2.5 V,

No load

mA

DD

Full range

†

‡

Full range is −55°C to 125°C for M level part.

Referenced to 2.5 V

NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

5

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2272-EP operating characteristics at specified free-air temperature, V

= 5 V

DD

TLC2272-EP

TLC2272A-EP

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX MIN

TYP

MAX

25°C

2.3

3.6

2.3

3.6

Slew rate at

unity gain

V

R

= 1.25 V to 2.75 V,

‡, ‡

C = 100 pF

L

O

L

SR

V/µs

Full

range

= 10 kΩ

1.7

f = 10 Hz

f = 1 kHz

25°C

50

9

50

9

Equivalent input

noise voltage

nV/√Hz

V

n

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

25°C

1

V

I

µV

NPP

1.4

Equivalent input

noise current

25°C

0.6

fA/√Hz

n

A

= 1

0.0013%

0.004%

0.03%

0.0013%

0.004%

0.03%

V

Total harmonic

distortion plus

noise

V

= 0.5 V to 2.5 V,

O

A

V

= 10

= 100

‡

f = 20 kHz,

R

THD + N

25°C

‡

= 10 kΩ ,

L

A

V

Gain-bandwidth

product

f = 10 kHz,

C

R

= 10 kΩ ,

L

25°C

2.18

1

2.18

1

MHz

‡

= 100 pF

L

Maximum output-

swing bandwidth

V

R

= 2 V,

A

= 1,

= 100 pF

O(PP)

V

B

OM

‡

= 10 kΩ ,

C

L

A

= −1,

V

To 0.1%

1.5

2.6

1.5

2.6

Step = 0.5 V to 2.5 V,

‡

t

s

Settling time

25°C

µs

R

C

= 10 kΩ ,

= 100 pF

L

To 0.01%

‡

Phase margin at

unity gain

50°

φ

m

25°C

‡

R

= 10 kΩ ,

C

= 100 pF

L

Gain margin

10

dB

†

‡

Full range is −55°C to 125°C for M level part.

Referenced to 2.5 V

6

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ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2272-EP electrical characteristics at specified free-air temperature, V

otherwise noted)

=

5 V (unless

DD

TLC2272-EP

TLC2272A-EP

†

PARAMETER

TEST CONDITIONS

T

UNIT

µV

A

MIN

TYP

MAX

2500

3000

MIN

TYP

MAX

25°C

300

950

V

IO

Input offset voltage

Full range

1500

Temperature coefficient of

input offset voltage

25°C

to 125°C

α

VIO

2

µV/°C

Input offset voltage

long-term drift

(see Note 5)

V

= 0 V,

= 50 Ω

V

O

= 0 V,

IC

R

25°C

0.002

0.5

0.002

0.5

µV/mo

S

25°C

Full range

25°C

60

800

60

800

60

I

Input offset current

Input bias current

pA

IO

1

IB

Full range

800

−5

−5.3

−5

−5.3

25°C

to 4 to 4.2

Common-mode input

voltage

V

R

= 50 Ω,

S

|V | ≤ 5 mV

IO

V

ICR

−5

to 3.5

−5

to 3.5

Full range

I

= −20 µA

25°C

4.99

4.93

4.99

4.93

O

4.85

4.25

4.85

4.25

= −200 µA

Maximum positive peak

output voltage

O

Full range

25°C

V

OM+

4.65

I

O

= −1 mA

Full range

25°C

V

= 0 V,

I

= 50 µA

−4.99

IC

O

25°C

−4.85 −4.91

−4.85

V

= 500 µA

Maximum negative peak

output voltage

O

Full range −4.85

V

OM−

25°C

Full range

25°C

−3.5

20

−4.1

50

−3.5

20

−4.1

V

= 0 V,

I

O

= 5 mA

IC

O

50

R

= 10 kΩ

= 1 mΩ

Large-signal differential

voltage amplification

L

Full range

25°C

20

A

VD

V

=

4 V

V/mV

300

12

10

12

10

Ω

r

Differential input resistance

25°C

id

Common-mode input

resistance

12

10

12

10

25°C

i

Common-mode input

capacitance

c

z

f = 10 kHz,

f = 1 MHz,

P package

= 10

8

pF

i

Closed-loop output

impedance

Ω

A

V

130

80

130

80

o

25°C

Full range

25°C

75

80

75

80

Common-mode rejection

ratio

V

= −5 V to 2.7 V,

= 0 V,

IC

O

CMRR

dB

R = 50 Ω

S

95

Supply-voltage rejection

V

=

2.2 V to 8 V,

DD

IC

k

SVR

ratio (∆V

DD

/∆V

IO

)

= 0 V,

No load

Full range

25°C

2.4

3

2.4

3

I

Supply current

V

O

= 2.5 V,

No load

mA

DD

Full range

†

Full range is −55°C to 125°C for M level part.

NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

7

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ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2272-EP operating characteristics at specified free-air temperature, V

= 5 V

DD

TLC2272-EP

TLC2272A-EP

†

PARAMETER

TEST CONDITIONS

UNIT

T

A

MIN

TYP

MAX MIN

TYP

MAX

25°C

2.3

3.6

2.3

3.6

Slew rate at

unity gain

V

C

=

1 V,

R = 10 kΩ,

L

O

L

SR

V/µs

Full

range

= 100 pF

1.7

f = 10 Hz

f = 1 kHz

25°C

50

9

50

9

Equivalent input

noise voltage

nV/√Hz

V

n

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

25°C

1

V

I

µV

NPP

1.4

Equivalent input

noise current

25°C

0.6

fA/√Hz

n

A

= 1

0.0011%

0.004%

0.03%

0.0011%

0.004%

0.03%

V

Total harmonic

distortion plus

noise

V

R

=

2.3 V

O

L

A

V

= 10

= 10 kΩ,

THD + N

25°C

f = 20 kHz

A

= 100

R = 10 kΩ,

L

V

Gain-bandwidth f = 10 kHz,

product

25°C

2.25

0.54

2.25

0.54

MHz

C = 100 pF

L

Maximum

output-swing

bandwidth

V

R

= 4.6 V,

A

= 1,

= 100 pF

L

O(PP)

= 10 kΩ,

V

B

OM

C

L

A

= −1,

V

To 0.1%

1.5

3.2

1.5

3.2

Step = −2.3 V to 2.3 V,

R

C

t

s

Settling time

25°C

µs

= 10 kΩ,

= 100 pF

L

To 0.01%

Phase margin at

unity gain

52°

φ

m

25°C

R

= 10 kΩ,

C = 100 pF

L

Gain margin

10

dB

†

Full range is −55°C to 125°C for M level part.

8

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ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2274-EP electrical characteristics at specified free-air temperature, V

otherwise noted)

= 5 V (unless

DD

TLC2274-EP

TLC2274A-EP

†

PARAMETER

TEST CONDITIONS

T

UNIT

µV

A

MIN

TYP MAX

MIN

TYP

MAX

25°C

300 2500

3000

300

950

V

IO

Input offset voltage

Full range

1500

Temperature coefficient

of input offset voltage

25°C

to 125°C

α

VIO

2

µV/°C

Input offset voltage

long-term drift

(see Note 5)

V

=

2.5 V,

V

R

= 0 V,

= 50 Ω

S

DD

= 0 V,

IC

25°C

0.002

0.5

0.002

0.5

µV/mo

O

25°C

Full range

25°C

60

800

60

800

60

I

Input offset current

Input bias current

pA

IO

1

IB

Full range

800

0

−0.3

0

−0.3

25°C

to 4 to 4.2

Common-mode input

voltage

V

R

= 50 Ω,

|V | ≤ 5 mV

IO

V

ICR

OH

S

0 to

3.5

0 to

3.5

Full range

I

= −20 µA

25°C

4.99

OH

4.85

4.25

4.93

4.85

4.25

4.93

= −200 µA

High-level output

voltage

OH

Full range

25°C

V

4.65

I

= −1 mA

= 2.5 V,

OH

Full range

25°C

V

IC

I

= 50 µA

= 5 mA

0.01

0.09

0.01

0.09

OL

25°C

0.15

1.5

0.15

1.5

V

I

= 2.5 V,

= 500 µA

IC

OL

Low-level output

voltage

Full range

25°C

V

OL

0.9

35

0.9

35

V

IC

= 2.5 V,

OL

Full range

25°C

1.5

10

‡

R

= 10 kΩ

Large-signal differential

voltage amplification

V

IC

V

O

= 2.5 V,

= 1 V to 4 V

L

Full range

25°C

A

VD

V/mV

‡

175

= 1 MΩ

Differential input

resistance

12

10

12

10

Ω

r

25°C

id

Common-mode input

resistance

12

10

12

10

i

Common-mode input

capacitance

c

z

f = 10 kHz,

f = 1 MHz,

N package

8

pF

Ω

i

Closed-loop output

impedance

A

V

= 10

140

75

140

75

o

25°C

Full range

25°C

70

80

70

80

Common-mode

rejection ratio

V

IC

V

O

= 0 V to 2.7 V,

= 2.5 V,

CMRR

dB

R

= 50 Ω

S

95

Supply-voltage rejection

V

= 4.4 V to 16 V,

DD

IC

k

SVR

ratio (∆V

DD

/∆V

IO

)

= V

/2,

No load

Full range

25°C

DD

4.4

6

4.4

6

I

Supply current

V

O

= 2.5 V,

No load

mA

DD

Full range

†

‡

Full range is −55°C to 125°C for M level part.

Referenced to 2.5 V

NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

9

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ꢖ

ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2274-EP operating characteristics at specified free-air temperature, V

= 5 V

DD

TLC2274-EP

TLC2274A-EP

†

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

MAX MIN

TYP

MAX

2.3

3.6

2.3

3.6

25°C

‡

Slew rate at unity

gain

V

R

= 0.5 V to 2.5 V,

= 10 kΩ ,

C

= 100 pF

L

O

L

SR

V/µs

Full

range

‡

1.7

f = 10 Hz

f = 1 kHz

25°C

50

9

50

9

Equivalent input

noise voltage

V

n

nV/√Hz

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

25°C

1

V

I

µV

N(PP)

1.4

Equivalent input

noise current

25°C

0.6

fA/√Hz

n

A

= 1

0.0013%

0.004%

0.03%

0.0013%

0.004%

0.03%

V

Total harmonic

distortion plus

noise

V

= 0.5 V to 2.5 V,

O

A

V

= 10

= 100

f = 20 kHz,

R

THD + N

25°C

‡

= 10 kΩ

L

A

V

‡

Gain-bandwidth

product

f = 10 kHz,

R

= 10 kΩ ,

L

25°C

2.18

1

2.18

1

MHz

‡

C

= 100 pF

L

Maximum out-

put-swing band-

width

V

R

= 2 V,

= 10 kΩ ,

A

V

= 1,

O(PP)

L

B

OM

‡

C = 100 pF

L

A

= −1,

V

To 0.1%

1.5

2.6

1.5

2.6

Step = 0.5 V to 2.5 V,

‡

t

s

Settling time

25°C

µs

R

C

= 10 kΩ ,

= 100 pF

L

To 0.01%

‡

Phase margin at

unity gain

50°

φ

m

25°C

‡

C = 100 pF

L

R

= 10 kΩ ,

L

Gain margin

10

dB

†

‡

Full range is −55°C to 125°C for M level part.

Referenced to 2.5 V

10

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2274-EP electrical characteristics at specified free-air temperature, V

otherwise noted)

=

5 V (unless

DD

TLC2274-EP

TLC2274A-EP

†

PARAMETER

TEST CONDITIONS

T

UNIT

A

MIN

TYP

MAX

2500

3000

MIN

TYP

MAX

25°C

300

950

V

IO

Input offset voltage

µV

Full range

1500

Temperature coefficient of

input offset voltage

25°C

to 125°C

α

VIO

2

µV/°C

Input offset voltage long-

term drift (see Note 5)

V

= 0 V,

= 50 Ω

V

O

= 0 V,

IC

R

25°C

0.002

0.5

0.002

0.5

µV/mo

S

25°C

Full range

25°C

60

800

60

800

60

I

Input offset current

Input bias current

pA

IO

1

IB

Full range

800

−5

−5.3

−5

−5.3

25°C

to 4 to 4.2

Common-mode input

voltage

V

R

= 50 Ω, |V | ≤ 5 mV

S IO

V

ICR

−5

to 3.5

−5

to 3.5

Full range

I

= −20 µA

25°C

4.99

4.93

4.99

4.93

O

4.85

4.25

4.85

4.25

= −200 µA

Maximum positive peak

output voltage

O

Full range

25°C

V

OM+

4.65

I

O

= −1 mA

Full range

25°C

V

= 0 V,

I

= 50 µA

−4.99

IC

O

25°C

−4.85 −4.91

−4.85

V

= 500 µA

Maximum negative peak

output voltage

O

Full range −4.85

V

OM−

V

25°C

Full range

25°C

−3.5

20

−4.1

50

−3.5

20

−4.1

V

= 0 V,

I

O

= 5 mA

IC

O

50

R

= 10 kΩ

= 1 MΩ

Large-signal differential

voltage amplification

L

Full range

25°C

20

A

VD

V

=

4 V

V/mV

300

12

10

12

10

r

Differential input resistance

25°C

Ω

id

Common-mode input

resistance

12

10

12

10

25°C

i

Common-mode input

capacitance

c

z

f = 10 kHz, N package

f = 1 MHz, = 10

8

pF

i

Closed-loop output

impedance

A

V

130

80

130

80

Ω

o

25°C

Full range

25°C

75

80

75

80

Common-mode rejection

ratio

V

IC

V

O

= −5 V to 2.7 V

CMRR

dB

= 0 V,

R = 50 Ω

S

95

Supply-voltage rejection

V

=

2.2 V to 8 V,

No load

DD

IC

k

SVR

ratio (∆V

DD

/∆V

IO

)

= 0 V,

Full range

25°C

4.8

6

4.8

6

I

Supply current

V

O

= 0 V,

No load

mA

DD

Full range

†

Full range is −55°C to 125°C for M level part.

NOTE 5: Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at T = 150°C extrapolated

A

to T = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.

A

11

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ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TLC2274-EP operating characteristics at specified free-air temperature, V

= 5 V

DD

TLC2274-EP

TLC2274A-EP

†

PARAMETER

TEST CONDITIONS

T

A

UNIT

MIN

TYP

MAX MIN

TYP

MAX

25°C

2.3

3.6

2.3

3.6

Slew rate at unity

gain

V

C

=

2.3 V,

R = 10 kΩ,

L

O

L

SR

V/µs

Full

range

= 100 pF

1.7

f = 10 Hz

f = 1 kHz

25°C

50

9

50

9

Equivalent input

noise voltage

V

n

nV/√Hz

Peak-to-peak

equivalent input

noise voltage

f = 0.1 Hz to 1 Hz

f = 0.1 Hz to 10 Hz

25°C

1

V

I

µV

N(PP)

1.4

Equivalent input

noise current

25°C

0.6

fA/√Hz

n

A

= 1

0.0011%

0.004%

0.03%

0.0011%

0.004%

0.03%

V

Total harmonic

distortion plus

noise

V

R

=

2.3 V,

O

L

A

V

= 10

= 100

= 10 kΩ,

THD + N

25°C

f = 20 kHz

A

V

Gain-bandwidth

product

f = 10 kHz,

R

= 10 kΩ,

L

25°C

2.25

0.54

2.25

0.54

MHz

C

= 100 pF

L

Maximum

output-swing

bandwidth

V

R

= 4.6 V,

A

= 1,

= 100 pF

L

O(PP)

= 10 kΩ,

V

B

OM

C

L

A

= −1,

V

To 0.1%

1.5

3.2

1.5

3.2

Step = −2.3 V to 2.3 V,

R

C

t

s

Settling time

25°C

µs

= 10 kΩ,

= 100 pF

L

To 0.01%

Phase margin at

unit gain

φ

m

25°C

52°

R

= 10 kΩ,

C

= 100 pF

L

Gain margin

10

dB

†

Full range is −55°C to 125°C for M level part.

12

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ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

Distribution

vs Common-mode voltage

1 − 4

V

Input offset voltage

IO

5, 6

7 − 10

11

α

VIO

Input offset voltage temperature coefficient

Input bias and input offset current

Distribution

I

/I

vs Free-air temperature

IB IO

vs Supply voltage

vs Free-air temperature

12

13

V

I

Input voltage

V

High-level output voltage

vs High-level output current

vs Low-level output current

vs Output current

14

15, 16

17

OH

Low-level output voltage

OL

Maximum positive peak output voltage

Maximum negative peak output voltage

Maximum peak-to-peak output voltage

OM+

OM−

O(PP)

vs Output current

18

vs Frequency

19

vs Supply voltage

vs Free-air temperature

20

21

I

Short-circuit output current

Output voltage

OS

V

vs Differential input voltage

22, 23

24

O

Large-signal differential voltage amplification vs Load resistance

Large-signal differential voltage amplification

vs Frequency

25, 26

A

VD

and phase margin

Large-signal differential voltage amplification vs Free-air temperature

27, 28

29, 30

z

Output impedance

vs Frequency

o

vs Frequency

vs Free-air temperature

31

32

CMRR

Common-mode rejection ratio

vs Frequency

vs Free-air temperature

33, 34

35

k

Supply-voltage rejection ratio

Supply current

SVR

vs Supply voltage

vs Free-air temperature

36, 37

38, 39

I

DD

vs Load capacitance

vs Free-air temperature

40

41

SR

Slew rate

Inverting large-signal pulse response

Voltage-follower large-signal pulse response

Inverting small-signal pulse response

Voltage-follower small-signal pulse response

Equivalent input noise voltage

42, 43

44, 45

46, 47

48, 49

50, 51

52

V

O

vs Frequency

n

Noise voltage over a 10-second period

Integrated noise voltage

vs Frequency

53

THD + N

Total harmonic distortion plus noise

54

vs Supply voltage

vs Free-air temperature

55

56

Gain-bandwidth product

φ

m

Phase margin

Gain margin

vs Load capacitance

57

58

NOTE: For all graphs where V

DD

= 5 V, all loads are referenced to 2.5 V.

13

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ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

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ꢕꢊ ꢖ ꢁꢆꢀꢓ ꢆꢕꢊꢖ ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLC2272

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC2272

INPUT OFFSET VOLTAGE

20

15

10

20

15

10

891 Amplifiers From

2 Wafer Lots

5 V

= 25°C

891 Amplifiers From

2 Wafer Lots

2.5 V

= 25°C

V

=

DD

V

=

DD

T

A

T

A

5

0

5

0

−1.6 −1.2 −0.8 −0.4

0

0.4

0.8

1.2

1.6

−1.6 −1.2 −0.8 −0.4

0

0.4

0.8

1.2

1.6

V

IO

− Input Offset Voltage − mV

V

IO

− Input Offset Voltage − mV

Figure 1

Figure 2

DISTRIBUTION OF TLC2274

INPUT OFFSET VOLTAGE

DISTRIBUTION OF TLC2274

INPUT OFFSET VOLTAGE

20

15

10

20

15

10

992 Amplifiers From

2 Wafer Lots

5 V

992 Amplifiers From

2 Wafer Lots

2.5 V

V

=

DD

V

=

DD

5

0

5

0

−1.6 −1.2 −0.8 −0.4

0

0.4

0.8

1.2

1.6

0

0.4

0.8

1.2

1.6

V

IO

− Input Offset Voltage − mV

V

IO

− Input Offset Voltage − mV

Figure 3

Figure 4

14

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ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢗꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢘꢖ ꢇꢕ ꢔ

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ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

INPUT OFFSET VOLTAGE

vs

COMMON-MODE VOLTAGE

INPUT OFFSET VOLTAGE

vs

COMMON-MODE VOLTAGE

1

0.5

0

1

0.5

0

V

T

R

= 5 V

= 25°C

= 50 Ω

V

T

R

=

5 V

DD

A

S

DD

A

S

= 25°C

= 50 Ω

−0.5

−1

−0.5

−1

0

1

2

3

4

5

−6 −5 −4 −3 −2 −1

0

1

2

3

4

5

V

IC

− Common-Mode Voltage − V

V

IC

− Common-Mode Voltage − V

Figure 5

Figure 6

DISTRIBUTION OF TLC2272

vs

DISTRIBUTION OF TLC2272

vs

INPUT OFFSET VOLTAGE TEMPERATURE

†

COEFFICIENT

†

COEFFICIENT

25

20

15

10

5

25

20

15

10

5

128 Amplifiers From

2 Wafer Lots

128 Amplifiers From

2 Wafer Lots

V

= 5 V

DD

V

= 2.5 V

DD

P Package

25°C to 125°C

0

−1

0

1

2

3

4

5

−5 −4 −3 −2

−1

0

1

2

3

4

5

−5 −4 −3 −2

αV − Temperature Coefficient − µV/°C

IO

αV − Temperature Coefficient − µV/°C

IO

Figure 7

Figure 8

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

15

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢅ

ꢆ

ꢇ

ꢈ

ꢉ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢙ

ꢊ

ꢋ

ꢌ

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ꢏ

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ꢂ

ꢒ

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ꢔ



ꢕ

ꢊ

ꢖ

ꢁ

ꢆ

ꢀ

ꢓ

ꢆ

ꢕ

ꢊ

ꢖ

ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

DISTRIBUTION OF TLC2274

vs

INPUT OFFSET VOLTAGE TEMPERATURE

†

COEFFICIENT

†

COEFFICIENT

25

20

15

10

5

25

20

15

10

5

128 Amplifiers From

2 Wafer Lots

128 Amplifiers From

2 Wafer Lots

V =

2.5 V

N Package

= 25°C to 125°C

V

=

2.5 V

N Package

= 25°C to 125°C

DD

T

A

T

A

0

1

2

3

4

5

−5 −4 −3 −2 −1

0

1

2

3

4

5

−5 −4 −3 −2 −1

α − Temperature Coefficient − µV/°C

VIO

α

VIO

− Temperature Coefficient − µV/°C

Figure 9

Figure 10

†

INPUT BIAS AND INPUT OFFSET CURRENT

INPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

35

30

25

20

15

10

5

12

10

8

V

= 2.5 V

= 0 V

T

R

= 25°C

= 50 Ω

DD

IC

O

A

S

R

= 50 Ω

S

6

4

2

I

IB

|V | ≤ 5mV

IO

0

− 2

− 4

I

IO

− 6

− 8

0

− 10

25

45

65

85

105

125

2

3

4

5

6

7

8

T

A

− Free-Air Temperature − °C

|V

DD

| − Supply Voltage − V

Figure 11

Figure 12

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

16

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

†

INPUT VOLTAGE

vs

HIGH-LEVEL OUTPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

HIGH-LEVEL OUTPUT CURRENT

5

4

6

5

4

3

V

DD

= 5 V

V

DD

= 5 V

3

T

A

= 125°C

|V | ≤ 5mV

IO

2

T

A

= 25°C

1

2

T

A

= −55°C

0

1

0

−1

−75 − 50 − 25

0

25

50

75

100 125

0

1

2

3

4

T

A

− Free-Air Temperature − °C

I

− High-Level Output Current − mA

OH

Figure 13

Figure 14

†

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT VOLTAGE

vs

LOW-LEVEL OUTPUT CURRENT

1.2

1

1.4

1.2

1

V

= 5 V

= 2.5 V

V

T

= 5 V

= 25°C

DD

IC

DD

A

V

IC

= 0 V

T

A

= 125°C

= 25°C

0.8

0.6

0.4

0.2

0

V

IC

= 1.25 V

0.8

0.6

0.4

0.2

0

T

A

T

= −55°C

A

V

IC

= 2.5 V

0

1

2

3

4

5

0

1

2

3

4

5

6

I

− Low-Level Output Current − mA

I

− Low-Level Output Current − mA

OL

Figure 15

Figure 16

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

17

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢔ 

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ꢊ

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ꢁ

ꢆ

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ꢊ

ꢖ

ꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

†

MAXIMUM POSITIVE PEAK OUTPUT VOLTAGE

MAXIMUM NEGATIVE PEAK OUTPUT VOLTAGE

vs

OUTPUT CURRENT

5

4

−3.8

−4

V

DD

= 5 V

V

=

5 V

DD

IC

= 0 V

T

A

= 125°C

T

= −55°C

= 25°C

−4.2

−4.4

−4.6

A

T

= 25°C

A

T

A

3

2

T

A

= −55°C

T

A

= 125°C

−4.8

−5

1

0

1

2

3

4

5

6

0

1

2

3

4

5

|I | − Output Current − mA

O

I

O

− Output Current − mA

Figure 17

Figure 18

MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE

SHORT-CIRCUIT OUTPUT CURRENT

vs

FREQUENCY

SUPPLY VOLTAGE

10

9

8

7

6

5

4

3

2

1

0

16

12

8

R

T

A

= 10 kΩ

= 25°C

L

V

= −100 mV

ID

V

DD

= 5 V

4

V

DD

= 5 V

0

V

= 100 mV

ID

−4

−8

V

T

A

= 0 V

= 25°C

O

2

3

4

5

6

7

8

10 k

100 k

1 M

10 M

f − Frequency − Hz

|V

DD

| − Supply Voltage − V

Figure 19

Figure 20

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

18

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢗꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢘꢖ ꢇꢕ ꢔ

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

†

SHORT-CIRCUIT OUTPUT CURRENT

OUTPUT VOLTAGE

vs

DIFFERENTIAL INPUT VOLTAGE

vs

FREE-AIR TEMPERATURE

15

11

7

5

4

3

2

V

= 0 V

DD

O

V

= 5 V

= 25°C

= 10 kΩ

= 2.5 V

DD

=

5 V

T

A

V

ID

= −100 mV

R

L

V

IC

−3

−1

−5

V

ID

= 100 mV

1

0

−75 −50 −25

0

25

50

75 100 125

800

1200

−800

−400

0

400

T

A

− Free-Air Temperature − °C

V

ID

− Differential Input Voltage − µV

Figure 21

Figure 22

LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION

vs

OUTPUT VOLTAGE

vs

DIFFERENTIAL INPUT VOLTAGE

LOAD RESISTANCE

1000

5

3

V

= 5 V

= 25°C

= 10 kΩ

= 0 V

DD

V

T

A

=

1 V

O

T

A

= 25°C

R

L

V

IC

100

10

1

V

DD

= 5 V

1

V

DD

= 5 V

−1

−3

−5

0.1

1

10

100

0

250 500 750 1000

−1000 −750 −500 −250

V

ID

− Differential Input Voltage − µV

R

− Load Resistance − kΩ

L

Figure 23

Figure 24

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

19

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

ꢀ ꢁ ꢂ ꢃꢃ ꢄ ꢅ ꢆꢇꢈꢉ ꢀ ꢁꢂ ꢃ ꢃ ꢄꢅ ꢊ ꢆꢇꢈ

ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢓꢈ ꢇ ꢕꢊꢀ ꢖ ꢓꢗ ꢊ ꢁ ꢊꢒ ꢈꢁ ꢖ ꢘꢖ ꢇꢕ ꢔ

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

80

60

180°

135°

V

R

C

= 5 V

= 10 kΩ

= 100 pF

= 25°C

DD

L

T

A

40

90°

45°

0°

20

0

−20

−40

−45°

−90°

1 k

10 k

100 k

1 M

10 M

f − Frequency − Hz

Figure 25

LARGE-SIGNAL DIFFERENTIAL VOLTAGE

AMPLIFICATION AND PHASE MARGIN

vs

FREQUENCY

80

60

40

20

180°

135°

V

R

C

= 5 V

DD

L

= 10 kΩ

= 100 pF

= 25°C

T

A

90°

45°

0°

0

−20

−45°

−90°

−40

1 k

10 k

100 k

1 M

10 M

f − Frequency − Hz

Figure 26

20

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢆ

ꢇ

ꢈ

ꢉ

ꢀ

ꢁ

ꢂ

ꢃ

ꢄ

ꢅ

ꢊ

ꢆ

ꢇ

ꢈ

ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

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ꢕꢊꢖ ꢁꢆ ꢀꢓ ꢆꢕ ꢊ ꢖꢁ

SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION

LARGE-SIGNAL DIFFERENTIAL

VOLTAGE AMPLIFICATION

vs

†

vs

FREE-AIR TEMPERATURE

1 k

100

10

1 k

100

10

V

=

5 V

V

= 5 V

= 2.5 V

= 1 V to 4 V

DD

IC

O

= 0 V

IC

O

=

4 V

R

= 1 MΩ

L

R

= 1 MΩ

L

R

= 10 kΩ

L

R

= 10 kΩ

L

−75 −50 −25

0

25

50

75 100 125

−75 −50 −25

0

25

50

75 100 125

T

A

− Free-Air Temperature − °C

T

A

− Free-Air Temperature − °C

Figure 27

Figure 28

OUTPUT IMPEDANCE

vs

OUTPUT IMPEDANCE

vs

FREQUENCY

1000

100

10

1000

100

10

V

T

= 5 V

= 25°C

V

T

= 5 V

= 25°C

DD

A

DD

A

= 100

= 10

V

A

V

= 100

A

V

A

= 10

= 1

V

1

A

V

= 1

A

V

0.1

100

1 k

10 k

100 k

1 M

100

1 k

10 k

100 k

1 M

f − Frequency − Hz

Figure 29

Figure 30

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

21

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ꢌ

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ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢓꢈ ꢇ ꢕꢊꢀ ꢖ ꢓꢗ ꢊ ꢁ ꢊꢒ ꢈꢁ ꢖ ꢘꢖ ꢇꢕ ꢔ

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

COMMON-MODE REJECTION RATIO

vs

FREQUENCY

FREE-AIR TEMPERATURE

100

80

60

40

20

0

90

86

82

78

74

70

T

A

= 25°C

V

= 5 V

DD

V

= 5 V

DD

V

= 5 V

DD

V

IC

= −5 V to 2.7 V

V

DD

= 5 V

V

IC

= 0 V to 2.7 V

10

100

1 k

10 k

100 k

1 M

10 M

−75 −50 −25

0

25

50

75 100 125

f − Frequency − Hz

T

A

− Free-Air Temperature − °C

Figure 31

Figure 32

SUPPLY-VOLTAGE REJECTION RATIO

vs

FREQUENCY

100

80

60

40

20

0

100

80

60

40

20

0

V

T

A

= 5 V

= 25°C

V

=

5 V

T = 25°C

A

DD

k

SVR+

k

SVR−

k

SVR−

−20

10

100

1 k

10 k

100 k

1 M

10 M

10

100

1 k

10 k

100 k

1 M

10 M

f − Frequency − Hz

Figure 33

Figure 34

22

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ꢙ

ꢊ

ꢋ

ꢌ

ꢍ

ꢎ

ꢏ

ꢐ

ꢋ

ꢁ

ꢑ

ꢎ

ꢓ ꢈꢇꢕ ꢊꢀ ꢖꢓ ꢗꢊꢁ ꢊꢒ ꢈ ꢁꢖ ꢘꢖ ꢇꢕ ꢔ

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

TLC2272

SUPPLY CURRENT

†

SUPPLY VOLTAGE REJECTION RATIO

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

3

2.4

1.8

1.2

0.6

0

110

105

100

V

= 0 V

V

=

2.2 V to 8 V

O

DD

= 0 V

No Load

O

T

= 25°C

A

T

= −55°C

A

95

90

85

T

= 125°C

A

0

1

2

3

4

5

6

7

8

−75 −50 −25

0

25

50

75 100 125

|V

DD

| − Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 35

Figure 36

TLC2274

SUPPLY CURRENT

TLC2272

†

SUPPLY CURRENT

vs

SUPPLY VOLTAGE

FREE-AIR TEMPERATURE

3

6

4.8

3.6

2.4

1.2

0

V

= 0 V

O

V

= 5 V

DD

= 0 V

No Load

O

2.4

V

= 5 V

= 2.5 V

DD

O

1.8

1.2

0.6

0

T

= 25°C

A

T

A

= −55°C

T

A

= 125°C

0

1

2

3

4

5

6

7

8

−75 −50 −25

0

25

50

75 100 125

|V

DD

| − Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 37

Figure 38

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

23

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

TLC2274

SUPPLY CURRENT

vs

SLEW RATE

vs

LOAD CAPACITANCE

†

FREE-AIR TEMPERATURE

5

4

3

2

1

0

6

4.8

3.6

2.4

V

= 5 V

DD

= −1

A

V

= 5 V

V

A

DD

= 0 V

T

= 25°C

O

SR −

V

= 5 V

DD

= 2.5 V

O

SR +

1.2

0

10

100

1 k

10 k

−75 −50 −25

0

25

50

75 100 125

C

− Load Capacitance − pF

L

T

− Free-Air Temperature − °C

A

Figure 39

Figure 40

†

SLEW RATE

vs

FREE-AIR TEMPERATURE

INVERTING LARGE-SIGNAL PULSE RESPONSE

5

4

3

2

1

0

V

= 5 V

= 10 kΩ

= 100 pF

= 25°C

= −1

DD

R

C

L

SR −

4

3

2

T

A

V

SR +

V

R

C

= 5 V

= 10 kΩ

= 100 pF

= 1

DD

L

1

0

A

V

−75 −50 −25

0

25

50

75 100 125

0

1

2

3

4

5

6

7

8

9

T

A

− Free-Air Temperature − °C

t − Time − µs

Figure 41

Figure 42

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

24

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

VOLTAGE-FOLLOWER

LARGE-SIGNAL PULSE RESPONSE

INVERTING LARGE-SIGNAL PULSE RESPONSE

5

4

3

2

1

0

V

= 5 V

DD

V

R

C

= 5 V

= 10 kΩ

= 100 pF

= 1

DD

L

R

C

T

= 10 kΩ

= 100 pF

= 25°C

= −1

4

3

L

A

V

A

V

T

= 25°C

2

1

0

− 1

− 2

− 3

− 4

− 5

0

1

2

3

4

5

6

7

8

9

0

1

2

3

4

5

6

7

8

9

t − Time − µs

Figure 43

Figure 44

VOLTAGE-FOLLOWER

LARGE-SIGNAL PULSE RESPONSE

INVERTING SMALL-SIGNAL PULSE RESPONSE

5

2.65

V

DD

= 5 V

V

R

C

= 5 V

= 10 kΩ

= 100 pF

= 25°C

= −1

DD

L

R

C

T

= 10 kΩ

= 100 pF

= 25°C

= 1

4

3

L

A

2.6

T

A

V

A

V

2

1

2.55

2.5

0

−1

−2

−3

−4

2.45

2.4

−5

0

1

2

3

4

5

6

7

8

9

0

0.5

1

1.5

2

2.5

3

3.5

4.5

5 5.5

4

t − Time − µs

Figure 45

Figure 46

25

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

VOLTAGE-FOLLOWER

INVERTING SMALL-SIGNAL PULSE RESPONSE

SMALL-SIGNAL PULSE RESPONSE

100

2.65

2.6

V

R

C

= 5 V

DD

L

V

= 5 V

= 10 kΩ

= 100 pF

= 25°C

= 1

DD

L

= 10 kΩ

= 100 pF

= 25°C

= 1

R

C

T

A

50

V

A

V

2.55

2.5

0

−50

2.45

2.4

−100

0

0.5

1

1.5

2

2.5

3

3.5

4

0

0.5

1

1.5

t − Time − µs

Figure 47

Figure 48

EQUIVALENT INPUT NOISE VOLTAGE

VOLTAGE-FOLLOWER

SMALL-SIGNAL PULSE RESPONSE

vs

FREQUENCY

100

50

0

60

V

R

C

= 5 V

DD

L

V

= 5 V

= 25°C

= 20 Ω

DD

= 10 kΩ

= 100 pF

= 25°C

= 1

T

A

R

S

50

40

30

20

10

0

T

A

V

−50

−100

0

0.5

1

1.5

10

100

1 k

10 k

t − Time − µs

f − Frequency − Hz

Figure 49

Figure 50

26

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

EQUIVALENT INPUT NOISE VOLTAGE

vs

NOISE VOLTAGE

FREQUENCY

OVER A 10 SECOND PERIOD

60

50

40

30

20

10

0

1000

750

500

250

0

V

= 5 V

DD

f = 0.1 Hz to 10 Hz

V

T

R

= 5 V

= 25°C

= 20 Ω

DD

A

S

T

A

= 25°C

−250

−500

−750

−1000

0

2

4

6

8

10

100

1 k

10 k

t − Time − s

f − Frequency − Hz

Figure 51

Figure 52

TOTAL HARMONIC DISTORTION PLUS NOISE

INTEGRATED NOISE VOLTAGE

vs

FREQUENCY

1

0.1

100

Calculated Using

V

= 5 V

= 25°C

= 10 kΩ

DD

Ideal Pass-Band Filter

Lower Frequency = 1 Hz

T

A

R

L

T = 25°C

A

10

A

V

= 100

0.01

A

= 10

= 1

V

1

A

V

0.001

0.1

0.0001

100

1 k

10 k

100 k

1

10

100

1 k

10 k

100 k

f − Frequency − Hz

Figure 53

Figure 54

27

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

TYPICAL CHARACTERISTICS

†

GAIN-BANDWIDTH PRODUCT

vs

GAIN-BANDWIDTH PRODUCT

vs

FREE-AIR TEMPERATURE

SUPPLY VOLTAGE

3

2.8

2.6

2.4

2.2

2

2.5

2.4

2.3

2.2

2.1

2

V

= 5 V

DD

f = 10 kHz

R

C

= 10 kΩ

= 100 pF

= 25°C

L

R

C

= 10 kΩ

= 100 pF

L

T

A

1.8

1.6

1.4

0

1

2

3

4

5

6

7

8

−75 −50 −25

0

25

50

75 100 125

|V

DD

| − Supply Voltage − V

T

A

− Free-Air Temperature − °C

Figure 55

Figure 56

GAIN MARGIN

vs

PHASE MARGIN

vs

LOAD CAPACITANCE

15

12

9

75°

60°

V

T

=

5 V

V

= 5 V

= 1

= 10 kΩ

= 25°C

DD

A

DD

= 25°C

A

V

R

= 100 Ω

= 50 Ω

R

null

L

T

A

R

null

45°

30°

R

= 20 Ω

null

6

10 kΩ

3

V

15°

0°

DD +

10 kΩ

R

null

R

= 0

null

V

I

C

L

R

= 10 Ω

null

V

DD −

0

10

100

1000

10000

10

100

1000

10000

C

− Load Capacitance − pF

C

− Load Capacitance − pF

L

Figure 57

Figure 58

†

Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.

28

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SGLS131A − JULY 2002 − REVISED NOVEMBER 2003

APPLICATION INFORMATION

macromodel information

Macromodel information provided was derived using Microsim Parts, the model generation software used

with Microsim PSpice. The Boyle macromodel (see Note 6) and subcircuit in Figure 59 were generated using

the TLC227x typical electrical and operating characteristics at T = 25°C. Using this information, output

A

simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):

D

Maximum positive output voltage swing

Maximum negative output voltage swing

Slew rate

D

Unity gain frequency

Common-mode rejection ratio

Phase margin

Quiescent power dissipation

Input bias current

DC output resistance

AC output resistance

Short-circuit output current limit

Open-loop voltage amplification

NOTE 6: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Integrated Circuit Operational Amplifiers”, IEEE Journal

of Solid-State Circuits, SC-9, 353 (1974).

99

DIN

3

EGND

+

−

V

CC+

92

9

FB

+

91

90

RSS

ISS

RO2

−

+

−

+

VB

DIP

RP

2

VIP

VIN

HLIM

−

+

−

10

+

−

VC

IN −

IN+

R2

C2

J1

J2

7

DP

6

53

+

−

1

VLIM

11

DC

12

RD2

GA

GCM

8

C1

RD1

60

RO1

+

−

DE

VAD

5

54

V

CC−

−

+

4

VE

OUT

.SUBCKT TLC227x 1 2 3 4 5

RD1

RD2

R01

R02

RP

RSS

VAD

VB

60

8

112.653E3

122.653E3

550

C1

11

6

1214E−12

C2

760.00E−12

53DX

DC

5

7

9950

DE

54

90

92

4

5DX

3

44.310E3

99925.9E3

4−.5

DLP

DLN

DP

91DX

10

60

9

90DX

3DX

0DC 0

EGND

FB

99

0POLY (2) (3,0) (4,) 0 .5 .5

VC 3 53 DC .78

VE

0POLY (5) VB VC VE VLP VLN 0

54

7

91

0

4DC .78

8DC 0

0DC 1.9

92DC 9.4

+ 984.9E3 −1E6 1E6 1E6 −1E6

VLIM

VLP

VLN

GA

6

011 12 377.0E−6

GCM 0 6 10 99 134E−9

ISS

HLIM

J1

J2

R2

3

10DC 216.OE−6

0VLIM 1K

210 JX

110 JX

9100.OE3

.MODEL DX D (IS=800.0E−18)

90

11

12

6

.MODEL JX PJF (IS=1.500E−12BETA=1.316E-3

+ VTO=−.270)

.ENDS

Figure 59. Boyle Macromodel and Subcircuit

PSpice and Parts are trademarks of MicroSim Corporation.

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ꢎ

ꢠ

ꢞ

ꢑ

ꢐ

ꢝ

ꢎ

ꢍ

ꢟ

ꢝ

ꢨ

ꢋ

ꢍ

ꢐ

ꢥ

ꢡ

ꢍ

ꢐ

ꢉ

ꢎ

ꢝ

ꢞ

ꢋ

ꢠ

ꢝ

ꢤ

ꢠ

ꢧ

ꢩ

ꢐ

ꢀ

ꢞ

ꢖ

ꢏ

ꢟ

ꢝ

ꢜ

ꢞ

ꢋ

ꢢ

ꢍ

ꢐ

ꢥ

ꢩ

ꢠ

ꢡ

ꢣ

ꢞ

ꢣ

ꢠ

ꢝ

ꢞ

ꢌ

ꢐ

ꢡ

ꢑ

ꢡ

ꢋ

ꢐ

ꢎ

ꢋ

ꢠ

ꢝ

ꢤ

ꢩ

ꢪ

ꢠ

ꢀ

ꢍ

ꢧ

ꢖ

ꢥ

ꢐ

ꢉ

ꢥ

ꢋ

ꢑ

ꢞ

ꢐ

ꢠ

ꢥ

ꢩ

ꢝ

ꢞ

ꢐ

ꢠ

ꢥ

ꢩ

ꢉ

ꢝ

ꢠ

ꢞ

ꢠ

ꢐ

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ꢡ

ꢥ

ꢞ

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ꢠ

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ꢜꢑ

ꢍ

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ꢜ

ꢡ ꢐ ꢟ ꢑꢏ ꢝ ꢎꢋ ꢢꢏ ꢠ ꢝꢞ ꢣꢞ ꢝ ꢋꢢꢏ ꢠ ꢠ ꢝ ꢨ ꢧꢑꢏ ꢧ ꢠꢧ ꢐ ꢟꢝ ꢋꢐꢥ ꢞ ꢐꢥ ꢍꢠꢐ ꢡꢦ

29

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PACKAGE OPTION ADDENDUM

www.ti.com

5-Feb-2007

PACKAGING INFORMATION

Orderable Device

TLC2272AMDREP

TLC2274AMDREP

TLC2274AMPWREP

TLC2274MDREP

TLC2274MPWREP

V62/03618-01XE

V62/03618-02UE

V62/03618-02YE

V62/03618-04UE

V62/03618-04YE

Status ⁽¹⁾

ACTIVE

Package Package

Pins Package Eco Plan ⁽²⁾Lead/Ball Finish MSL Peak Temp ⁽³⁾

Qty

Type

Drawing

SOIC

D

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SOIC

TSSOP

SOIC

D

PW

D

14

8

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TSSOP

SOIC

PW

D

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TSSOP

SOIC

PW

D

14

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

TSSOP

SOIC

PW

D

2000 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

2500 Green (RoHS & CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

⁽¹⁾The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs.

LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.

NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available.

OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined.

Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered

at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.

Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and

package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS

compatible) as defined above.

Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame

retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is

provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the

accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take

reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on

incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited

information may not be available for release.

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Addendum-Page 1

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**)

PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,30

0,19

M

0,10

0,65

14

8

0,15 NOM

4,50

4,30

6,60

6,20

Gage Plane

0,25

1

7

0°–8°

A

0,75

0,50

Seating Plane

0,10

0,15

0,05

1,20 MAX

PINS **

8

14

16

20

24

28

DIM

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

9,80

9,60

A MAX

A MIN

7,70

4040064/F 01/97

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice.

C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.

D. Falls within JEDEC MO-153

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型号：	TLC2274MDREP
厂家：	TEXAS INSTRUMENTS
描述：	Advanced LinCMOS RAIL-TO-RAIL OPWEATIONAL AMPLIFIERS 高级LinCMOS轨到轨放大器OPWEATIONAL 运算放大器放大器电路光电二极管
文件：	总34页 (文件大小：678K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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