TLC25L2BCJG [TI]
DUAL OP-AMP, 3000uV OFFSET-MAX, 0.11MHz BAND WIDTH, CDIP8, 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-8;
| 型号： | TLC25L2BCJG |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | DUAL OP-AMP, 3000uV OFFSET-MAX, 0.11MHz BAND WIDTH, CDIP8, 0.300 INCH, HERMETIC SEALED, CERAMIC, DIP-8 放大器 CD |
| 文件： | 总27页 (文件大小：678K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
D, P, OR PW PACKAGE
A-Suffix Versions Offer 5-mV V
IO
IO
(TOP VIEW)
B-Suffix Versions Offer 2-mV V
Wide Range of Supply Voltages
1.4 V to 16 V
1OUT
1IN–
1IN+
/GND
V
DD
1
2
3
4
8
7
6
5
2OUT
2IN–
2IN+
True Single-Supply Operation
V
DD–
Common-Mode Input Voltage Includes the
Negative Rail
Low Noise . . . 30 nV/√Hz Typ at f = 1 kHz
(High-Bias Versions)
symbol (each amplifier)
description
+
IN+
IN–
The TLC252, TLC25L2, and TLC25M2 are
low-cost, low-power dual operational amplifiers
designed to operate with single or dual supplies.
These devices utilize the Texas Instruments
OUT
–
silicon gate LinCMOS process, giving them stable input offset voltages that are available in selected grades
of 2, 5, or 10 mV maximum, very high input impedances, and extremely low input offset and bias currents.
Because the input common-mode range extends to the negative rail and the power consumption is extremely
low, this series is ideally suited for battery-powered or energy-conserving applications. The series offers
operation down to a 1.4-V supply, is stable at unity gain, and has excellent noise characteristics.
These devices have internal electrostatic-discharge (ESD) protection circuits that prevent catastrophic failures
at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.1. However, care should be exercised
in handling these devices as exposure to ESD may result in a degradation of the device parametric
performance.
AVAILABLE OPTIONS
PACKAGED DEVICES
V
max
CHIP FORM
(Y)
IO
T
A
SMALL OUTLINE
(D)
PLASTIC DIP
(P)
TSSOP
(PW)
AT 25°C
TLC252Y
10 mV
5 mV
2 mV
TLC252CD
TLC252ACD
TLC252BCD
TLC252CP
TLC252ACP
TLC252BCP
TLC252CPW
TLC252ACPW
TLC252BCPW
—
—
TLC25L2Y
10 mV
5 mV
2 mV
TLC25L2CD
TLC25L2ACD
TLC25L2BCD
TLC25L2CP
TLC25L2ACP
TLC25L2BCP
TLC25L2CPW
TLC25L2ACPW
TLC25L2BCPW
—
—
0°C to 70°C
10 mV
5 mV
2 mV
TLC25M2CD
TLC25M2ACD
TLC25M2BCD
TLC25M2CP
TLC25M2ACP
TLC25M2BCP
—
—
—
TLC25M2Y
—
—
TheD package is available taped and reeled. Add the suffix R to the device type (e.g., TLC252CDR). Chips are tested at25°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments.
Copyright 2001, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
description (continued)
Because of the extremely high input impedance and low input bias and offset currents, applications for the
TLC252/25_2 series include many areas that have previously been limited to BIFET and NFET product types.
Any circuit using high-impedance elements and requiring small offset errors is a good candidate for
cost-effective use of these devices. Many features associated with bipolar technology are available with
LinCMOS operational amplifiers without the power penalties of traditional bipolar devices. General
applications such as transducer interfacing, analog calculations, amplifier blocks, active filters, and signal
buffering are all easily designed with the TLC252/25_2 series devices. Remote and inaccessible equipment
applications are possible using their low-voltage and low-power capabilities. The TLC252/25_2 series is well
suited to solve the difficult problems associated with single-battery and solar-cell-powered applications. This
series includes devices that are characterized for the commercial temperature range and are available in 8-pin
plastic dip and the small-outline package. The device is also available in chip form.
The TLC252/25_2 series is characterized for operation from 0°C to 70°C.
equivalent schematic (each amplifier)
8
V
DD
ESD-
3, 5
2, 6
Protective
Network
IN+
ESD-
Protective
Network
IN–
1, 7
OUT
4
V
DD–
/GND
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
TLC252Y, TLC25L2Y, and TLC25M2Y chip information
These chips, properly assembled, display characteristics similar to the TLC252/25_2. Thermal compression
or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with
conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
(4)
(3)
(2)
(5)
(6)
V
DD
(8)
(3)
(2)
+
1IN+
(1)
1OUT
–
1IN–
(5)
(6)
+
2IN+
(7)
2OUT
60
–
2IN–
(4)
/GND
V
DD–
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 × 4 MINIMUM
(1)
(7)
T
= 150°C
(8)
73
JMAX
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V
DD
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to 18 V
Duration of short circuit at (or below) 25°C free-air temperature (see Note 3) . . . . . . . . . . . . . . . . . . unlimited
ID
I
Continuous total dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to V
/GND.
DD–
2. Differential voltages are at IN+, with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure the maximum dissipation
rating is not exceeded.
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T = 70°C
A
POWER RATING
A
PACKAGE
POWER RATING
ABOVE T = 25°C
A
D
P
725 mW
5.8 mW/°C
8.0 mW/°C
464 mW
1000 mW
640 mW
PW
525 mW
4.2 mW/°C
336 mW
recommended operating conditions
MIN
1.4
MAX
16
0.2
4
UNIT
Supply voltage, V
DD
V
V
DD
V
DD
V
DD
V
DD
= 1.4 V
= 5 V
0
–0.2
–0.2
–0.2
0
Common-mode input voltage, V
IC
V
= 10 V
= 16 V
9
14
70
Operating free-air temperature, T
°C
A
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 1.4 V (unless otherwise noted)
DD
TLC252_C
TLC25L2_C
TLC25M2_C
†
PARAMETER
UNIT
TEST CONDITIONS
MIN TYP MAX MIN TYP MAX MIN TYP MAX
25°C
10
12
5
10
12
5
10
12
5
TLC25_2C
0°C to
70°C
25°C
Input
offset
voltage
V
R
= 0.2 V,
= 50 Ω
O
S
V
IO
TLC25_2AC
TLC25_2BC
mV
0°C to
70°C
6.5
2
6.5
2
6.5
2
25°C
0°C to
70°C
3
3
3
Average temperature
coefficient of input
offset voltage
25°C
to
70°C
α
1
1
1
1
1
1
µV/°C
pA
VIO
25°C
60
300
60
60
300
60
60
300
60
I
IO
Input offset current
Input bias current
V
= 0.2 V
= 0.2 V
0°C to
70°C
O
25°C
1
1
1
I
IB
V
O
pA
0°C to
70°C
600
600
600
Common-mode input
voltage range
0 to
0.2
0 to
0.2
0 to
0.2
V
V
25°C
25°C
V
ICR
Peak output voltage
V
V
= 100 mV
450
700
10
450
700
20
450
700
20
mV
OM
ID
‡
swing
Large-signal
differential voltage
amplification
= 100 to 300 mV,
= 50 Ω
O
S
A
VD
25°C
V/mV
R
Common-mode
rejection ratio
V
V
= 0.2 V,
O
IC
CMRR
25°C
25°C
60
77
60
77
25
60
77
dB
= V
min
ICR
V
O
= 0.2 V,
I
Supply current
300
375
34
200
250
µA
DD
No load
†
Allcharacteristicsaremeasuredunderopen-loopconditionswithzerocommon-modeinputvoltageunlessotherwisespecified. Unlessotherwise
noted, an output load resistor is connected from the output to ground and has the following value: for low bias R = 1 MΩ, for medium bias
L
R
= 100 kΩ, and for high bias R = 10 kΩ.
L
L
‡
The output swings to the potential of V
DD–
/GND.
operating characteristics, V
= 1.4 V, T = 25°C
A
DD
TLC252_C
TLC25L2_C
MIN TYP MAX
TLC25M2_C
MIN TYP MAX
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP MAX
A
C
R
= 40 dB,
= 10 pF,
= 50 Ω
V
L
S
B
1
Unity-gain bandwidth
12
12
12
kHz
SR
Slew rate at unity gain
Overshoot factor
See Figure 1
See Figure 1
0.1
0.001
35%
0.01
35%
V/µs
30%
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC252C, TLC252AC,
TLC252BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.23
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
IC
Full range
3
S
L
Average temperature coefficient of
input offset voltage
α
25°C to 70°C
1.8
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
0.6
40
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
4
4.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
3.5
25°C
0°C
3.2
3
3.8
3.8
3.8
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 10 kΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
3
50
50
50
= –100 mV,
= 0.25 V to 2 V,
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
5
4
23
27
20
80
84
85
95
94
96
1.4
1.6
1.2
Large-signal differential voltage
amplification
A
VD
R
= 10 kΩ
L
70°C
25°C
0°C
4
65
60
60
65
60
60
CMRR Common-mode rejection ratio
= V
min
ICR
IC
70°C
25°C
0°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
3.2
3.6
2.6
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (two amplifiers)
mA
DD
No load
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC252C, TLC252AC,
TLC252BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.29
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 10 kΩ
O
IC
Full range
3
S
L
Average temperature coefficient of input
offset voltage
α
25°C to 70°C
2
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
0.6
50
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
9
9.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
8.5
25°C
0°C
8
8
8.5
8.5
8.4
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 10 kΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
7.8
50
50
50
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
10
7.5
7.5
65
60
60
65
60
60
36
42
32
85
88
88
95
94
96
1.9
2.3
1.6
Large-signal differential voltage
amplification
A
VD
R
= 10 kΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
IC
70°C
25°C
0°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
4
4.4
3.4
= 5 V,
= 5 V,
O
IC
I
Supply current (two amplifiers)
mA
DD
No load
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
operating characteristics, V
= 5 V
DD
TLC252C, TLC252AC,
TLC252BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
3.6
4
MAX
25°C
0°C
V
= 1 V
I(PP)
I(PP)
70°C
25°C
0°C
3
R
= 10 kΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
2.9
3.1
2.5
25
V
= 2.5 V
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 100 kΩ,
nV/√Hz
n
S
L
320
340
260
1.7
2
V
O
= V
,
= 20 pF,
R
L
OH
Maximum output-swing bandwidth
Unity-gain bandwidth
Phase margin
kHz
OM
See Figure
70°C
25°C
0°C
B
1
V = 10 mV,
I
C
= 20 pF,
See Figure 3
MHz
L
70°C
25°C
0°C
1.3
46°
47°
43°
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
operating characteristics, V
= 10 V
DD
TLC252C, TLC252AC,
TLC252BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
5.3
5.9
4.3
4.6
5.1
3.8
25
MAX
25°C
0°C
V
= 1 V
I(PP)
I(PP)
70°C
25°C
0°C
R
= 10 kΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
V
= 5.5 V
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 100 kΩ,
nV/√Hz
n
S
L
200
220
140
2.2
2.5
1.8
49°
50°
46°
V
= V
,
= 20 pF,
R
L
O
OH
Maximum output-swing bandwidth
Unity-gain bandwidth
Phase margin
kHz
OM
See Figure 1
70°C
25°C
0°C
B
1
V = 10 mV,
I
C
= 20 pF,
See Figure 3
MHz
L
70°C
25°C
0°C
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC25L2C
TLC25L2AC
TLC25L2BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.204
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
3
S
L
Average temperature coefficient of
input offset voltage
α
25°C to 70°C
1.1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
0.6
50
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
4
4.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
3.5
25°C
0°C
3.2
3
4.1
4.1
4.2
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
3
50
50
50
= –100 mV,
= 0.25 V to 2 V,
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
50
50
50
65
60
60
70
60
60
700
700
380
94
95
95
97
97
98
20
24
16
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
IC
70°C
25°C
0°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
34
42
28
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (two amplifiers)
µA
DD
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC25L2C
TLC25L2AC
TLC25L2BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.235
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 1 MΩ
O
IC
Full range
3
S
L
Average temperature coefficient of
input offset voltage
α
25°C to 70°C
1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
8
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 5 V,
= 5 V,
V
V
= 5 V
= 5 V
pA
IO
O
IC
0.7
50
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
9
9.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
8.5
25°C
0°C
8
7.8
7.8
8.9
8.9
8.9
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 1 MΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
50
50
50
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
50
50
50
65
60
60
70
60
60
860
1025
660
97
Large-signal differential voltage
amplification
A
VD
R
= 1 MΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
97
IC
70°C
25°C
0°C
97
97
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
97
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
98
29
46
66
40
= 5 V,
= 5 V,
O
IC
I
Supply current (two amplifiers)
36
µA
DD
70°C
22
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
operating characteristics, V
= 5 V
DD
TLC25L2C
TLC25L2AC
TLC25L2BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.03
0.03
0.03
0.02
68
MAX
25°C
0°C
V
V
= 1 V
I(PP)
70°C
25°C
0°C
R
= 1 MΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
= 2.5 V
I(PP)
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 1 MΩ,
nV/√Hz
n
S
L
5
Maximum output-swing
bandwidth
V
O
= V
,
= 20 pF,
R
L
OH
6
kHz
OM
See Figure
70°C
25°C
0°C
4.5
85
B
Unity-gain bandwidth
Phase margin
V = 10 mV,
C
= 20 pF,
See Figure 3
100
65
MHz
1
I
L
70°C
25°C
0°C
34°
36°
30°
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
operating characteristics, V
= 10 V
DD
TLC25L2C
TLC25L2AC
TLC25L2BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.05
0.04
0.04
0.05
0.04
68
MAX
25°C
0°C
V
V
= 1 V
I(PP)
70°C
25°C
0°C
R
= 1 MΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
= 5.5 V
I(PP)
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 1 MΩ,
nV/√Hz
n
S
L
1
Maximum output-swing
bandwidth
V
= V
,
= 20 pF,
R
L
O
OH
1.3
kHz
OM
See Figure 1
70°C
25°C
0°C
0.9
110
125
90
B
1
Unity-gain bandwidth
Phase margin
V = 10 mV,
I
C
= 20 pF,
See Figure 3
MHz
L
70°C
25°C
0°C
38°
40°
34°
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 5 V (unless otherwise noted)
DD
TLC25M2C
TLC25M2AC
TLC25M2BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.22
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
IC
Full range
3
S
L
Average temperature coefficient of
input offset voltage
α
25°C to 70°C
1.7
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 2.5 V,
= 2.5 V,
V
V
= 2.5 V
= 2.5 V
pA
IO
O
IC
0.6
40
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
4
4.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
3.5
25°C
0°C
3.2
3
3.9
3.9
4
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
R
= 100 kΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
3
0
50
50
50
= –100 mV,
= 0.25 V to 2 V,
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
25
15
15
65
60
60
70
60
60
170
200
140
91
91
92
93
92
94
210
250
170
Large-signal differential voltage
amplification
A
VD
R
= 100 kΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
IC
70°C
25°C
0°C
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
560
640
440
= 2.5 V,
= 2.5 V,
O
IC
I
Supply current (two amplifiers)
µA
DD
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics at specified free-air temperature, V
= 10 V (unless otherwise noted)
DD
TLC25M2C
TLC25M2AC
TLC25M2BC
†
PARAMETER
TEST CONDITIONS
UNIT
T
A
MIN
TYP
MAX
10
12
5
25°C
Full range
25°C
1.1
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
S
IC
L
TLC252C
0.9
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
IC
V
IO
Input offset voltage
TLC252AC
TLC252BC
mV
Full range
25°C
6.5
2
S
L
0.224
V
R
= 1.4 V,
= 50 Ω,
V
R
= 0,
= 100 kΩ
O
IC
Full range
3
S
L
Average temperature coefficient of
input offset voltage
α
25°C to 70°C
2.1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
60
300
60
I
Input offset current (see Note 4)
Input bias current (see Note 4)
V
V
= 5 V,
= 5 V,
V
V
= 5 V
= 5 V
pA
IO
O
IC
0.7
50
I
IB
pA
V
O
IC
600
–0.2
to
–0.3
to
25°C
9
9.2
Common-mode input voltage
range (see Note 5)
V
ICR
–0.2
to
Full range
V
V
8.5
25°C
0°C
8
7.8
7.8
8.7
8.7
8.7
0
V
V
High-level output voltage
Low-level output voltage
V
V
V
V
= 100 mV,
= –100 mV,
= 1 V to 6 V,
R
= 100 kΩ
= 0
OH
ID
ID
O
L
70°C
25°C
0°C
50
50
50
I
0
mV
V/mV
dB
OL
OL
70°C
25°C
0°C
0
25
15
15
65
60
60
70
60
60
275
320
230
94
Large-signal differential voltage
amplification
A
VD
R
= 100 kΩ
L
70°C
25°C
0°C
CMRR Common-mode rejection ratio
= V
min
ICR
94
IC
70°C
25°C
0°C
94
93
Supply-voltage rejection ratio
k
V
V
= 5 V to 10 V,
V
V
= 1.4 V
92
dB
SVR
DD
O
(∆V
DD
/∆V )
DD
70°C
25°C
0°C
94
285
345
220
600
800
560
= 5 V,
= 5 V,
O
IC
I
Supply current (two amplifiers)
µA
DD
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
operating characteristics, V
= 5 V
DD
TLC25M2C
TLC25M2AC
TLC25M2BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.43
0.46
0.36
0.40
0.43
0.34
32
MAX
25°C
0°C
V
V
= 1 V
I(PP)
70°C
25°C
0°C
R
= 100 kΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
= 2.5 V
I(PP)
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 100 kΩ,
nV/√Hz
n
S
L
55
V
= V
,
= 20 pF,
R
L
O
OH
Maximum output-swing bandwidth
Unity-gain bandwidth
Phase margin
60
kHz
OM
See Figure
70°C
25°C
0°C
50
525
600
400
40°
41°
39°
B
1
V = 10 mV,
I
C
= 20 pF,
See Figure 3
MHz
L
70°C
25°C
0°C
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
operating characteristics, V
= 10 V
DD
TLC25M2C
TLC25M2AC
TLC25M2BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.62
0.67
0.51
0.56
0.61
0.46
32
MAX
25°C
0°C
V
V
= 1 V
I(PP)
70°C
25°C
0°C
R
= 100 kΩ,
C
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
See Figure 1
= 5.5 V
I(PP)
70°C
25°C
25°C
0°C
V
B
Equivalent input noise voltage
f = 1 kHz,
R
C
= 20 Ω,
See Figure 2
= 100 kΩ,
nV/√Hz
n
S
L
35
V
= V
,
= 20 pF,
R
L
O
OH
Maximum output-swing bandwidth
Unity-gain bandwidth
Phase margin
40
kHz
OM
See Figure 1
70°C
25°C
0°C
30
635
710
510
43°
44°
42°
B
1
V = 10 mV,
I
C
= 20 pF,
See Figure 3
MHz
L
70°C
25°C
0°C
V = 10 mV,
I
See Figure 3
f = B ,
C = 20 pF,
L
1
φ
m
70°C
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
electrical characteristics, V
= 5 V, T = 25°C
A
DD
TLC252Y
TLC25L2Y
TYP MAX
TLC25M2Y
MIN TYP MAX
PARAMETER
TEST CONDITIONS
UNIT
MIN TYP MAX MIN
V
R
= 1.4 V,
V
= 0 V,
O
S
IC
= 50 Ω, See Note 6
V
Input offset voltage
1.1
1.8
0.1
10
1.1
10
1.1
10
mV
IO
Average temperature
coefficient of input
offset voltage
α
1.1
1.7
µV/°C
VIO
Input offset current
(see Note 4)
I
I
V
V
= V /2, V = V /2
DD IC DD
60
60
0.1
0.6
60
60
0.1
0.6
60
60
pA
pA
IO
O
Input bias current
(see Note 4)
= V /2, V = V /2
DD IC DD
0.6
IB
O
Common-mode input
voltage range
(see Note 5)
–0.2 –0.3
–0.2
to
–0.3
to
4.2
–0.2
to
–0.3
to
4.2
V
ICR
to
4
to
4.2
V
4
4
High-level output
voltage
V
V
V
V
= 100 mV, See Note 6
3.2
3.8
0
3.2
4.1
0
3.2
3.9
0
V
OH
ID
Low-level output
voltage
= –100 mV, I
= 0
50
50
50
mV
OL
ID
OL
Large-signal
A
differential voltage
amplification
V
V
= 0.25 V, See Note 6
5
65
65
23
80
50
65
70
700
94
25
65
70
170
91
V/mV
dB
VD
O
Common-mode
rejection ratio
CMRR
= V
min
IC
ICR
Supply-voltage
rejection ratio
V
V
= 5 V to 10 V,
= 1.4 V
DD
O
k
95
97
93
dB
SVR
(∆V
/∆V )
DD
IO
V
V
= V /2,
DD
O
IC
I
Supply current
1.4
3.2
0.02 0.034
0.21 0.56
mA
DD
= V /2, No load
DD
operating characteristics, V
= 5 V, T = 25°C
A
DD
TLC252Y
TLC25L2Y
TLC25M2Y
PARAMETER
TEST CONDITIONS
UNIT
MIN TYP MAX
MIN
TYP MAX
0.03
MIN
TYP MAX
0.43
3.6
2.9
Slew rate at
unity gain
C
= 20 pF,
V
I(PP)
V
I(PP)
= 1 V
L
V/µs
See Note 6
= 2.5 V
0.03
0.40
Equivalent input
noise voltage
V
B
B
f = 1 kHz,
R
C
= 20 Ω
2.5
320
1.7
68
5
32
55
nV√/Hz
kHz
n
S
L
Maximum output-
swing bandwidth
V
R
= V
OH
= 10 kΩ
,
= 20 pF,
O
L
OM
1
Unity-gain
bandwidth
V = 10 mV,
I
C
= 20 pF
0.085
34°
0.525
40°
MHz
L
f = B ,
V = 10 mV,
I
1
φ
m
Phase margin
46°
C
= 20 pF
L
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6. For low-bias mode, R = 1 MΩ; for medium-bias mode, R = 100 kΩ, and for high-bias mode, R = 10 kΩ.
L
L
L
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC252, TLC25L2, and TLC25M2 are optimized for single-supply operation, circuit configurations
used for the various tests often present some inconvenience since the input signal, in many cases, must be
offset from ground. This inconvenience can be avoided by testing the device with split supplies and the output
load tied to the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The
use of either circuit gives the same result.
V
DD+
V
DD
–
–
V
O
V
O
V
I
+
V
I
+
C
R
L
L
C
R
L
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
2 kΩ
2 kΩ
V
DD
V
DD
–
20 Ω
20 Ω
–
V
O
1/2 V
DD
V
O
+
+
20 Ω
20 Ω
V
DD–
(a) SPLIT SUPPLY
(a) SINGLE SUPPLY
Figure 2. Noise-Test Circuit
10 kΩ
10 kΩ
V
DD+
V
DD
100 Ω
–
V
I
100 Ω
–
V
O
V
I
+
V
O
C
L
+
1/2 V
DD
C
L
V
DD–
(a) SINGLE SUPPLY
(a) SPLIT SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
vs Supply voltage
vs Free-air temperature
4
5
I
Supply current
DD
Low bias
vs Frequency
6
7
8
6
7
8
A
VD
Large-signal differential voltage amplification Medium bias vs Frequency
High bias
Low bias
vs Frequency
vs Frequency
Phase shift
Medium bias vs Frequency
High bias vs Frequency
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
10000
10000
1000
100
10
V
V
V
= 10 V
= 0 V
= 2 V
DD
IC
O
V
= V = 0.2 V
IC
O
DD
No Load
T
A
High-Bias Versions
= 25°C
No Load
High-Bias Versions
1000
100
10
Medium-Bias Versions
Medium-Bias Versions
Low-Bias Versions
Low-Bias Versions
0
0
0
10
20
30
40
50
60
70
80
0
2
4
6
8
10 12 14 16 18 20
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 4
Figure 5
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
LOW-BIAS LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
7
10
6
10
5
10
4
10
V
R
T
A
= 10 V
= 1 MΩ
= 25°C
DD
L
0°
30°
60°
A
VD
(left scale)
3
2
10
90°
Phase Shift
(right scale)
10
120°
1
10
150°
180°
1
0.1
0.1
1
10
100
1 k
10 k
100 k
Frequency – Hz
Figure 6
MEDIUM-BIAS LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
10
10
10
10
V
R
T
A
= 10 V
= 100 kΩ
= 25°C
DD
L
0°
30°
60°
A
(left scale)
VD
3
2
10
90°
Phase Shift
(right scale)
10
120°
1
10
150°
180°
1
0.1
1
10
100
1 k
10 k
100 k
1 M
Frequency – Hz
Figure 7
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
TYPICAL CHARACTERISTICS
HIGH-BIAS LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
10
10
10
10
V
R
T
A
= 10 V
= 10 kΩ
= 25°C
DD
L
0°
30°
60°
Phase Shift (right scale)
3
2
10
90°
10
120°
A
VD
(left scale)
1
10
150°
180°
1
0.1
10
100
1 k
10 k
100 k
1 M
10 M
Frequency – Hz
Figure 8
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC252, TLC252A, TLC252B, TLC252Y, TLC25L2, TLC25L2A, TLC25L2B
TLC25L2Y, TLC25M2, TLC25M2A, TLC25M2B, TLC25M2Y
LinCMOS DUAL OPERATIONAL AMPLIFIERS
SLOS002I – JUNE 1983 – REVISED MARCH 2001
APPLICATION INFORMATION
latch-up avoidance
Junction-isolated CMOS circuits have an inherent parasitic PNPN structure that can function as an SCR. Under
certain conditions, this SCR may be triggered into a low-impedance state, resulting in excessive supply current.
To avoid such conditions, no voltage greater than 0.3 V beyond the supply rails should be applied to any pin.
In general, the operational amplifier supplies should be applied simultaneously with, or before, application of
any input signals.
output stage considerations
The amplifier’s output stage consists of a source-follower-connected pullup transistor and an open-drain
pulldown transistor. The high-level output voltage (V ) is virtually independent of the I
selection and
OH
DD
increases with higher values of V and reduced output loading. The low-level output voltage (V ) decreases
DD
OL
with reduced output current and higher input common-mode voltage. With no load, V is essentially equal to
OL
the potential of V
/GND.
DD–
supply configurations
Even though the TLC252/25_2C series is characterized for single-supply operation, it can be used effectively
inasplit-supplyconfigurationiftheinputcommon-modevoltage(V
voltage limits are not exceeded.
),outputswing(V andV ),andsupply
ICR
OL OH
circuit layout precautions
The user is cautioned that whenever extremely high circuit impedances are used, care must be exercised in
layout, construction, board cleanliness, and supply filtering to avoid hum and noise pickup, as well as excessive
dc leakages.
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
PACKAGING INFORMATION
Orderable Device
TLC252ACD
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
ACTIVE
SOIC
SOIC
D
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
252AC
TLC252ACDG4
ACTIVE
D
75
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
252AC
TLC252ACP
TLC252BCD
OBSOLETE
ACTIVE
SOIC
SOIC
D
D
8
8
TBD
Call TI
Call TI
75
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
252BC
TLC252BCDG4
TLC252BCP
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
D
P
8
8
8
8
8
8
8
8
8
8
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
N / A for Pkg Type
252BC
50
Pb-Free
(RoHS)
TLC252BCP
TLC252BCP
252C
TLC252BCPE4
TLC252CD
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
SOIC
SOIC
SOIC
SOIC
PDIP
D
75
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
TLC252CDG4
TLC252CDR
D
75
Green (RoHS
& no Sb/Br)
252C
D
2500
2500
50
Green (RoHS
& no Sb/Br)
252C
TLC252CDRG4
TLC252CP
D
Green (RoHS
& no Sb/Br)
252C
P
Pb-Free
(RoHS)
TLC252CP
TLC252CP
P252
TLC252CPE4
TLC252CPWR
TLC252CPWRG4
TLC25L2ACD
TLC25L2ACDG4
PDIP
P
50
Pb-Free
(RoHS)
N / A for Pkg Type
TSSOP
TSSOP
SOIC
SOIC
PW
PW
D
2000
2000
75
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Green (RoHS
& no Sb/Br)
P252
Green (RoHS
& no Sb/Br)
0 to 70
0 to 70
25L2AC
25L2AC
D
75
Green (RoHS
& no Sb/Br)
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC25L2BCD
ACTIVE
SOIC
SOIC
D
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
25L2BC
TLC25L2BCDG4
ACTIVE
D
75
Green (RoHS
& no Sb/Br)
Level-1-260C-UNLIM
0 to 70
25L2BC
TLC25L2BCDR
TLC25L2BCP
PREVIEW
ACTIVE
SOIC
PDIP
D
P
8
8
TBD
Call TI
Call TI
50
50
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
0 to 70
0 to 70
0 to 70
0 to 70
TLC25L2BC
TLC25L2BC
25L2C
TLC25L2BCPE4
TLC25L2CD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
PDIP
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
P
D
D
D
D
P
P
8
8
8
8
8
8
8
Pb-Free
(RoHS)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
75
Green (RoHS
& no Sb/Br)
TLC25L2CDG4
TLC25L2CDR
TLC25L2CDRG4
TLC25L2CP
75
Green (RoHS
& no Sb/Br)
25L2C
2500
2500
50
Green (RoHS
& no Sb/Br)
25L2C
Green (RoHS
& no Sb/Br)
25L2C
Pb-Free
(RoHS)
TLC25L2CP
TLC25L2CP
P25L2
TLC25L2CPE4
50
Pb-Free
(RoHS)
N / A for Pkg Type
TLC25L2CPSR
TLC25L2CPSRG4
TLC25L2CPWRG4
TLC25M2ACD
OBSOLETE
OBSOLETE
OBSOLETE
ACTIVE
SO
SO
PS
PS
PW
D
8
8
8
8
TBD
TBD
TBD
Call TI
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TSSOP
SOIC
Call TI
Call TI
P25L2
75
75
50
50
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
25M2AC
TLC25M2ACDG4
TLC25M2ACP
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
PDIP
D
P
P
8
8
8
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
25M2AC
Pb-Free
(RoHS)
TLC25M2AC
TLC25M2AC
TLC25M2ACPE4
Pb-Free
(RoHS)
TLC25M2BCD
TLC25M2BCP
OBSOLETE
OBSOLETE
SOIC
PDIP
D
P
8
8
TBD
TBD
Call TI
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Call TI
Call TI
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
Orderable Device
Status Package Type Package Pins Package
Eco Plan Lead/Ball Finish
MSL Peak Temp
Op Temp (°C)
0 to 70
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
TLC25M2CD
TLC25M2CDG4
TLC25M2CDR
TLC25M2CDRG4
TLC25M2CP
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
D
8
8
8
8
8
8
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
CU NIPDAU
Call TI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
N / A for Pkg Type
Call TI
25M2C
ACTIVE
ACTIVE
D
D
75
2500
2500
50
Green (RoHS
& no Sb/Br)
0 to 70
25M2C
Green (RoHS
& no Sb/Br)
0 to 70
25M2C
ACTIVE
D
Green (RoHS
& no Sb/Br)
0 to 70
25M2C
ACTIVE
P
Pb-Free
(RoHS)
0 to 70
TLC25M2CP
TLC25M2CP
TLC25M2CPE4
TLC25M2CPWLE
ACTIVE
PDIP
P
50
Pb-Free
(RoHS)
0 to 70
OBSOLETE
TSSOP
PW
TBD
0 to 70
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 3
PACKAGE OPTION ADDENDUM
www.ti.com
26-Aug-2013
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 4
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC252CDR
TLC252CDR
SOIC
SOIC
D
D
8
8
8
8
8
8
2500
2500
2000
2500
2000
2500
330.0
330.0
330.0
330.0
330.0
330.0
12.4
12.4
12.4
12.4
12.4
12.4
6.4
6.4
7.0
6.4
7.0
6.4
5.2
5.2
3.6
5.2
3.6
5.2
2.1
2.1
1.6
2.1
1.6
2.1
8.0
8.0
8.0
8.0
8.0
8.0
12.0
12.0
12.0
12.0
12.0
12.0
Q1
Q1
Q1
Q1
Q1
Q1
TLC252CPWR
TLC25L2CDR
TLC25L2CPWR
TLC25M2CDR
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
17-Aug-2012
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC252CDR
TLC252CDR
SOIC
SOIC
D
D
8
8
8
8
8
8
2500
2500
2000
2500
2000
2500
340.5
367.0
367.0
340.5
367.0
340.5
338.1
367.0
367.0
338.1
367.0
338.1
20.6
35.0
35.0
20.6
35.0
20.6
TLC252CPWR
TLC25L2CDR
TLC25L2CPWR
TLC25M2CDR
TSSOP
SOIC
PW
D
TSSOP
SOIC
PW
D
Pack Materials-Page 2
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