TLC27L1 [TI]
LinCMOSE LOW-POWER OPERATIONAL AMPLIFIERS; LinCMOSE低功耗运算放大器
| 型号： | TLC27L1 |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LinCMOSE LOW-POWER OPERATIONAL AMPLIFIERS |
| 文件： | 总32页 (文件大小：518K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
Input Offset Voltage Drift . . . Typically
Low Noise . . . 68 nV/√Hz Typically at
0.1 µV/Month, Including the First 30 Days
f = 1 kHz
Wide Range of Supply Voltages Over
Specified Temperature Range:
0°C to 70°C . . . 3 V to 16 V
Output Voltage Range includes Negative
Rail
12
High Input Impedance . . . 10 Ω Typ
–40°C to 85°C . . . 4 V to 16 V
–55°C to 125°C . . . 5 V to 16 V
ESD-Protection Circuitry
Small-Outline Package Option Also
Available in Tape and Reel
Single-Supply Operation
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix
and I-Suffix Types)
Designed-In Latch-Up Immunity
description
The TLC27L1 operational amplifier combines a wide range of input offset-voltage grades with low offset-voltage
drift and high input impedance. In addition, the TLC27L1 is a low-bias version of the TLC271 programmable
amplifier. These devices use the Texas Instruments silicon-gate LinCMOS technology, which provides
offset-voltage stability far exceeding the stability available with conventional metal-gate processes.
Three offset-voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC27L1 (10
mV) to the TLC27L1B (2 mV) low-offset version. The extremely high input impedance and low bias currents,
in conjunction with good common-mode rejection and supply voltage rejection, make these devices a good
choice for new state-of-the-art designs as well as for upgrading existing designs.
Ingeneral, manyfeaturesassociatedwithbipolartechnologyareavailableinLinCMOS operationalamplifiers,
without the power penalties of bipolar technology. General applications such as transducer interfacing, analog
calculations, amplifier blocks, active filters, and signal buffering are all easily designed with the TLC27L1. The
devices also exhibit low-voltage single-supply operation, making them ideally suited for remote and
inaccessible battery-powered applications. The common-mode input-voltage range includes the negative rail.
The device inputs and output are designed to withstand –100-mA surge currents without sustaining latch-up.
The TLC27L1 incorporates internal electrostatic-discharge (ESD) protection circuits that prevent functional
failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2; however, care should be
exercised in handling these devices as exposure to ESD may result in the degradation of the device parametric
performance.
AVAILABLE OPTIONS
PACKAGE
D OR P PACKAGE
V
max
IO
SMALL
OUTLINE
(D)
PLASTIC
DIP
(TOP VIEW)
T
A
AT 25°C
(P)
OFFSET N1
IN –
V
V
OUT
1
2
3
4
8
7
6
5
DD
DD
2 mV
5 mV
TLC27L1BCD
TLC27L1ACD
TLC27L1CD
TLC27L1BCP
TLC27L1ACP
TLC27L1CP
0°C to 70°C
IN +
GND
10 mV
OFFSET N2
2 mV
5 mV
10 mV
TLC27L1BID
TLC27L1AID
TLC27L1ID
TLC27L1BIP
TLC27L1AIP
TLC27L1IP
–40°C to 85°C
–55°C to 125°C
10 mV
TLC27L1MD
TLC27L1MP
The D package is available taped and reeled. Add R suffix to the device type
(e.g., TLC27L1BCDR).
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
description (continued)
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized
for operation from – 40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of – 55°C to 125°C.
equivalent schematic
V
DD
P3
P12
P9A
R6
N5
P4
P5
P9B
P7B
P11
P1
P2 R2
IN –
IN +
R1
P10
N11
N12
P7A
P6A
P6B
P8
C1
R5
N3
N9
N6
R7
N7
N1
N2
N4
N13
D1
D2
R3
R4
N10
OFFSET OFFSET
N1
GND
OUT
N2
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
absolute maximum ratings over operating free-air temperature (unless otherwise noted)
Supply voltage, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V
DD
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±V
Input voltage range, V (any input) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to V
ID
DD
DD
I
Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±5 mA
I
Output current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±30 mA
O
Duration of short-circuit current at (or below) 25°C (see Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Unlimited
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature, T : C suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
A
I suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
M suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
Storage temperature range, T
Case temperature for 60 seconds, T : FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or P package . . . . . . . . . . . . . . . . . 260°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
stg
C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
3. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum
dissipation rating is not exceeded (see application section).
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D
P
725 mW
5.8 mW/°C
8.0 mW/°C
464 mW
377 mW
145 mW
1000 mW
640 mW
520 mW
200 mW
recommended operating conditions
C SUFFIX
I SUFFIX
M SUFFIX
UNIT
V
MIN
3
MAX
MIN
4
MAX
MIN
5
MAX
16
Supply voltage, V
16
3.5
8.5
70
16
3.5
8.5
85
DD
V
V
= 5 V
–0.2
–0.2
0
–0.2
–0.2
–40
0
3.5
DD
Common-mode input voltage, V
V
IC
Operating free-air temperature, T
= 10 V
0
8.5
DD
–55
125
°C
A
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
electrical characteristics at specified free-air temperature (unless otherwise noted)
TLC27L1C, TLC27L1AC, TLC27L1BC
TEST
†
V
= 5 V
V
= 10 V
T
A
PARAMETER
UNIT
DD
TYP MAX MIN
DD
TYP MAX
CONDITIONS
MIN
25°C
Full range
25°C
1.1
10
12
5
1.1
10
12
5
TLC27L1C
TLC27L1AC
TLC27L1BC
V
V
R
= 1.4 V,
= 0 V,
= 50 Ω,
O
IC
S
I
0.9
0.9
V
IO
Input offset voltage
mV
Full range
25°C
6.5
2
6.5
2
R = 1 MΩ
0.24
0.26
Full range
3
3
Average temperature coefficient of
input offset voltage
25°C to
70°C
α
1.1
1
µV/°C
VIO
25°C
70°C
25°C
70°C
0.1
7
0.1
V
V
= V
/2,
/2
O
IC
DD
= V
I
Input offset current (see Note 4)
Input bias current (see Note 4)
pA
IO
300
600
8
0.7
300
600
DD
0.6
40
V
V
= V
DD
= V
/2,
/2
O
IC
I
IB
pA
V
50
DD
–0.2 –0.3
–0.2 –0.3
25°C
to
4
to
4.2
to
9
to
9.2
Common-mode input
voltage range (see Note 5)
V
ICR
–0.2
to
3.5
–0.2
to
8.5
Full range
V
V
25°C
0°C
3.2
3
4.1
4.1
4.2
0
8
7.8
7.8
8.9
8.9
8.9
0
V
ID
= 100 mV,
V
V
High-level output voltage
Low-level output voltage
OH
R = 1 MΩ
L
70°C
25°C
0°C
3
50
50
50
50
50
50
V
= –100 mV,
= 0
ID
0
0
mV
V/mV
dB
OL
I
OL
70°C
25°C
0°C
0
0
50
50
50
65
60
60
70
60
60
520
700
380
94
95
95
97
97
98
65
10
12
8
50
870
Large-signal differential
voltage amplification
R = 1 MΩ,
See Note 6
L
A
50 1030
VD
70°C
25°C
0°C
50
65
60
60
70
60
60
660
97
97
97
97
97
98
95
14
18
11
CMRR Common-mode rejection ratio
V
IC
= V
min
ICR
70°C
25°C
0°C
Supply-voltage rejection ratio
V
V
= 5 V to 10 V,
= 1.4 V
DD
O
k
dB
nA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
IO
)
70°C
25°C
25°C
0°C
I
I
Input current (BIAS SELECT)
Supply current
V
= V
I(SEL)
DD
17
21
14
23
33
20
V
V
= V
DD
= V
/2,
/2,
DD
O
IC
No load
70°C
†
Full range is 0°C to 70°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 10 V, V = 1 V to 6 V.
DD O
DD
O
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
electrical characteristics at specified free-air temperature (unless otherwise noted)
TLC27L1I, TLC27L1AI, TLC27L1BI
= 5 V = 10 V
TEST
CONDITIONS
†
V
V
T
A
PARAMETER
UNIT
DD
TYP MAX MIN
DD
TYP MAX
MIN
25°C
Full range
25°C
1.1
10
13
5
1.1
10
13
5
TLC27L1I
TLC27L1AI
TLC27L1BI
V
V
R
R
= 1.4 V,
= 0 V,
= 50 Ω,
= 1 MΩ
O
IC
S
L
0.9
0.9
V
IO
Input offset voltage
mV
Full range
25°C
7
7
0.24
2
0.26
2
Full range
3.5
3.5
Average temperature coefficient
of input offset voltage
25°C to
85°C
α
1.1
0.1
1
µV/°C
VIO
25°C
85°C
25°C
85°C
0.1
V
V
= V
/2,
/2
O
IC
DD
= V
I
IO
Input offset current (see Note 4)
Input bias current (see Note 4)
pA
24 1000
0.6
26 1000
0.7
DD
V
V
= V
DD
= V
/2,
/2
O
IC
I
IB
pA
V
200 2000
220 2000
DD
–0.2 –0.3
–0.2 –0.3
25°C
to
4
to
4.2
to
9
to
9.2
Common-mode input
voltage range (see Note 5)
V
ICR
–0.2
to
3.5
–0.2
to
8.5
Full range
V
V
25°C
–40°C
85°C
3
3
3
4.1
4.1
4.2
0
8
7.8
7.8
8.9
8.9
8.9
0
V
ID
= 100 mV,
V
V
High-level output voltage
Low-level output voltage
OH
R = 1 MΩ
L
25°C
50
50
50
50
50
50
V
= –100 mV,
= 0
ID
–40°C
85°C
0
0
mV
V/mV
dB
OL
I
OL
0
0
25°C
50
50
50
65
60
60
70
60
60
520
900
330
94
95
95
97
97
98
65
10
16
17
50
870
Large-signal differential
voltage amplification
R = 1 MΩ
See Note 6
L
A
–40°C
85°C
50 1550
VD
50
65
60
60
70
60
60
585
97
97
98
97
97
98
95
14
25
10
25°C
CMRR Common-mode rejection ratio
V
IC
= V
min
ICR
–40°C
85°C
25°C
Supply-voltage rejection ratio
V
V
= 5 V to 10 V,
= 1.4 V
DD
O
k
–40°C
85°C
dB
nA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
IO
)
I
I
Input current (BIAS SELECT)
Supply current
V
= V
25°C
I(SEL)
DD
25°C
17
27
13
23
43
18
V
V
= V
DD
= V
/2,
/2,
DD
O
IC
–40°C
85°C
No load
†
Full range is –40 to 85°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 10 V, V = 1 V to 6 V.
DD O
DD
O
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
electrical characteristics at specified free-air temperature (unless otherwise noted)
TLC27L1M
TEST
CONDITIONS
†
V
= 5 V
V
= 10 V
T
A
PARAMETER
UNIT
DD
TYP MAX
DD
MIN TYP MAX
MIN
V
V
= 1.4 V,
= 0 V,
O
IC
25°C
1.1
10
12
1.1
10
12
V
IO
Input offset voltage
mV
R
R
= 50 Ω,
= 1 MΩ
S
L
Full range
Average temperature coefficient
of input offset voltage
25°C to
125°C
α
1.4
1.4
µV/°C
VIO
25°C
125°C
25°C
0.1
1.4
0.6
9
0.1
1.8
0.7
10
pA
nA
pA
nA
V
V
= V
/2,
/2
O
IC
DD
= V
I
Input offset current (see Note 4)
Input bias current (see Note 4)
IO
15
35
15
35
DD
V
V
= V
DD
= V
/2,
/2
O
IC
I
IB
125°C
DD
0
to
4
–0.3
to
4.2
0
to
9
–0.3
to
9.2
25°C
V
V
Common-mode input
voltage range (see Note 5)
V
ICR
0
to
0
to
Full range
3.5
8.5
25°C
–55°C
125°C
25°C
3.2
3
4.1
4.1
4.2
0
8
7.8
7.8
8.9
8.8
9
V
= 100 mV,
ID
L
V
V
High-level output voltage
Low-level output voltage
V
mV
OH
R = 1 MΩ
3
50
50
50
0
50
50
50
V
= –100 mV,
= 0
ID
–55°C
125°C
25°C
0
0
OL
I
OL
0
0
50
520
50
870
Large-signal differential
voltage amplification
R = 1 MΩ,
See Note 6
L
A
–55°C
125°C
25°C
25 1000
25 1775
V/mV
dB
VD
25
65
60
60
70
60
60
200
94
95
85
97
97
98
65
10
17
7
25
65
60
60
70
60
60
380
97
97
91
97
97
98
95
14
28
9
CMRR Common-mode rejection ratio
V
= V
min
ICR
–55°C
125°C
25°C
IC
Supply-voltage rejection ratio
V
V
= 5 V to 10 V,
= 1.4 V
O
DD
k
–55°C
125°C
25°C
dB
nA
µA
SVR
I(SEL)
DD
(∆V
DD
/∆V
IO
)
I
I
Input current (BIAS SELECT)
Supply current
V
= V
I(SEL)
DD
25°C
17
30
12
23
48
15
V
V
= V
/2,
O
IC
DD
= V
/2,
DD
–55°C
125°C
No load
†
Full range is –55°C to 125°C.
NOTES: 4. The typical values of input bias current and input offset current below 5 pA were determined mathematically.
5. This range also applies to each input individually.
6. At V
= 5 V, V = 0.25 V to 2 V; at V = 10 V, V = 1 V to 6 V.
DD O
DD
O
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L1C,
TLC27L1AC,
TLC27L1BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.03
0.03
0.03
0.02
MAX
25°C
0°C
V
V
= 1 V
I(PP)
R
C
= 1 MΩ,
= 20 pF,
L
L
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
See Figure 33
= 2.5 V
I(PP)
70°C
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
0°C
5
6
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 33
70°C
25°C
0°C
4.5
85
V = 10 mV,
I
See Figure 35
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
100
65
kHz
70°C
25°C
0°C
34°
36°
30°
V = 10 mV,
f = B ,
1
See Figure 35
I
L
φ
m
C
= 20 pF,
70°C
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L1C,
TLC27L1AC,
TLC27L1BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.05
0.04
0.04
0.05
0.04
MAX
25°C
0°C
V
V
= 1 V
I(PP)
R
C
= 1 MΩ,
= 20 pF,
L
L
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
See Figure 33
= 5.5 V
I(PP)
70°C
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
0°C
1
1.3
0.9
110
125
90
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 33
70°C
25°C
0°C
V = 10 mV,
I
See Figure 35
C
= 20 pF,
L
Unity-gain bandwidth
Phase margin
kHz
1
70°C
25°C
0°C
38°
40°
34°
V = 10 mV,
f = B ,
1
See Figure 35
I
L
φ
m
C
= 20 pF,
70°C
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L1I,
TLC27L1AI,
TLC27L1BI
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.03
0.04
0.03
0.03
0.04
0.02
MAX
25°C
–40°C
85°C
V
V
= 1 V
I(PP)
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
25°C
See Figure 33
= 2.5 V
–40°C
85°C
I(PP)
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
–40°C
85°C
5
7
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 33
4
25°C
85
V = 10 mV,
I
See Figure 35
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
–40°C
85°C
130
55
MHz
25°C
34°
38°
28°
V = 10 mV,
f = B ,
1
See Figure 35
I
L
φ
m
–40°C
85°C
C
= 20 pF,
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L1C,
TLC27L1AC,
TLC27L1BC
PARAMETER
TEST CONDITIONS
T
A
UNIT
MIN
TYP
0.05
0.06
0.03
0.04
0.05
0.03
MAX
25°C
–40°C
85°C
V
V
= 1 V
I(PP)
R
C
= 1 MΩ,
= 20 pF,
L
L
SR
Slew rate at unity gain
V/µs
25°C
See Figure 33
= 5.5 V
–40°C
85°C
I(PP)
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
L
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
–40°C
85°C
1
1.4
0.8
110
155
80
V
R
= V
OH
= 1 MΩ,
,
C
= 20 pF,
O
L
B
B
Maximum output-swing bandwidth
kHz
OM
See Figure 33
25°C
V = 10 mV,
I
See Figure 35
C = 20 pF,
L
Unity-gain bandwidth
Phase margin
–40°C
85°C
MHz
1
25°C
38°
42°
32°
V = 10 mV,l
f = B ,
1
See Figure 35
I
L
φ
m
–40°C
85°C
C
= 20 pF,
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
operating characteristics at specified free-air temperature, V
= 5 V
DD
TLC27L1M
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
TYP
0.03
0.04
0.02
0.03
0.04
0.02
MAX
25°C
–55°C
125°C
25°C
V
= 1 V
I(PP)
I(PP)
R
C
= 1 MΩ,
= 20 pF,
See Figure 33
L
L
SR
Slew rate at unity gain
V/µs
V
= 2.5 V
–55°C
125°C
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
–55°C
125°C
25°C
5
8
V
R
= V
,
C
= 20 pF,
O
L
OH
= 1 MΩ,
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 33
3
85
V = 10 mV,
I
See Figure 35
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
–55°C
125°C
25°C
140
45
kHz
34°
39°
25°
V = 10 mV,
f = B ,
1
See Figure 35
I
φ
m
–55°C
125°C
C
= 20 pF,
L
operating characteristics at specified free-air temperature, V
= 10 V
DD
TLC27L1M
PARAMETER
TEST CONDITIONS
T
UNIT
A
MIN
TYP
0.05
0.06
0.03
0.04
0.06
0.03
MAX
25°C
–55°C
125°C
25°C
V
= 1 V
I(PP)
I(PP)
R
C
= 1 MΩ,
= 20 pF,
See Figure 33
L
L
SR
Slew rate at unity gain
V/µs
V
= 5.5 V
–55°C
125°C
f = 1 kHz,
See Figure 34
R
= 20 Ω,
S
V
n
Equivalent input noise voltage
25°C
68
nV/√Hz
25°C
–55°C
125°C
25°C
1
1.5
0.7
110
165
70
V
R
= V
,
C
= 20 pF,
O
L
OH
= 1 MΩ,
L
B
Maximum output-swing bandwidth
kHz
OM
1
See Figure 33
V = 10 mV,
I
See Figure 35
C = 20 pF,
L
B
Unity-gain bandwidth
Phase margin
–55°C
125°C
25°C
kHz
38°
43°
29°
V = 10 mV,
f = B ,
1
See Figure 35
I
φ
m
–55°C
125°C
C
= 20 pF,
L
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
1, 2
V
Input offset voltage
Distribution
Distribution
IO
α
Temperature coefficient
3, 4
VIO
vs High-level output current
vs Supply voltage
vs Free-air temperature
5, 6
7
8
V
V
A
High-level output voltage
OH
OL
vs Common-mode input voltage
vs Differential input voltage
vs Free-air temperature
9, 10
11
12
Low-level output voltage
vs Low-level output current
13, 14
vs Supply voltage
vs Free-air temperature
vs Frequency
15
16
27, 28
Large-signal differential voltage amplification
VD
I
I
Input bias current
vs Free-air temperature
vs Free-air temperature
vs Supply voltage
17
17
18
IB
Input offset current
Maximum input voltage
IO
V
I
vs Supply voltage
vs Free-air temperature
19
20
I
Supply current
Slew rate
DD
vs Supply voltage
vs Free-air temperature
21
22
SR
Bias-select current
vs Supply voltage
vs Frequency
23
24
V
B
Maximum peak-to-peak output voltage
O(PP)
vs Free-air temperature
vs Supply voltage
25
26
Unity-gain bandwidth
1
vs Supply voltage
vs Free-air temperature
vs Capacitance load
29
30
31
φ
m
Phase margin
V
n
Equivalent input noise voltage
Phase shift
vs Frequency
vs Frequency
32
27, 28
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC27L1
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27L1
INPUT OFFSET VOLTAGE
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
905 Amplifiers Tested From 6 Wafer Lots
905 Amplifiers Tested From 6 Wafer Lots
V
T
A
= 5 V
DD
= 25°C
V
= 10 V
DD
= 25°C
T
A
P Package
P Package
–5 –4 –3 –2 –1
0
1
2
3
4
5
–5 –4 –3 –2 –1
0
1
2
3
4
5
V
IO
– Input Offset Voltage – mV
V
IO
– Input Offset Voltage – mV
Figure 1
Figure 2
DISTRIBUTION OF TLC27L1
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27L1
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
70
60
50
40
30
20
10
0
70
356 Amplifiers Tested From 8 Wafer Lots
356 Amplifiers Tested From 8 Wafer Lots
V
T
A
= 10 V
V
T
A
= 5 V
DD
= 25°C to 125°C
DD
= 25°C to 125°C
60
50
40
30
20
10
0
P Package
Outliers:
(1) 19.2 µV/°C
(1) 12.1 µV/°C
P Package
Outliers:
(1) 18.7 µV/°C
(1) 11.6 µV/°C
–10 –8 –6 –4 –2
0
2
4
6
8
10
–10 –8 –6 –4 –2
0
2
4
6
8
10
α
– Temperature Coefficient – µV/°C
α
– Temperature Coefficient – µV/°C
VIO
VIO
Figure 3
Figure 4
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
16
14
12
10
8
5
4
3
2
1
0
V
T
= 100 mV
V
T
= 100 mV
= 25°C
ID
= 25°C
ID
A
A
V
= 16 V
DD
V
= 5 V
DD
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
6
4
2
0
0
–5 –10 –15 –20 –25 –30 –35 –40
0
–2
–4
–6
–8
–10
I
– High-Level Output Current – mA
I
– High-Level Output Current – mA
OH
OH
Figure 5
Figure 6
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
16
14
12
10
8
–1.6
–1.7
–1.8
–1.9
–2
I
= –5 mA
= 100 mV
OH
V
R
T
= 100 mV
= 1 MΩ
= 25°C
ID
L
A
V
ID
V
DD
= 5 V
V
DD
= 10 V
6
–2.1
–2.2
–2.3
–2.4
4
2
0
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 7
Figure 8
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
500
450
400
350
300
250
700
V
= 5 V
= 5 mA
= 25°C
DD
V
= 10 V
= 5 mA
= 25°C
DD
I
OL
I
OL
650
600
T
A
T
A
550
500
V
= –100 mV
ID
V
V
V
= –100 mV
= –1 V
ID
ID
ID
450
400
= –2.5 V
V
ID
= –1 V
350
300
0
1
2
3
4
5
6
7
8
9
10
0
1
2
3
4
V
IC
– Common-Mode Input Voltage – V
V
IC
– Common-Mode Input Voltage – V
Figure 9
Figure 10
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
900
800
700
600
500
400
300
200
100
0
800
700
600
500
400
300
200
100
0
I
V
= 5 mA
= –1 V
= 0.5 V
I
V
T
= 5 mA
OL
ID
IC
OL
IC
A
= V /2
ID
= 25°C
V
V
= 5 V
DD
V
= 5 V
DD
V
DD
= 10 V
V
= 10 V
DD
–75 –50 –25
0
25
50
75
100 125
0
–1 –2 –3 –4 –5 –6 –7 –8 –9 –10
T
A
– Free-Air Temperature – °C
V
ID
– Differential Input Voltage – V
Figure 11
Figure 12
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
3
2.5
2
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
V
V
= –1 V
= 0.5 V
ID
V
V
= –1 V
= 0.5 V
ID
IC
IC
T
A
= 25°C
T
A
= 25°C
V
= 16 V
DD
V
= 5 V
DD
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
1.5
1
0.5
0
0
5
10
15
20
25
30
0
1
2
3
4
5
6
7
8
I
– Low-Level Output Current – mA
OL
I
– Low-Level Output Current – mA
OL
Figure 13
Figure 14
LARGE-SIGNAL
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
2000
1800
1600
1400
1200
1000
800
2000
1800
1600
1400
1200
1000
800
T
A
= –55°C
R
= 1 MΩ
R
= 1 MΩ
L
L
– 40°C
T
A
= 0°C
25°C
70°C
V
DD
= 10 V
85°C
600
600
V
DD
= 5 V
400
400
125°C
200
200
0
0
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 15
Figure 16
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
INPUT BIAS AND INPUT OFFSET
CURRENTS
vs
MAXIMUM INPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
16
14
12
10
8
10000
1000
100
10
V
V
= 10 V
T
A
= 25°C
DD
= 5 V
IC
See Note A
I
IB
I
IO
6
4
1
2
0
0.1
0
2
4
6
8
10
12
14
16
25 35 45 55 65 75 85 95 105 115 125
– Free-Air Temperature – °C
T
A
V
– Supply Voltage – V
DD
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 17
Figure 18
SUPPLY CURRENT
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
30
25
20
15
10
5
45
T = –55°C
A
V
= V /2
DD
O
V
= V /2
DD
O
40
35
30
25
20
15
10
5
No Load
No Load
–40°C
V
= 10 V
DD
0°C
25°C
70°C
V
DD
= 5 V
125°C
0
0
–75 –50 –25
0
25
50
75
100 125
0
2
4
6
8
10
12
14
16
T
A
– Free-Air Temperature – °C
V
DD
– Supply Voltage – V
Figure 19
Figure 20
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
SLEW RATE
vs
SLEW RATE
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
0.07
0.07
0.06
0.05
0.04
0.03
A
= 1
V
R
C
= 1 MΩ
L
L
V
I(PP)
= 1 V
V
V
= 10 V
= 5.5 V
DD
I(PP)
= 20 pF
= 1
0.06
0.05
0.04
0.03
0.02
0.01
0.00
R
C
= 1 MΩ
= 20 pF
L
L
A
V
See Figure 33
T = 25°C
A
See Figure 33
V
V
= 10 V
DD
= 1 V
I(PP)
V
V
= 5 V
DD
0.02
0.01
0.00
= 1 V
I(PP)
V
V
= 5 V
DD
= 2.5 V
I(PP)
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 21
Figure 22
BIAS-SELECT CURRENT
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
FREQUENCY
10
9
8
7
6
5
4
3
2
1
0
150
135
120
T
= 25°C
A
V
= V
DD
I(SEL)
T
= 125°C
= 25°C
= –55°C
A
V
= 10 V
= 5 V
DD
T
A
105
90
75
60
45
30
15
0
T
A
V
DD
R
= 1 MΩ
L
See Figure 33
0.1
1
10
100
0
2
4
6
8
10
12
14
16
f – Frequency – kHz
V
DD
– Supply Voltage – V
Figure 23
Figure 24
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH
UNITY-GAIN BANDWIDTH
vs
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
140
130
120
110
100
90
150
130
110
90
V = 10 mV
V
= 5 V
I
DD
V = 10 mV
C
= 20 pF
L
I
C
T
A
= 25°C
= 20 pF
L
See Figure 35
See Figure 35
80
70
70
50
60
50
30
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 25
Figure 26
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
V
= 5 V
DD
R
T
A
= 1 MΩ
= 25°C
L
0°
30°
A
VD
60°
90°
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k 100 k
1 M
f – Frequency – Hz
Figure 27
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC27L1, TLC27L1A, TLC27L1B
LinCMOS LOW-POWER
OPERATIONAL AMPLIFIERS
SLOS154 – DECEMBER 1995
†
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
10
6
10
5
10
V
R
T
A
= 10 V
= 1 MΩ
= 25°C
DD
L
0°
4
3
2
1
10
10
10
10
30°
A
VD
60°
90°
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k 100 k
1 M
f – Frequency – Hz
Figure 28
PHASE MARGIN
vs
SUPPLY VOLTAGE
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
42°
40°
38°
36°
34°
32°
30°
40°
V
= 5 mV
V = 10 mV
DD
V = 10 mV
I
C
= 20 pF
I
38°
36°
L
C
= 20 pF
L
T
A
= 25°C
See Figure 35
See Figure 35
34°
32°
30°
28°
26°
24°
22°
20°
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
DD
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
Figure 29
Figure 30
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
18
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†
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
CAPACITIVE LOAD
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
37°
35°
33°
31°
29°
27°
25°
200
175
150
125
100
75
V
= 5 mV
DD
V = 10 mV
V
= 5 V
= 20Ω
DD
I
R
S
T
= 25°C
A
T
= 25°C
A
See Figure 35
See Figure 34
50
25
0
0
10 20 30 40 50 60 70 80 90 100
1
10
100
1000
C
– Capacitive Load – pF
L
f – Frequency – Hz
Figure 31
Figure 32
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
PARAMETER MEASUREMENT INFORMATION
single-supply versus split-supply test circuits
Because the TLC27L1 is optimized for single-supply operation, circuit configurations used for the various tests
often present some inconvenience since the input signal, in many cases, must be offset from ground. This
inconvenience can be avoided by testing the device with split supplies and the output load tied to the negative
rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either circuit gives
the same result.
V
DD
V
DD+
–
+
–
+
V
O
V
O
V
I
V
I
C
R
C
R
L
L
L
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 33. Unity-Gain Amplifier
19
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single-supply versus split-supply test circuits (continued)
2 kΩ
2 kΩ
V
DD
V
DD+
20 Ω
–
–
1/2 V
V
O
V
O
DD
+
+
20 Ω
20 Ω
20 Ω
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 34. Noise-Test Circuit
10 kΩ
10 kΩ
V
DD+
V
DD
100 Ω
100 Ω
–
–
+
V
I
V
I
V
O
V
O
+
1/2 V
DD
C
C
L
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 35. Gain-of-100 Inverting Amplifier
input bias current
Due to the high input impedance of the TLC27L1 operational amplifiers, attempts to measure the input bias
current can result in erroneous readings. The bias current at normal room ambient temperature is typically less
than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are offered to avoid
erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 36). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias-current test (using a
picoammeter) with no device in the test socket. The actual input bias current can then be calculated by
subtracting the open-socket leakage readings from the readings obtained with a device in the test socket.
One word of caution: many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current (the voltage
drop across the series resistor is measured and the bias current is calculated). This method requires that a
device be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not
feasible using this method.
20
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PARAMETER MEASUREMENT INFORMATION
8
5
V = V
IC
1
4
Figure 36. Isolation Metal Around Device Inputs (JG and P packages)
low-level output voltage
To obtain low-supply-voltage operation, some compromise is necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well
as the differential input voltage level. When attempting to correlate low-level output readings with those quoted
in the electrical specifications, these two conditions should be observed. When conditions other than these are
to be used, please refer to the Typical Characteristics section of this data sheet.
input offset-voltage temperature coefficient
Erroneous readings often result from attempts to measure the temperature coefficient of input offset voltage.
This parameter is actually a calculation using input offset-voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance which can cause erroneous input
offset-voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
full-power response
Full-power response, the frequency above which the amplifier slew rate limits the output voltage swing, is often
specified two ways: full-linear response and full-peak response. The full-linear response is generally measured
by monitoring the distortion level of the output while increasing the frequency of a sinusoidal input signal until
the maximum frequency is found above which the output contains significant distortion. The full-peak response
is defined as the maximum output frequency, without regard to distortion, above which full peak-to-peak output
swing cannot be maintained.
Since there is no industry-wide accepted value for significant distortion, the full-peak response is specified in
this data sheet and is measured using the circuit in Figure 33. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same
amplitude. Thefrequencyisthenincreaseduntilthemaximumpeak-to-peakoutputcannolongerbemaintained
(Figure 37). A square wave allows a more accurate determination of the point at which the maximum
peak-to-peak output is reached.
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PARAMETER MEASUREMENT INFORMATION
full-power response (continued)
(a) f = 100 Hz
(b) B
OM
> f > 100 Hz
(c) f = B
OM
(d) f > B
OM
Figure 37. Full-Power-Response Output Signal
test time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume,
short-test-time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET
devices, and require longer test times than their bipolar and BiFET counterparts. The problem becomes more
pronounced with reduced supply levels and lower temperatures.
APPLICATION INFORMATION
single-supply operation
V
DD
While the TLC27L1 performs well using dual
power supplies (also called balanced or split
supplies), the design is optimized for
single-supply operation. This includes an input
common-mode voltage range that encompasses
ground as well as an output voltage range that
pulls down to ground. The supply voltage range
extendsdownto3V(C-suffixtypes), thusallowing
operation with supply levels commonly available
for TTL and HCMOS; however, for maximum
dynamic range, 16-V single-supply operation is
recommended.
R4
R1
–
+
V
I
R2
V
O
V
R3
R1 R3
ref
V
V
ref
DD
ref
R3
C
0.01 µF
R4
V )
V
(V
V
O
I
ref
R2
Figure 38. Inverting Amplifier With Voltage
Reference
Many single-supply applications require that a
voltage be applied to one input to establish a
reference level that is above ground. A resistive voltage divider is usually sufficient to establish this reference
level (see Figure 38). The low-input bias-current consumption of the TLC27L1 permits the use of very large
resistive values to implement the voltage divider, thus minimizing power consumption.
TheTLC27L1workswellinconjunctionwithdigitallogic;however, whenpoweringbothlineardevicesanddigital
logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device
supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive
decoupling is often adequate; however, RC decoupling may be necessary in high-frequency applications.
22
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APPLICATION INFORMATION
single-supply operation (continuted)
–
+
Power
Supply
Logic
Logic
Logic
OUT
(a) COMMON SUPPLY RAILS
–
+
Power
Supply
OUT
Logic
Logic
Logic
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Figure 39. Common Versus Separate Supply Rails
input offset voltage nulling
The TLC27L1 offers external input-offset null control. Nulling of the input-offset voltage may be achieved by
adjustinga25-kΩ potentiometerconnectedbetweentheoffsetnullterminalswiththewiperconnectedasshown
in Figure 40. Total nulling may not be possible.
–
+
–
IN–
IN+
IN–
IN+
OUT
OUT
N2
N2
V
DD
+
25 kΩ
25 kΩ
N1
N1
GND
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 40. Input Offset-Voltage Null Circuit
input characteristics
The TLC27L1 is specified with a minimum and a maximum input voltage that, if exceeded at either input, could
cause the device to malfunction. Exceeding this specified range is a common problem, especially in
single-supply operation. Note that the lower range limit includes the negative rail, while the upper range limit
is specified at V
– 1 V at T = 25°C and at V
– 1.5 V at all other temperatures.
DD
A
DD
23
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APPLICATION INFORMATION
input characteristics (continued)
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27L1 very good input
offset-voltage drift characteristics relative to conventional metal-gate processes. Offset-voltage drift in CMOS
devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus dopant
implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate) alleviates the
polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude. The
offset-voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias-current requirements, the TLC27L1 is
well suited for low-level signal processing; however, leakage currents on printed circuit boards and sockets can
easily exceed bias-current requirements and cause a degradation in device performance. It is good practice
to include guard rings around inputs (similar to those of Figure 36 in the Parameter Measurement Information
section). These guards should be driven from a low-impedance source at the same voltage level as the
common-mode input (see Figure 41).
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differentialamplifier. Thelow-inputbias-currentrequirementsoftheTLC27L1resultsinavery-lownoisecurrent,
which is insignificant in most applications. This feature makes the devices especially favorable over bipolar
devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit greater noise
currents.
–
–
–
V
I
V
O
V
O
V
O
+
+
+
V
I
V
I
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
Figure 41. Guard-Ring Schemes
24
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APPLICATION INFORMATION
feedback
–
Operational amplifier circuits almost always
employ feedback, and since feedback is the first
prerequisite for oscillation, a little caution is
appropriate. Most oscillation problems result from
driving capacitive loads and ignoring stray input
capacitance. A small-value capacitor connected
in parallel with the feedback resistor is an effective
remedy (see Figure 42). The value of this
capacitor is optimized empirically.
V
O
+
Figure 42. Compensation for Input
Capacitance
electrostatic discharge protection
The TLC27L1 incorporates an internal ESD protection circuit that prevents functional failures at voltages up to
2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be exercised, however, when handling
these devices as exposure to ESD may result in the degradation of the device parametric performance. The
protection circuit also causes the input bias currents to be temperature dependent and have the characteristics
of a reverse-biased diode.
latch-up
BecauseCMOSdevicesaresusceptibletolatch-upduetotheirinherentparasiticthyristors, theTLC27L1inputs
and output were designed to withstand –100-mA surge currents without sustaining latch-up; however,
techniques should be used to reduce the chance of latch-up whenever possible. Internal protection diodes
should not by design be forward biased. Applied input and output voltage should not exceed the supply voltage
by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators. Supply
transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the supply rails
as close to the device as possible.
The current path established when latch-up occurs is usually between the positive supply rail and ground and
can be triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the
supply voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and
the forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance
of latch-up occurring increases with increasing temperature and supply voltages.
25
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APPLICATION INFORMATION
output characteristics
The output stage of the TLC27L1 is designed to
sink and source relatively high amounts of current
(see Typical Characteristics). If the output is
subjected to a short-circuit condition, this high
current capability can cause device damage
undercertainconditions. Outputcurrentcapability
increases with supply voltage (see Figure 43).
2.5 V
–
+
V
O
T
= 25°C
V
I
A
C
L
f = 1 kHz
V = 1 V
I(PP)
All operating characteristics of the TLC27L1 were
measured using a 20-pF load. The devices drive
higher capacitive loads; however, as output load
capacitance increases, the resulting response
pole occurs at lower frequencies, thereby causing
ringing, peaking, or even oscillation (see Figure
44). In many cases, adding some compensation
in the form of a series resistor in the feedback loop
alleviates the problem.
– 2.5 V
Figure 43. Test Circuit for Output
Characteristics
(a) C = 20 pF, R = NO LOAD
(b) C = 260 pF, R = NO LOAD
(c) C = 310 pF, R = NO LOAD
L L
L
L
L
L
Figure 44. Effect of Capacitive Loads in Low-Bias Mode
Although the TLC27L1 possesses excellent high-level output voltage and current capability, methods are
available for boosting this capability, if needed. The simplest method involves the use of a pullup resistor (R )
P
connected from the output to the positive supply rail (see Figure 45). There are two disadvantages to the use
of this circuit. First, the NMOS pulldown transistor, N4 (see equivalent schematic) must sink a comparatively
large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance between
approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With very low
values of R , a voltage offset from 0 V at the output occurs. Secondly, pullup resistor R acts as a drain load
P
P
to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying the
output current.
26
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APPLICATION INFORMATION
V
DD
R
–
+
V
I
P
I
P
V
–V
DD
I
O
I
R
P
I
F
L
P
V
O
I
P
= Pullup current required
by the operational amplifier
(typically 500 mA)
I
F
I
R2
R1
R
L
L
Figure 45. Resistive Pullup to Increase V
OH
10 kΩ
10 kΩ
0.016 µF
0.016 µF
5 V
10 kΩ
–
V
I
5 V
10 kΩ
–
TLC27L1
+
5 V
10 kΩ
–
TLC27L1
+
TLC27L1
+
Low Pass
High Pass
Band Pass
5 kΩ
R = 5 kΩ(3/d-1)
(see Note A)
NOTE A: d = damping factor, I/O
Figure 46. State-Variable Filter
27
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APPLICATION INFORMATION
V
O
(see Note A)
9 V
C = 0.1 µF
9 V
10 kΩ
10 kΩ
–
9 V
100 kΩ
R2
–
TLC27L1
+
V
O
(see Note B)
TLC27L1
+
1
R1
F
O
4C(R2) R3
R1, 100 kΩ
R3, 47 kΩ
NOTES: A.
B.
V
V
= 8 V
= 4 V
O(PP)
O(PP)
Figure 47. Single-Supply Function Generator
V
DD
+
V
I
TLC27L1
–
V
I
V
DD
90 kΩ
C
S1
S2
X1
B
B
1
2
TLC4066
A
C
1
Select
S
S
2
1
9 kΩ
1 kΩ
X2
A
V
10
100
Analog
Switch
A
2
NOTE A: V
DD
= 5 V to 12 V
Figure 48. Amplifier With Digital-Gain Selection
28
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APPLICATION INFORMATION
5 V
+
500 kΩ
TLC27L1
V
O1
–
5 V
500 kΩ
+
V
O2
TLC27L1
–
0.1 µF
500 kΩ
500 kΩ
Figure 49. Multivibrator
10 kΩ
V
DD
20 kΩ
+
V
I
V
O
TLC27L1
–
100 kΩ
NOTE A: V
DD
= 5 V to 16 V
Figure 50. Full-Wave Rectifier
29
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APPLICATION INFORMATION
10 kΩ
V
DD
100 kΩ
100 kΩ
Set
+
TLC27L1
–
Reset
33 Ω
NOTE A: V
= 5 V to 16 V
DD
Figure 51. Set/Reset Flip-Flop
0.016 µF
5 V
10 kΩ
10 kΩ
+
V
i
V
O
TLC27L1
0.016 µF
–
NOTE A: Normalized to F = 1 kHz and R = 10 kΩ
C
L
Figure 52. Two-Pole Low-Pass Butterworth Filter
30
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MECHANICAL INFORMATION
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PIN SHOWN
PINS **
0.050 (1,27)
8
14
16
DIM
0.020 (0,51)
0.010 (0,25)
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
M
0.014 (0,35)
A MAX
A MIN
14
8
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
7
A
0.010 (0,25)
0°–8°
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.004 (0,10)
0.010 (0,25)
0.004 (0,10)
0.069 (1,75) MAX
4040047/ B10/94
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Four center pins are connected to die mount pad.
E. Falls within JEDEC MS-012
31
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
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