TLC27M4CNS [TI]
LinCMOS⢠PRECISION QUAD OPERATIONAL AMPLIFIERS;
| 型号： | TLC27M4CNS |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | LinCMOS⢠PRECISION QUAD OPERATIONAL AMPLIFIERS 放大器 光电二极管 |
| 文件： | 总47页 (文件大小：1542K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
LinCMOS™ PRECISION QUAD OPERATIONAL AMPLIFIERS
Check for Samples: TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
1
FEATURES
D, J, N, OR PW PACKAGE
(TOP VIEW)
2
•
Trimmed Offset Voltage
–
TLC27M9 . . . 900 µV Max at TA = 25°C,
VDD = 5 V
1OUT
1IN–
1IN+
VDD
4OUT
4IN–
4IN+
GND
3IN+
3IN–
3OUT
1
2
3
4
5
6
7
14
13
12
11
10
9
•
•
Input Offset Voltage Drift . . . Typically
0.1 µV/Month, Including the First 30 Days
Wide Range of Supply Voltages Over Specified
Temperature Range:
2IN+
2IN–
2OUT
–
–
–
0°C to 70°C . . . 3 V to 16 V
–40°C to 85°C . . . 4 V to 16 V
–55°C to 125°C . . . 4 V to 16 V
8
FK PACKAGE
(TOP VIEW)
•
•
Single-Supply Operation
Common-Mode Input Voltage Range
Extends Below the Negative Rail (C-Suffix,
I-Suffix Types)
3
2
1 20 19
18
4IN+
1IN+
4
5
6
7
8
•
•
Low Noise . . . Typically 32 nV/√Hz
at f = 1 kHz
NC
NC
VDD
NC
17
16
15
14
GND
NC
Low Power . . . Typically 2.1 mW at
TA = 25°C, VDD = 5 V
3IN+
2IN+
•
•
•
•
Output Voltage Range Includes Negative Rail
High Input Impedance . . . 1012 Ω Typ
ESD-Protection Circuitry
9 10 11 12 13
Small-Outline Package Option Also Available
in Tape and Reel
NC – No internal connection
•
Designed-In Latch-Up Immunity
DISTRIBUTION OF TLC27M9
INPUT OFFSET VOLTAGE
DESCRIPTION
40
35
30
25
20
15
10
5
The TLC27M4 and TLC27M9 quad operational
amplifiers combine a wide range of input offset
voltage grades with low offset voltage drift, high input
impedance, low noise, and speeds comparable to
that of general-purpose bipolar devices. These
devices use Texas Instruments silicon-gate
LinCMOS™ technology, which provides offset voltage
stability far exceeding the stability available with
conventional metal-gate processes.
301 Units Tested From 2 Wafer Lots
V
T
= 5 V
DD
= 25°C
A
N Package
The extremely high input impedance, low bias
currents, make these cost-effective devices ideal for
applications that have previously been reserved for
general-purpose bipolar products, but with only a
fraction of the power consumption.
0
–1200
–600
0
600
1200
V
– Input Offset Voltage – μV
IO
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
2
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1987–2012, Texas Instruments Incorporated
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
Four offset voltage grades are available (C-suffix and I-suffix types), ranging from the low-cost TLC27M4 (10 mV)
to the high-precision TLC27M9 (900 μV). These advantages, in combination with good common-mode rejection
and supply voltage rejection, make these devices a good choice for new state-of-the-art designs as well as for
upgrading existing designs.
In general, many features associated with bipolar technology are available on LinCMOS™ operational amplifiers,
without the power penalties of bipolar technology. General applications such as transducer interfacing, analog
calculations, amplifier blocks, active filters, and signal buffering are easily designed with the TLC27M4 and
TLC27M9. The devices also exhibit low voltage single-supply operation, and low power consumption, making
them ideally suited for remote and inaccessible battery-powered applications. The common-mode input voltage
range includes the negative rail.
A wide range of packaging options is available, including small-outline and chip-carrier versions for high-density
system applications.
The device inputs and outputs are designed to withstand −100-mA surge currents without sustaining latch-up.
The TLC27M4 and TLC27M9 incorporate internal ESD-protection circuits that prevent functional failures at
voltages up to 2000 V as tested under MIL-STD-883C, Method 3015; however, care should be exercised in
handling these devices, as exposure to ESD may result in the degradation of the device parametric performance.
The C-suffix devices are characterized for operation from 0°C to 70°C. The I-suffix devices are characterized for
operation from –40°C to 85°C. The M-suffix devices are characterized for operation over the full military
temperature range of –55°C to 125°C.
AVAILABLE OPTIONS
PACKAGE
CHIP
FORM
(Y)
VIOmax
AT 25°C
SMALL
OUTLINE
(D)(1)
CHIP
CARRIER
(FK)
CERAMIC
DIP
PLASTIC
DIP
TA
TSSOP
(PW)(1)
(J)
(N)
900 µV
2 mV
TLC27M9CD
TLC27M4BCD
TLC27M4ACD
TLC27M4CD
TLC27M9ID
—
—
TLC27M9CN
TLC27M4BCN
TLC27M4ACN
TLC27M4CN
TLC27M9IN
—
—
—
—
—
—
—
—
0°C to 70°C
5 mV
—
—
10 mV
900 µV
2 mV
—
—
TLC27M4CPW TLC27M4Y
—
—
—
—
—
—
—
—
—
TLC27M4BID
TLC27M4AID
TLC27M4ID
—
—
—
—
TLC27M4BIN
TLC27M4AIN
TLC27M4IN
—
–40°C to 85°C
–55°C to 125°C
5 mV
—
10 mV
900 µV
10 mV
—
—
TLC27M41PW
TLC27M9MD
TLC27M4MD
TLC27M9MFK
TLC27M4MFK
TLC27M9MJ
TLC27M4MJ
TLC27M9MN
TLC27M4MN
—
—
(1) The D and PW package is available taped and reeled. Add R suffix to the device type (e.g., TLC279CDR).
2
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
EQUIVALENT SCHEMATIC (EACH AMPLIFIER)
V
DD
P3
P4
R6
R1
R2
N5
IN–
IN+
P5
P6
P1
P2
C1
R5
OUT
N3
D2
N1
R3
N2
D1
N4
N6
R7
N7
R4
GND
Copyright © 1987–2012, Texas Instruments Incorporated
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3
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
TLC27M4Y chip information
This chip, when properly assembled, displays characteristics similar to the TLC27M4C. Thermal compression or
ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive
epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
V
DD
(4)
(14)
(11)
(8)
(13)
(12)
(10)
(9)
(3)
(2)
+
–
1IN+
1IN–
(1)
1OUT
(5)
(6)
+
2IN+
2IN–
(7)
2OUT
–
(10)
(9)
68
+
–
3IN+
3IN–
(8)
3OUT
(12)
(13)
+
–
4IN+
4IN–
(14)
4OUT
(11)
GND
(2)
(3)
(6)
(1)
(5)
(4)
(7)
108
CHIP THICKNESS: 15 TYPICAL
BONDING PADS: 4 ´ 4 MINIMUM
T max = 150°C
J
TOLERANCES ARE ±10%.
ALL DIMENSIONS ARE IN MILS.
PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
4
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)(1)
VALUE
UNIT
(2)
Supply voltage, VDD
18
V
(3)
Differential input voltage, VID
±VDD
Input voltage range, VI (any input)
Input current, II
–0.3 V to VDD
±5
mA
mA
mA
mA
Output current, lO (each output)
Total current into VDD
±30
45
Total current out of GND
45
Duration of short-circuit current at (or below) 25°C(4)
unlimited
Continuous total dissipation
See Dissipation Rating Table
C suffix
I suffix
M suffix
0 to 70
–40 to 85
–55 to 125
–65 to 150
260
°C
°C
°C
°C
°C
°C
°C
Operating free-air temperature, TA
Storage temperature range
Case temperature for 60 seconds: FK package
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D, N, or PW package
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package
260
300
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential voltages, are with respect to network ground.
(3) Differential voltages are at IN+ with respect to IN –.
(4) The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation
rating is not exceeded (see application section).
DISSIPATION RATINGS
T
A ≤ 25°C
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
PACKAGE
POWER RATING
D
FK
J
950 mW
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
12.6 mW/°C
5.6 mW/°C
608 mW
880 mW
880 mW
1008 mW
448 mW
494 mW
715 mW
715 mW
819 mW
—
—
275 mW
275 mW
—
1375 mW
1375 mW
1575 mW
700 mW
N
PW
—
RECOMMENDED OPERATING CONDITIONS
MIN
3
MAX
MIN
4
MAX
16
MIN
MAX UNIT
Supply voltage, VDD
16
3.5
8.5
70
4
0
16
3.5
8.5
125
V
VDD = 5 V
Common mode input voltage, VIC
VDD = 10 V
–0.2
–0.2
0
–0.2
–0.2
–40
3.5
8.5
85
V
0
Operating free-air temperature, TA
–55
°C
Copyright © 1987–2012, Texas Instruments Incorporated
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5
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27M4C
TLC27M4AC
TLC27M4BC
TLC27M9C
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN TYP MAX
25°C
Full range
25°C
1.1
10
12
5
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
TLC27M4C
TLC27M4AC
TLC274BC
TLC279C
mV
µV
0.9
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
25°C
6.5
VIO
Input offset voltage
250 2000
3000
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
25°C
210
900
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
1500
Average temperature coefficient of input
offset voltage
αVIO
25°C to 70°C
1.7
µV/°C
pA
25°C
70°C
25°C
70°C
0.1
IIO
Input offset current(2)
Input bias current(2)
VO = 2.5 V,
VO = 2.5 V,
VIC = 2.5 V
VIC = 2.5 V
7
0.6
300
600
IIB
pA
V
40
–0.2 –0.3
25°C
to
4
to
4.2
VICR
Common-mode input voltage range(3)
–0.2
to
3.5
Full range
V
V
25°C
0°C
3.2
3
3.9
3.9
4
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
RL = 100 kΩ
70°C
25°C
0°C
3
0
50
50
50
VOL
IOL = 0
0
mV
V/mV
dB
70°C
25°C
0°C
0
25
15
15
65
60
60
70
60
60
170
200
140
91
91
92
93
92
94
Large-signal differential voltage
amplification
AVD
VO = 0.25 V to 2 V, RL = 100 kΩ
70°C
25°C
0°C
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
VIC = VICRmin
70°C
25°C
0°C
VDD = 5 V to 10 V, VO = 1.4 V
dB
(ΔVDD/ΔVIO
)
70°C
25°C
0°C
420 1120
500 1280
VO = 2.5 V,
VIC = 2.5 V,
No load
Supply current (four amplifiers)
µA
70°C
340
880
(1) Full range is 0°C to 70°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
6
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27M4C
TLC27M4AC
TLC27M4BC
TLC27M9C
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
mV
MIN TYP MAX
25°C
Full range
25°C
1.1
10
12
5
VO = 1.4 V,
VIC = 0,
TLC27M4C
TLC27M4AC
TLC274BC
TLC279C
RS = 50 Ω,
RL = 100 kΩ
0.9
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
25°C
6.5
VIO
Input offset voltage
260 2000
3000
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
25°C
µV
220 1200
1900
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
Average temperature coefficient of input
offset voltage
αVIO
25°C to 70°C
2.1
0.1
µV/°C
pA
25°C
70°C
25°C
70°C
IIO
Input offset current(2)
Input bias current(2)
VO = 5 V,
VO = 5 V,
VIC = 5 V
VIC = 5 V
7
0.7
300
600
IIB
pA
V
50
–0.2 –0.3
25°C
to
9
to
9.2
VICR
Common-mode input voltage range(3)
–0.2
to
8.5
Full range
V
V
25°C
0°C
8
7.8
7.8
8.7
8.7
8.7
0
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
VO = 1 V to 6 V,
VIC = VICRmin
RL = 100 kΩ
70°C
25°C
0°C
50
50
50
VOL
IOL = 0
0
mV
V/mV
dB
70°C
25°C
0°C
0
25
15
15
65
60
60
70
60
60
275
320
230
94
94
94
93
92
94
Large-signal differential voltage
amplification
AVD
RL = 100 kΩ
70°C
25°C
0°C
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
70°C
25°C
0°C
VDD = 5 V to 10 V, VO = 1.4 V
dB
(ΔVDD/ΔVIO
)
70°C
25°C
0°C
570 1200
690 1600
440 1120
VO = 5 V,
VIC = 5 V,
No load
Supply current (four amplifiers)
µA
70°C
(1) Full range is 0°C to 70°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
Copyright © 1987–2012, Texas Instruments Incorporated
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Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN TYP MAX
25°C
Full range
25°C
1.1
10
13
5
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
mV
µV
0.9
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
25°C
6.5
VIO
Input offset voltage
250 2000
3000
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
25°C
210
900
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
Full range
2000
Average temperature coefficient of input
offset voltage
αVIO
25°C to 85°C
1.7
0.1
µV/°C
pA
25°C
85°C
25°C
85°C
IIO
Input offset current(2)
Input bias current(2)
VO = 2.5 V,
VO = 2.5 V,
VIC = 2.5 V
VIC = 2.5 V
24 1000
0.6
IIB
pA
V
200 2000
–0.2 –0.3
25°C
to
4
to
4.2
VICR
Common-mode input voltage range(3)
–0.2
to
3.5
Full range
V
V
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
3.2
3
3.9
3.9
4
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
RL = 100 kΩ
3
0
50
50
50
VOL
IOL = 0
0
mV
V/mV
dB
0
25
15
15
65
60
60
70
60
60
170
270
130
91
90
90
93
91
94
Large-signal differential voltage
amplification
AVD
VO = 0.25 V to 2 V, RL = 100 kΩ
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
VIC = VICRmin
VDD = 5 V to 10 V, VO = 1.4 V
dB
(ΔVDD/ΔVIO
)
420 1120
630 1600
VO = 2.5 V,
VIC = 2.5 V,
No load
Supply current (four amplifiers)
µA
320
800
(1) Full range is –40°C to 85°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
8
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
mV
MIN TYP MAX
25°C
Full range
25°C
1.1
10
13
5
VO = 1.4 V,
VIC = 0,
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
RS = 50 Ω,
RL = 100 kΩ
0.9
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
25°C
7
VIO
Input offset voltage
260 2000
3500
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
25°C
µV
220 1200
2900
VO = 1.4 V,
VIC = 0,
RS = 50 Ω,
RL = 100 kΩ
Full range
Average temperature coefficient of input
offset voltage
αVIO
25°C to 85°C
2.1
µV/°C
pA
25°C
85°C
25°C
85°C
0.1
IIO
Input offset current(2)
Input bias current(2)
VO = 5 V,
VO = 5 V,
VIC = 5 V
VIC = 5 V
26 1000
0.7
IIB
pA
V
220 2000
–0.2 –0.3
25°C
to
9
to
9.2
VICR
Common-mode input voltage range(3)
–0.2
to
8.5
Full range
V
V
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
8
7.8
7.8
8.7
8.7
8.7
0
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
VO = 1 V to 6 V,
VIC = VICRmin
RL = 100 kΩ
50
50
50
VOL
IOL = 0
0
mV
V/mV
dB
0
25
15
15
65
60
60
70
60
60
275
390
220
94
93
94
93
91
94
Large-signal differential voltage
amplification
AVD
RL = 100 kΩ
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
dB
(ΔVDD/ΔVIO
)
570 1200
900 1800
410 1040
VO = 5 V,
VIC = 5 V,
No load
Supply current (four amplifiers)
µA
(1) Full range is –40°C to 85°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
Copyright © 1987–2012, Texas Instruments Incorporated
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TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 5 V (unless otherwise noted)
TLC27M4M
TLC27M9M
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN TYP MAX
25°C
Full range
25°C
1.1
10
12
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
TLC27M4M
TLC27M9M
mV
VIO
Input offset voltage
210
900
3750
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
µV
Full range
Average temperature coefficient of input
offset voltage
αVIO
25°C to 125°C
1.7
µV/°C
25°C
125°C
25°C
85°C
0.1
1.4
0.6
9
pA
nA
pA
nA
IIO
Input offset current(2)
Input bias current(2)
VO = 2.5 V,
VO = 2.5 V,
VIC = 2.5 V
VIC = 2.5 V
15
35
IIB
0
to
4
–0.3
to
4.2
25°C
V
V
VICR
Common-mode input voltage range(3)
0
to
Full range
3.5
25°C
–55°C
125°C
25°C
3.2
3
3.9
3.9
4
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
RL = 100 kΩ
V
mV
V/mV
dB
3
0
50
50
50
VOL
IOL = 0
–55°C
125°C
25°C
0
0
25
15
15
65
60
60
70
60
60
170
270
120
91
89
91
93
91
94
Large-signal differential voltage
amplification
AVD
VO = 0.25 V to 2 V, RL = 100 kΩ
–55°C
125°C
25°C
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
VIC = VICRmin
–55°C
125°C
25°C
VDD = 5 V to 10 V, VO = 1.4 V
–55°C
125°C
25°C
dB
(ΔVDD/ΔVIO
)
420 1120
680 1760
VO = 2.5 V,
VIC = 2.5 V,
No load
Supply current (four amplifiers)
–55°C
125°C
µA
280
720
(1) Full range is –55°C to 125°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
10
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TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
ELECTRICAL CHARACTERISTICS
at specified free-air temperature, VDD = 10 V (unless otherwise noted)
TLC27M4M
TLC27M9M
(1)
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN TYP MAX
25°C
Full range
25°C
1.1
10
12
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
TLC27M4M
TLC27M9M
mV
VIO
Input offset voltage
220 1200
4300
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
µV
Full range
Average temperature coefficient of input
offset voltage
αVIO
25°C to 125°C
2.1
0.1
µV/°C
25°C
125°C
25°C
pA
nA
pA
nA
IIO
Input offset current(2)
Input bias current(2)
VO = 5 V,
VO = 5 V,
VIC = 5 V
VIC = 5 V
1.8
0.7
10
15
35
IIB
125°C
0
to
9
–0.3
to
9.2
25°C
V
V
VICR
Common-mode input voltage range(3)
–0.2
to
Full range
8.5
25°C
–55°C
125°C
25°C
8
7.8
7.8
8.7
8.6
8.8
0
VOH
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
VO = 1 V to 6 V,
VIC = VICRmin
RL = 100 kΩ
V
mV
V/mV
dB
50
50
50
VOL
IOL = 0
–55°C
125°C
25°C
0
0
25
15
15
65
60
60
70
60
60
275
420
190
94
93
93
93
91
94
Large-signal differential voltage
amplification
AVD
RL = 100 kΩ
–55°C
125°C
25°C
CMRR
kSVR
IDD
Common-mode rejection ratio
Supply-voltage rejection ratio
–55°C
125°C
25°C
VDD = 5 V to 10 V, VO = 1.4 V
–55°C
125°C
25°C
dB
(ΔVDD/ΔVIO
)
570 1200
980 2000
VO = 5 V,
VIC = 5 V,
No load
Supply current (four amplifiers)
–55°C
125°C
µA
360
960
(1) Full range is –55°C to 70°C.
(2) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(3) This range also applies to each input individually.
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
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ELECTRICAL CHARACTERISTICS
VDD = 5 V, TA = 25°C (unless otherwise noted)
TLC27M4Y
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
VIO
Input offset voltage
1.1
1.7
10
mV
Temperature coefficient of input offset
voltage
αVIO
TA = 25°C to 70°C
µV/°C
IIO
IIB
Input offset current(1)
Input bias current(1)
VO = 2.5 V,
VO = 2.5 V,
VIC = 2.5 V
VIC = 2.5 V
0.1
0.6
pA
pA
–0.2
to
–0.3
to
VICR
Common-mode input voltage range(2)
V
4
4.2
VOH
VOL
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
RL = 100 kΩ
3.2
3.9
0
V
IOL = 0
50
mV
Large-signal differential voltage
amplification
AVD
VO = 0.25 V to 2 V, RL= 100 kΩ
VIC = VICRmin
25
65
70
170
91
V/mV
dB
CMRR
kSVR
Common-mode rejection ratio
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
93
dB
(ΔVDD/ΔVIO
)
VO = 2.5 V,
No load
VIC = 2.5 V,
IDD
Supply current (four amplifiers)
420
1120
µA
(1) The typical values of input bias current and input offset current below 5 pA were determined mathematically
(2) This range also applies to each input individually.
ELECTRICAL CHARACTERISTICS
VDD = 10 V, TA = 25°C (unless otherwise noted)
TLC27M4Y
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
VO = 1.4 V,
RS = 50 Ω,
VIC = 0,
RL = 100 kΩ
VIO
Input offset voltage
1.1
1.7
10
mV
Temperature coefficient of input offset
voltage
αVIO
TA = 25°C to 70°C
µV/°C
IIO
IIB
Input offset current(1)
Input bias current(1)
VO = 5 V,
VO = 5 V,
VIC = 5 V
VIC = 5 V
0.1
0.6
pA
pA
–0.2
to
–0.3
to
VICR
Common-mode input voltage range(2)
V
9
9.2
VOH
VOL
High-level output voltage
Low-level output voltage
VID = 100 mV,
VID = –100 mV,
RL = 100 kΩ
8
8.7
0
V
IOL = 0
50
mV
Large-signal differential voltage
amplification
AVD
VO = 1 V to 6 V,
VIC = VICRmin
RL= 100 kΩ
25
65
70
275
94
V/mV
dB
CMRR
kSVR
Common-mode rejection ratio
Supply-voltage rejection ratio
VDD = 5 V to 10 V, VO = 1.4 V
93
dB
(ΔVDD/ΔVIO
)
VO = 5 V,
No load
VIC = 5 V,
IDD
Supply current (four amplifiers)
570
1200
µA
(1) The typical values of input bias current and input offset current below 5 pA were determined mathematically.
(2) This range also applies to each input individually.
12
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TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 5 V
TLC27M4C
TLC27M4AC
TLC27M4BC
TLC27M9C
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
0.43
0.46
0.36
0.40
0.43
0.34
MAX
25°C
0°C
VIPP = 1 V
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
VIPP = 2.5 V
70°C
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
0°C
55
60
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
70°C
25°C
0°C
50
525
610
400
40°
41°
39°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
CL = 20 pF
kHz
70°C
25°C
0°C
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
70°C
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 10 V
TLC27M4C
TLC27M4AC
TLC27M4BC
TLC27M9C
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
0.62
0.67
0.51
0.56
0.61
0.46
MAX
25°C
0°C
VIPP = 1 V
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
70°C
25°C
0°C
SR
Slew rate at unity gain
V/µs
VIPP = 5.5 V
70°C
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
0°C
35
40
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
70°C
25°C
0°C
30
635
710
510
43°
44°
42°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
CL = 20 pF
kHz
70°C
25°C
0°C
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
70°C
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 5 V
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
0.43
0.51
0.35
0.40
0.48
0.32
MAX
25°C
–40°C
85°C
VIPP = 1 V
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
SR
Slew rate at unity gain
V/µs
25°C
VIPP = 2.5 V
–40°C
85°C
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
55
75
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
45
525
770
370
40°
43°
38°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
CL = 20 pF
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 10 V
TLC27M4I
TLC27M4AI
TLC27M4BI
TLC27M9I
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
0.62
0.77
0.47
0.56
0.70
0.44
MAX
25°C
–40°C
85°C
VIPP = 1 V
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
SR
Slew rate at unity gain
V/µs
25°C
VIPP = 5.5 V
–40°C
85°C
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
–40°C
85°C
25°C
–40°C
85°C
25°C
–40°C
85°C
35
45
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
25
635
880
480
43°
46°
41°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
CL = 20 pF
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
14
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www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 5 V
TLC27M4M
TLC27M9M
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
MAX
25°C
–55°C
125°C
25°C
0.43
VIPP = 1 V
0.54
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
0.29
SR
Slew rate at unity gain
V/µs
0.40
VIPP = 2.5 V
–55°C
125°C
0.50
0.28
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
–55°C
125°C
25°C
56
80
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
40
525
850
330
40°
44°
36°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
CL = 20 pF
–55°C
125°C
25°C
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
–55°C
125°C
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 10 V
TLC27M4M
TLC27M9M
PARAMETER
TEST CONDITIONS
TA
UNIT
MIN
TYP
0.62
0.81
0.38
0.56
0.73
0.35
MAX
25°C
–55°C
125°C
25°C
VIPP = 1 V
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
SR
Slew rate at unity gain
V/µs
VIPP = 5.5 V
–55°C
125°C
f = 1 kHz,
See Figure 2
RS = 20 Ω
Vn
Equivalent input noise voltage
25°C
32
nV/√Hz
25°C
–55°C
125°C
25°C
35
50
Maximum output-swing
bandwidth
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
kHz
20
CL = 20 pF
635
960
440
43°
47°
39°
VI = 10 mV,
See Figure 3
B1
Unity-gain bandwidth
Phase margin
–55°C
125°C
25°C
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
–55°C
125°C
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 5 V, TA = 25°C
TLC27M4Y
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
VIPP = 1 V
VIPP = 2.5 V
RS = 20 Ω
0.43
SR
Slew rate at unity gain
V/µs
0.40
32
f = 1 kHz,
See Figure 2
Vn
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
nV/√Hz
kHz
VO = VOH
,
CL = 20 pF,
See Figure 1
BOM
B1
55
525
40°
RL = 100 kΩ,
VI = 10 mV,
See Figure 3
CL = 20 pF
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
Phase margin
OPERATING CHARACTERISTICS
at specified free-air temperature, VDD = 10 V, TA = 25°C
TLC27M4Y
TYP
PARAMETER
TEST CONDITIONS
UNIT
MIN
MAX
RL = 100 kΩ,
CL = 20 pF,
See Figure 1
VIPP = 1 V
VIPP = 5.5 V
RS = 20 Ω
0.62
SR
Slew rate at unity gain
V/µs
0.56
32
f = 1 kHz,
See Figure 2
Vn
Equivalent input noise voltage
Maximum output-swing bandwidth
Unity-gain bandwidth
nV/√Hz
kHz
VO = VOH
RL = 100 kΩ,
,
CL = 20 pF,
See Figure 1
BOM
B1
35
635
43°
VI = 10 mV,
See Figure 3
CL = 20 pF
kHz
VI = 10 mV,
CL = 20 pF,
f = B1,
See Figure 3
φm
Phase margin
16
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www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
PARAMETER MEASUREMENT INFORMATION
Single-Supply versus Split-Supply Test Circuits
Because the TLC27M4 and TLC27M9 are optimized for single-supply operation, circuit configurations used for
the various tests often present some inconvenience since the input signal, in many cases, must be offset from
ground. This inconvenience can be avoided by testing the device with split supplies and the output load tied to
the negative rail. A comparison of single-supply versus split-supply test circuits is shown below. The use of either
circuit gives the same result.
V
V
DD+
DD
–
–
V
V
O
O
+
+
V
V
I
I
C
R
C
L
R
L
L
L
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 1. Unity-Gain Amplifier
2 kΩ
2 kΩ
V
–
V
+
DD
DD+
20 Ω
20 Ω
–
V
O
1/2 V
V
DD
O
+
20 Ω
20 Ω
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 2. Noise-Test Circuit
10 kΩ
10 kΩ
V
DD+
100 Ω
V
–
+
DD
V
I
100 Ω
–
+
V
V
I
O
V
L
O
1/2 V
C
L
DD
C
V
DD–
(a) SINGLE SUPPLY
(b) SPLIT SUPPLY
Figure 3. Gain-of-100 Inverting Amplifier
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
PARAMETER MEASUREMENT INFORMATION (continued)
Input Bias Current
Because of the high input impedance of the TLC27M4 and TLC27M9 operational amplifiers, attempts to measure
the input bias current can result in erroneous readings. The bias current at normal room ambient temperature is
typically less than 1 pA, a value that is easily exceeded by leakages on the test socket. Two suggestions are
offered to avoid erroneous measurements:
1. Isolate the device from other potential leakage sources. Use a grounded shield around and between the
device inputs (see Figure 4). Leakages that would otherwise flow to the inputs are shunted away.
2. Compensate for the leakage of the test socket by actually performing an input bias current test (using a
picoammeter) with no device in the test socket. The actual input bias current can then be calculated by
subtracting the open-socket leakage readings from the readings obtained with a device in the test socket.
One word of caution—many automatic testers as well as some bench-top operational amplifier testers use the
servo-loop technique with a resistor in series with the device input to measure the input bias current; the voltage
drop across the series resistor is measured and the bias current is calculated. This method requires that a device
be inserted into the test socket to obtain a correct reading; therefore, an open-socket reading is not feasible
using this method.
7
1
V = V
IC
8
14
Figure 4. Isolation Metal Around Device Inputs
(J and N packages)
Low-Level Output Voltage
To obtain low-supply-voltage operation, some compromise was necessary in the input stage. This compromise
results in the device low-level output being dependent on both the common-mode input voltage level as well as
the differential input voltage level. When attempting to correlate low-level output readings with those quoted in
the electrical specifications, these two conditions should be observed. If conditions other than these are to be
used, please refer to Figure 14 through Figure 19 in the Typical Characteristics of this data sheet.
Input Offset Voltage Temperature Coefficient
Erroneous readings often result from attempts to measure temperature coefficient of input offset voltage. This
parameter is actually a calculation using input offset voltage measurements obtained at two different
temperatures. When one (or both) of the temperatures is below freezing, moisture can collect on both the device
and the test socket. This moisture results in leakage and contact resistance, which can cause erroneous input
offset voltage readings. The isolation techniques previously mentioned have no effect on the leakage since the
moisture also covers the isolation metal itself, thereby rendering it useless. It is suggested that these
measurements be performed at temperatures above freezing to minimize error.
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
PARAMETER MEASUREMENT INFORMATION (continued)
Full-Power Response
Full-power response, the frequency above which the operational amplifier slew rate limits the output voltage
swing, is often specified two ways: full-linear response and full-peak response. The full-linear response is
generally measured by monitoring the distortion level of the output, while increasing the frequency of a sinusoidal
input signal until the maximum frequency is found above which the output contains significant distortion. The full-
peak response is defined as the maximum output frequency, without regard to distortion, above which full peak-
to-peak output swing cannot be maintained.
Because there is no industry-wide accepted value for significant distortion, the full-peak response is specified in
this data sheet and is measured using the circuit of Figure 1. The initial setup involves the use of a sinusoidal
input to determine the maximum peak-to-peak output of the device (the amplitude of the sinusoidal wave is
increased until clipping occurs). The sinusoidal wave is then replaced with a square wave of the same amplitude.
The frequency is then increased until the maximum peak-to-peak output can no longer be maintained (Figure 5).
A square wave is used to allow a more accurate determination of the point at which the maximum peak-to-peak
output is reached.
(a) f = 1 kHz
(b) 1 kHz < f < B
(c) f = B
(d) f > B
OM
OM
OM
Figure 5. Full-Power-Response Output Signal
Test Time
Inadequate test time is a frequent problem, especially when testing CMOS devices in a high-volume, short-test-
time environment. Internal capacitances are inherently higher in CMOS than in bipolar and BiFET devices and
require longer test times than their bipolar and BiFET counterparts. The problem becomes more pronounced with
reduced supply levels and lower temperatures.
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TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
VIO
Input offset voltage
Distribution
Distribution
6, 7
8, 9
αVIO
Temperature coefficient of input offset voltage
vs High-level output current
vs Supply voltage
vs Free-air temperature
10, 11
12
13
VOH
VOL
AVD
High-level output voltage
vs Common-mode input voltage
vs Differential input voltage
vs Free-air temperature
14, 15
16
17
Low-level output voltage
vs Low-level output current
18, 19
vs Supply voltage
vs Free-air temperature Free
vs Frequency
20
21
32, 33
Differential voltage amplification
IIB
Input bias current
vs Free-air temperature
vs Free-air temperature
vs Supply voltage
22
22
23
IIO
VIC
Input offset current
Common-mode input voltage
vs Supply voltage
vs Free-air temperature
24
25
IDD
SR
Supply current
Slew rate
vs Supply voltage
vs Free-air temperature
26
27
Normalized slew rate
vs Free-air temperature
vs Frequency
28
29
VO(PP)
B1
Maximum peak-to-peak output voltage
vs Free-air temperature Free
vs Supply voltage
30
31
Unity gain bandwidth
Phase shift
vs Frequency
32, 33
vs Supply voltage
vs Free-air temperature Free
vs Load capacitance
34
35
36
φm
Phase margin
Vn
Equivalent input noise voltage
vs Frequency
37
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
TYPICAL CHARACTERISTICS
DISTRIBUTION OF TLC27M4
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27M4
INPUT OFFSET VOLTAGE
60
50
40
30
20
60
50
40
30
20
612 Amplifiers Tested From 4 Wafer Lots
V
612 Amplifiers Tested From 6 Wafer Lots
V
= 5 V
= 25°C
= 10 V
DD
DD
T = 25°C
A
T
A
N Package
N Package
10
0
10
0
–5 –4 –3 –2 –1
V
0
1
2
3
– Input Offset Voltage – mV
4
5
–5 –4 –3 –2 –1
0
1
2
3
4
5
IO
V
– Input Offset Voltage – mV
IO
Figure 6.
Figure 7.
DISTRIBUTION OF TLC27M4 AND TLC27M9
INPUT OFFSET VOLTAGE
DISTRIBUTION OF TLC27M4 AND TLC27M9
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
TEMPERATURE COEFFICIENT
60
50
40
30
20
10
0
60
50
40
30
20
10
0
224 Amplifiers Tested From 6 Wafer Lots
224 Amplifiers Tested From 6 Wafer Lots
V
T
= 10 V
V
T
= 5 V
DD
DD
= 25°C to 125°C
= 25°C to 125°C
A
A
N Package
Outliers:
N Package
Outliers:
(1) 34.6 μV/°C
(1) 33.0 μV/C
–10 –8 –6 –4 –2
α
0
2
– Temperature Coefficient – μV/°C
4
6
8
10
–10 –8 –6 –4 –2
α
0
2
4
6
8
10
– Temperature Coefficient – μV/°C
VIO
VIO
Figure 8.
Figure 9.
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(1)
TYPICAL CHARACTERISTICS
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT CURRENT
5
4
3
2
1
0
16
14
12
10
8
V
T
= 100 mV
ID
V
= 100 mV
ID
= 25°C
A
T
A
= 25°C
V
= 16 V
DD
V
= 5 V
DD
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
6
4
2
0
0
–2
–4
–6
– High-Level Output Current – mA
–8
–10
0
–5
I
–10 –15 –20 –25 –30 –35 –40
– High-Level Output Current – mA
I
OH
OH
Figure 10.
Figure 11.
HIGH-LEVEL OUTPUT VOLTAGE
HIGH-LEVEL OUTPUT VOLTAGE
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
V
V
V
V
–1.6
–1.7
–1.8
–1.9
–2
16
14
12
10
8
DD
DD
DD
I
= –5 mA
OH
V
= 100 mV
= 100 kΩ
= 25°C
ID
V
= 100 mA
ID
R
L
V
= 5 V
DD
T
A
DD
V
DD
V
= 10 V
DD
V
V
V
V
–2.1
–2.2
–2.3
–2.4
6
DD
DD
DD
DD
4
2
0
–75 –50 –25
T
0
25
50
– Free-Air Temperature – °C
75
100 125
0
2
4
6
8
10
– Supply Voltage – V
12
14
16
V
A
DD
Figure 12.
Figure 13.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
(1)
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
COMMON-MODE INPUT VOLTAGE
COMMON-MODE INPUT VOLTAGE
700
500
450
400
350
300
250
V
= 5 V
DD
V
= 10 V
DD
650
600
I
= 5 mA
OL
I
= 5 mA
OL
T
A
= 25°C
T
A
= 25°C
550
500
450
V
= –100 mV
ID
V
V
V
= –100 mV
= –1 V
ID
ID
ID
= –2.5 V
400
350
300
V
= –1 V
ID
0
1
2
4
6
8
1 0
3
5
7
9
0
0.5
V
1
1.5
2
2.5
3
– Common-Mode Input Voltage – V
3.5
4
V
– Common-Mode Input Voltage – V
IC
IC
Figure 14.
Figure 15.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
FREE-AIR TEMPERATURE
800
700
600
500
400
300
200
100
0
900
800
700
600
500
400
300
200
100
0
I
= 5 mA
I
= 5 mA
= –1 V
ID
OL
OL
V
= |V /2|
ID
V
V
IC
= 0.5 V
IC
T
A
= 25°C
V
= 5 V
DD
V
= 5 V
DD
V
= 10 V
DD
V
= 10 V
DD
–3
–5
–7
–9
–10
0
–1 –2
V
–4
–6
– Differential Input Voltage – V
–8
–75 –50 –25
T
0
25
50
– Free-Air Temperature – °C
75
100 125
ID
A
Figure 16.
Figure 17.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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(1)
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT CURRENT
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
3
2.5
2
V
V
T
= –1 V
= 0.5 V
ID
IC
V
V
T
= –1 V
= 0.5 V
ID
IC
= 25°C
A
= 25°C
A
V
= 16 V
DD
V
= 5 V
DD
V
= 4 V
DD
V
= 10 V
DD
V
= 3 V
DD
1.5
1
0.5
0
0
1
2
– Low-Level Output Current – mA
3
4
5
6
7
8
0
5
10
15
20
25
30
I
I
– Low-Level Output Current – mA
OL
OL
Figure 18.
Figure 19.
LARGE-SIGNAL
LARGE-SIGNAL
DIFFERENTIAL VOLTAGE AMPLIFICATION
DIFFERENTIAL VOLTAGE AMPLIFICATION
vs
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
500
450
400
350
300
250
200
150
100
50
500
450
400
350
300
250
200
150
100
50
T
A
= –55°C
R
= 100 kΩ
R
= 100 kΩ
L
L
–40°C
0°C
25°C
70°C
V
= 10 V
DD
85°C
T
A
= 125°C
V
= 5 V
DD
0
0
2
4
6
8
10
12
14
0
16
–75 –50 –25
0
25
50
75
100 125
V
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
DD
Figure 20.
Figure 21.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
(1)
TYPICAL CHARACTERISTICS
COMMON-MODE
INPUT VOLTAGE POSITIVE LIMIT
vs
INPUT BIAS CURRENT AND INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
10000
1000
100
10
16
14
12
10
8
V
V
= 10 V
DD
T
A
= 25°C
= 5 V
IC
See Note A
I
IB
I
IO
6
4
1
2
0
0.1
25
0
2
4
6
8
10
12
14
16
45
T
A
65
85
– Free-Air Temperature – °C
105
125
V
– Supply Voltage – V
DD
NOTE A: The typical values of input bias current and input offset
current below 5 pA were determined mathematically.
Figure 22.
Figure 23.
SUPPLY CURRENT
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
vs
SUPPLY VOLTAGE
1600
1000
900
800
700
600
500
400
300
200
100
0
V
= V /2
DD
V = V /2
O DD
O
T
A
= –55°C
No Load
No Load
1400
1200
1000
800
600
400
200
0
–40°C
V
= 10 V
DD
0°C
25°C
70°C
V
= 5 V
DD
T
A
= 125°C
0
2
4
6
– Supply Voltage – V
8
10
12
14
16
–75 –50 –25
T
0
– Free-Air Temperature – °C
25
50
75
100 125
V
DD
A
Figure 24.
Figure 25.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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(1)
TYPICAL CHARACTERISTICS
SLEW RATE
vs
SLEW RATE
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.9
0.8
0.7
0.6
0.5
0.4
0.3
A
= 1
V
A
V
= 1
V
R
C
= 1 V
IPP
R
C
= 100 kΩ
L
= 100 kΩ
= 20 pF
= 25°C
V
V
= 10 V
= 5.5 V
L
L
DD
= 20 pF
L
IPP
See Figure 1
T
A
See Figure 1
V
V
= 10 V
= 1 V
DD
IPP
V
V
= 5 V
= 1 V
DD
IPP
V
V
= 5 V
= 2.5 V
DD
IPP
0
2
4
6
– Supply Voltage – V
8
10
12
14
16
–75 –50 –25
T
0
– Free-Air Temperature – °C
25
50
75
100 125
V
DD
A
Figure 26.
Figure 27.
NORMALIZED SLEW RATE
vs
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
FREQUENCY
1.4
1.3
1.2
1.1
1
10
9
8
7
6
5
4
3
2
1
0
A
= 1
V
V
R
C
= 1 V
IPP
V
= 10 V
DD
= 100 kΩ
V
= 10 V
L
L
DD
= 20 pF
T
= 125°C
= 25°C
A
T
A
V
= 5 V
DD
T
A
= –55°C
V
= 5 V
DD
0.9
0.8
0.7
0.6
R
= 100 kΩ
L
See Figure 1
–75 –50 –25
0
25
50
75
100 125
1
10
100
1000
T
A
– Free-Air Temperature – °C
f – Frequency – kHz
Figure 28.
Figure 29.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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(1)
TYPICAL CHARACTERISTICS
UNITY-GAIN BANDWIDTH
vs
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
SUPPLY VOLTAGE
800
750
700
650
600
550
500
450
400
900
800
700
600
500
400
300
V = 10 mV
I
V
= 5 V
DD
C
= 20 pF
L
V = 10 mV
I
T
A
= 25°C
C
= 20 pF
L
See Figure 3
See Figure 3
0
2
4
6
8
10
12
14
16
–75 –50 –25
0
25
50
75
100 125
V
– Supply Voltage – V
T
A
– Free-Air Temperature – °C
DD
Figure 30.
Figure 31.
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
10
10
10
10
V
= 5 V
DD
R
= 100 kΩ
= 25°C
L
T
A
0°
A
VD
30°
60°
90°
Phase Shift
120°
150°
180°
1
0.1
10
100
1 k
10 k
f – Frequency – Hz
100 k
1 M
1
Figure 32.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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(1)
TYPICAL CHARACTERISTICS
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
7
6
5
4
3
2
1
10
10
10
V
= 10 V
= 100 kΩ
= 25°C
DD
R
L
T
A
0°
A
VD
10
30°
60°
90°
10
10
10
Phase Shift
120°
150°
180°
1
0.1
1
10
100
1 k
10 k
f – Frequency – Hz
100 k
1 M
Figure 33.
PHASE MARGIN
vs
PHASE MARGIN
vs
SUPPLY VOLTAGE
FREE-AIR TEMPERATURE
45°
43°
41°
39°
37°
50°
48°
46°
44°
42°
40°
38°
V
= 5 V
V = 10 mV
I
DD
V = 10 mV
I
C
T
= 20 pF
L
T
A
= 25°C
= 25°C
A
See Figure 3
See Figure 3
35°
0
2
4
6
– Supply Voltage – V
8
10
12
14
16
– 75 –50 –25
0
25
50
75
100 125
V
T
– Free-Air Temperature – °C
DD
A
Figure 34.
Figure 35.
(1) Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
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SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
TYPICAL CHARACTERISTICS
PHASE MARGIN
vs
CAPACITIVE LOAD
44°
42°
40°
38°
36°
34°
32°
30°
28°
V
= 5 V
DD
V = 10 mV
I
T
= 25°C
A
See Figure 3
0
10 20 30 40 50 60 70 80 90 100
C
– Capacitive Load – pF
L
Figure 36.
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
300
V
= 5 V
= 20 Ω
= 25°C
DD
R
S
T
A
250
200
150
100
50
See Figure 2
0
1
10
100
1000
f – Frequency – Hz
Figure 37.
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APPLICATION INFORMATION
Single-Supply Operation
While the TLC27M4 and TLC27M9 perform well using dual power supplies (also called balanced or split
supplies), the design is optimized for single-supply operation. This design includes an input common-mode
voltage range that encompasses ground as well as an output voltage range that pulls down to ground. The
supply voltage range extends down to 3 V (C-suffix types), thus allowing operation with supply levels commonly
available for TTL and HCMOS; however, for maximum dynamic range, 16-V single-supply operation is
recommended.
Many single-supply applications require that a voltage be applied to one input to establish a reference level that
is above ground. A resistive voltage divider is usually sufficient to establish this reference level (see Figure 38).
The low input bias current of the TLC27M4 and TLC27M9 permits the use of very large resistive values to
implement the voltage divider, thus minimizing power consumption.
The TLC27M4 and TLC27M9 work well in conjunction with digital logic; however, when powering both linear
devices and digital logic from the same power supply, the following precautions are recommended:
1. Power the linear devices from separate bypassed supply lines (see Figure 39); otherwise, the linear device
supply rails can fluctuate due to voltage drops caused by high switching currents in the digital logic.
2. Use proper bypass techniques to reduce the probability of noise-induced errors. Single capacitive decoupling
is often adequate; however, high-frequency applications may require RC decoupling.
V
DD
R4
R1
R3
V
= V
REF
DD
R2
R3
R1 + R3
–
V
I
R4
V
+ V
O
+
V
= (V
– V )
REF I
REF
O
R2
V
REF
C
0.01 μF
Figure 38. Inverting Amplifier With Voltage Reference
–
Power
Supply
Output
Logic
Logic
Logic
+
(a) COMMON SUPPLY RAILS
–
+
Power
Supply
Output
Logic
Logic
Logic
(b) SEPARATE BYPASSED SUPPLY RAILS (preferred)
Figure 39. Common Versus Separate Supply Rails
30
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
Input Characteristics
The TLC27M4 and TLC27M9 are specified with a minimum and a maximum input voltage that, if exceeded at
either input, could cause the device to malfunction. Exceeding this specified range is a common problem,
especially in single-supply operation. Note that the lower range limit includes the negative rail, while the upper
range limit is specified at VDD – 1 V at TA = 25°C and at VDD – 1.5 V at all other temperatures.
The use of the polysilicon-gate process and the careful input circuit design gives the TLC27M4 and TLC27M9
very good input offset voltage drift characteristics relative to conventional metal-gate processes. Offset voltage
drift in CMOS devices is highly influenced by threshold voltage shifts caused by polarization of the phosphorus
dopant implanted in the oxide. Placing the phosphorus dopant in a conductor (such as a polysilicon gate)
alleviates the polarization problem, thus reducing threshold voltage shifts by more than an order of magnitude.
The offset voltage drift with time has been calculated to be typically 0.1 µV/month, including the first month of
operation.
Because of the extremely high input impedance and resulting low bias current requirements, the TLC27M4 and
TLC27M9 are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and
sockets can easily exceed bias current requirements and cause a degradation in device performance. It is good
practice to include guard rings around inputs (similar to those of Figure 4 in the Parameter Measurement
Information section). These guards should be driven from a low-impedance source at the same voltage level as
the common-mode input (see Figure 40).
Unused amplifiers should be connected as unity-gain followers to avoid possible oscillation.
Noise Performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage
differential amplifier. The low input bias current requirements of the TLC27M4 and TLC27M9 result in a very low
noise current, which is insignificant in most applications. This feature makes the devices especially favorable
over bipolar devices when using values of circuit impedance greater than 50 kΩ, since bipolar devices exhibit
greater noise currents.
–
+
–
+
–
+
V
I
V
V
V
O
O
O
V
V
I
I
(a) NONINVERTING AMPLIFIER
(b) INVERTING AMPLIFIER
(c) UNITY-GAIN AMPLIFIER
Figure 40. Guard-Ring Schemes
Copyright © 1987–2012, Texas Instruments Incorporated
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Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
Output Characteristics
The output stage of the TLC27M4 and TLC27M9 is designed to sink and source relatively high amounts of
current (see typical characteristics). If the output is subjected to a short-circuit condition, this high current
capability can cause device damage under certain conditions. Output current capability increases with supply
voltage.
All operating characteristics of the TLC27M4 and TLC27M9 were measured using a 20-pF load. The devices
drive higher capacitive loads; however, as output load capacitance increases, the resulting response pole occurs
at lower frequencies, thereby causing ringing, peaking, or even oscillation (see Figure 41). In many cases,
adding a small amount of resistance in series with the load capacitance alleviates the problem.
(a) C = 20 pF, R = NO LOAD
L
(b) C = 170 pF, R = NO LOAD
L L
L
2.5 V
–
+
V
O
V
I
C
L
T = 25°C
A
f = 1 kHz
= 1 V
V
IPP
–
2.5 V
(d) TEST CIRCUIT
(c) C = 190 pF, R = NO LOAD
L
L
Figure 41. Effect of Capacitive Loads and Test Circuit
Although the TLC27M4 and TLC27M9 possess excellent high-level output voltage and current capability,
methods for boosting this capability are available, if needed. The simplest method involves the use of a pullup
resistor (RP) connected from the output to the positive supply rail (see Figure 42). There are two disadvantages
to the use of this circuit. First, the NMOS pulldown transistor N4 (see equivalent schematic) must sink a
comparatively large amount of current. In this circuit, N4 behaves like a linear resistor with an on-resistance
between approximately 60 Ω and 180 Ω, depending on how hard the operational amplifier input is driven. With
very low values of RP, a voltage offset from 0 V at the output occurs. Second, pullup resistor RP acts as a drain
load to N4 and the gain of the operational amplifier is reduced at output voltage levels where N5 is not supplying
the output current.
32
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Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
V
C
DD
R
P
V
+
–
I
I
V
– V
DD O
I
P
F
Rp =
I
+ I + I
L P
F
–
V
O
I
= Pullup current required
by the operational amplifier
(typically 500 μA)
P
V
O
+
R2
I
R
L
R1
L
Figure 42. Resistive Pullup to Increase VOH
Figure 43. Compensation for Input Capacitance
Feedback
Operational amplifier circuits nearly always employ feedback, and since feedback is the first prerequisite for
oscillation, some caution is appropriate. Most oscillation problems result from driving capacitive loads (discussed
previously) and ignoring stray input capacitance. A small-value capacitor connected in parallel with the feedback
resistor is an effective remedy (see Figure 43). The value of this capacitor is optimized empirically.
Electrostatic Discharge Protection
The TLC27M4 and TLC27M9 incorporate an internal electrostatic discharge (ESD) protection circuit that prevents
functional failures at voltages up to 2000 V as tested under MIL-STD-883C, Method 3015.2. Care should be
exercised, however, when handling these devices, as exposure to ESD may result in the degradation of the
device parametric performance. The protection circuit also causes the input bias currents to be temperature-
dependent and have the characteristics of a reverse-biased diode.
Latch-Up
Because CMOS devices are susceptible to latch-up due to their inherent parasitic thyristors, the TLC27M4 and
TLC27M9 inputs and outputs were designed to withstand —100-mA surge currents without sustaining latch-up;
however, techniques should be used to reduce the chance of latch-up whenever possible. Internal protection
diodes should not, by design, be forward biased. Applied input and output voltage should not exceed the supply
voltage by more than 300 mV. Care should be exercised when using capacitive coupling on pulse generators.
Supply transients should be shunted by the use of decoupling capacitors (0.1 µF typical) located across the
supply rails as close to the device as possible.
The current path established if latch-up occurs is usually between the positive supply rail and ground; it can be
triggered by surges on the supply lines and/or voltages on either the output or inputs that exceed the supply
voltage. Once latch-up occurs, the current flow is limited only by the impedance of the power supply and the
forward resistance of the parasitic thyristor and usually results in the destruction of the device. The chance of
latch-up occurring increases with increasing temperature and supply voltages.
Copyright © 1987–2012, Texas Instruments Incorporated
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Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
1N4148
470 kΩ
100 kΩ
5 V
1/4
–
TLC27M4
47 kΩ
V
O
100 kΩ
+
R2
68 kΩ
100 kΩ
1 μF
C2
2.2 nF
R1
68 kΩ
C1
2.2 nF
NOTE: V
≈ 2 V
OPP
1
f
=
O
2π √R1R2C1C2
Figure 44. Wien Oscillator
34
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
www.ti.com
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
I
S
5 V
1/4
TLC27M9
V
I
+
–
2N3821
R
NOTE: V = 0 V to 3 V
I
V
I
I
=
S
R
Figure 45. Precision Low-Current Sink
5 V
Gain Control
1 MΩ
(see Note A)
100 kΩ
1 μF
+
ï
+
10 kΩ
0.1 μF
+
+
1 μF
1/4
TLC27M4
1 kΩ
100 kΩ
100 kΩ
NOTE A: Low to medium impedance dynamic mike
Figure 46. Microphone Preamplifier
10 MΩ
V
DD
–
+
1/4
TLC27M4
1 kΩ
–
+
V
O
1/4
TLC27M4
V
REF
15 nF
100 kΩ
150 pF
NOTE: VDD = 4 V to 15 V
VREF = 0 V to VDD – 2 V
Figure 47. Photo-Diode Amplifier With Ambient Light Rejection
Copyright © 1987–2012, Texas Instruments Incorporated
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Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
TLC27M4, TLC27M4A, TLC27M4B, TLC27M4Y, TLC27M9
SLOS093D –OCTOBER 1987–REVISED OCTOBER 2012
www.ti.com
1 MΩ
V
DD
33 pF
–
+
V
O
1/4
TLC27M4
1N4148
100 kΩ
100 kΩ
NOTE: VDD = 8 V to 16 V
VO = 5 V, 10 mA
Figure 48. Low-Power Voltage Regulator
5 V
1 MΩ
0.01 μF
0.22 μF
V
+
–
I
V
O
1/4
TLC27M4
1 MΩ
100 kΩ
100 kΩ
10 kΩ
0.1 μF
Figure 49. Single-Rail AC Amplifier
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Copyright © 1987–2012, Texas Instruments Incorporated
Product Folder Links: TLC27M4 TLC27M4A TLC27M4B TLC27M4Y TLC27M9
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
PACKAGING INFORMATION
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLC27M4ACD
TLC27M4ACDG4
TLC27M4ACDR
TLC27M4ACDRG4
TLC27M4ACN
TLC27M4ACNE4
TLC27M4AID
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
SOIC
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
PDIP
PDIP
SOIC
SOIC
SOIC
PDIP
SOIC
SOIC
SOIC
PDIP
SOIC
SOIC
D
D
D
D
N
N
D
D
N
N
D
D
D
N
D
D
D
N
D
D
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
50
50
RoHS & Green
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
0 to 70
27M4AC
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
27M4AC
2500 RoHS & Green
2500 RoHS & Green
0 to 70
27M4AC
0 to 70
27M4AC
25
25
50
RoHS & Green
RoHS & Green
RoHS & Green
0 to 70
TLC27M4ACN
TLC27M4ACN
27M4AI
N / A for Pkg Type
0 to 70
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
TLC27M4AIDR
TLC27M4AIN
2500 RoHS & Green
27M4AI
25
25
50
50
RoHS & Green
RoHS & Green
RoHS & Green
RoHS & Green
TLC27M4AIN
TLC27M4AIN
27M4BC
TLC27M4AINE4
TLC27M4BCD
TLC27M4BCDG4
TLC27M4BCDR
TLC27M4BCN
TLC27M4BID
N / A for Pkg Type
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
27M4BC
2500 RoHS & Green
0 to 70
27M4BC
25
50
50
RoHS & Green
RoHS & Green
RoHS & Green
0 to 70
TLC27M4BCN
27M4BI
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
TLC27M4BIDG4
TLC27M4BIDR
TLC27M4BIN
27M4BI
2500 RoHS & Green
27M4BI
25
50
RoHS & Green
RoHS & Green
TLC27M4BIN
TLC27M4C
TLC27M4C
TLC27M4CD
Level-1-260C-UNLIM
Level-1-260C-UNLIM
TLC27M4CDR
2500 RoHS & Green
0 to 70
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
Orderable Device
Status Package Type Package Pins Package
Eco Plan
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
Samples
Drawing
Qty
(1)
(2)
(3)
(4/5)
(6)
TLC27M4CDRG4
TLC27M4CN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
SO
D
N
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
14
2500 RoHS & Green
NIPDAU
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
0 to 70
TLC27M4C
25
50
RoHS & Green
RoHS & Green
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
NIPDAU
TLC27M4CN
TLC27M4
TLC27M4
P27M4
TLC27M4CNS
TLC27M4CNSR
TLC27M4CPWR
TLC27M4ID
NS
NS
PW
D
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
0 to 70
SO
2000 RoHS & Green
2000 RoHS & Green
0 to 70
TSSOP
SOIC
SOIC
SOIC
SOIC
PDIP
TSSOP
TSSOP
SOIC
SOIC
SOIC
PDIP
SOIC
SOIC
SOIC
PDIP
0 to 70
50
50
RoHS & Green
RoHS & Green
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
-40 to 85
0 to 70
TLC27M4I
TLC27M4I
TLC27M4I
TLC27M4I
TLC27M4IN
P27M4I
TLC27M4IDG4
TLC27M4IDR
TLC27M4IDRG4
TLC27M4IN
D
D
2500 RoHS & Green
2500 RoHS & Green
D
N
25
90
RoHS & Green
RoHS & Green
TLC27M4IPW
TLC27M4IPWR
TLC27M9CD
PW
PW
D
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
2000 RoHS & Green
50 RoHS & Green
P27M4I
TLC27M9C
TLC27M9C
TLC27M9C
TLC27M9CN
TLC27M9I
TLC27M9I
TLC27M9I
TLC27M9IN
TLC27M9CDR
TLC27M9CDRG4
TLC27M9CN
D
2500 RoHS & Green
2500 RoHS & Green
0 to 70
D
0 to 70
N
25
50
RoHS & Green
RoHS & Green
0 to 70
TLC27M9ID
D
Level-1-260C-UNLIM
Level-1-260C-UNLIM
Level-1-260C-UNLIM
N / A for Pkg Type
-40 to 85
-40 to 85
-40 to 85
-40 to 85
TLC27M9IDR
TLC27M9IDRG4
TLC27M9IN
D
2500 RoHS & Green
2500 RoHS & Green
D
N
25
RoHS & Green
(1) The marketing status values are defined as follows:
Addendum-Page 2
PACKAGE OPTION ADDENDUM
www.ti.com
10-Dec-2020
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2) RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Dec-2020
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
Package Package Pins
Type Drawing
SPQ
Reel
Reel
A0
B0
K0
P1
W
Pin1
Diameter Width (mm) (mm) (mm) (mm) (mm) Quadrant
(mm) W1 (mm)
TLC27M4ACDR
TLC27M4AIDR
TLC27M4BCDR
TLC27M4BIDR
TLC27M4CDR
TLC27M4CNSR
TLC27M4CPWR
TLC27M4IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SO
D
D
14
14
14
14
14
14
14
14
14
14
14
2500
2500
2500
2500
2500
2000
2000
2500
2000
2500
2500
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
330.0
16.4
16.4
16.4
16.4
16.4
16.4
12.4
16.4
12.4
16.4
16.4
6.5
6.5
6.5
6.5
6.5
8.2
6.9
6.5
6.9
6.5
6.5
9.0
9.0
9.0
9.0
9.0
10.5
5.6
9.0
5.6
9.0
9.0
2.1
2.1
2.1
2.1
2.1
2.5
1.6
2.1
1.6
2.1
2.1
8.0
8.0
8.0
8.0
8.0
12.0
8.0
8.0
8.0
8.0
8.0
16.0
16.0
16.0
16.0
16.0
16.0
12.0
16.0
12.0
16.0
16.0
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
Q1
D
D
D
NS
PW
D
TSSOP
SOIC
TSSOP
SOIC
SOIC
TLC27M4IPWR
TLC27M9CDR
TLC27M9IDR
PW
D
D
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
30-Dec-2020
*All dimensions are nominal
Device
Package Type Package Drawing Pins
SPQ
Length (mm) Width (mm) Height (mm)
TLC27M4ACDR
TLC27M4AIDR
TLC27M4BCDR
TLC27M4BIDR
TLC27M4CDR
TLC27M4CNSR
TLC27M4CPWR
TLC27M4IDR
SOIC
SOIC
SOIC
SOIC
SOIC
SO
D
D
14
14
14
14
14
14
14
14
14
14
14
2500
2500
2500
2500
2500
2000
2000
2500
2000
2500
2500
350.0
350.0
350.0
350.0
350.0
853.0
853.0
350.0
853.0
350.0
350.0
350.0
350.0
350.0
350.0
350.0
449.0
449.0
350.0
449.0
350.0
350.0
43.0
43.0
43.0
43.0
43.0
35.0
35.0
43.0
35.0
43.0
43.0
D
D
D
NS
PW
D
TSSOP
SOIC
TSSOP
SOIC
SOIC
TLC27M4IPWR
TLC27M9CDR
TLC27M9IDR
PW
D
D
Pack Materials-Page 2
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