TLC3704CPWLE [TI]
QUAD MICROPOWER LinCMOSE VOLTAGE COMPARATORS; 四通道微LinCMOSE电压比较器
| 型号： | TLC3704CPWLE |
| 厂家： | 
TEXAS INSTRUMENTS |
| 描述： | QUAD MICROPOWER LinCMOSE VOLTAGE COMPARATORS |
| 文件： | 总31页 (文件大小：441K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
D, J, OR N PACKAGE
Push-Pull CMOS Output Drives Capacitive
Loads Without Pullup Resistor,
= ± 8 mA
(TOP VIEW)
I
O
1OUT
2OUT
3OUT
4OUT
GND
4IN+
4IN–
3IN+
3IN–
1
2
3
4
5
6
7
14
13
12
11
10
9
Very Low Power . . . 200 µW Typ at 5 V
Fast Response Time . . . t
With 5-mV Overdrive
= 2.7 µs Typ
V
PLH
DD
2IN–
2IN+
1IN–
1IN+
Single Supply Operation . . . 3 V to 16 V
TLC3704M . . . 4 V to 16 V
8
On-Chip ESD Protection
description
PW PACKAGE
(TOP VIEW)
The TLC3704 consists of four independent
micropower voltage comparators designed to
operate from a single supply and be compatible
with modern HCMOS logic systems. They are
functionally similar to the LM339 but use 1/20th
the power for similar response times. The
push-pull CMOS output stage drives capacitive
loads directly without a power-consuming pullup
resistor to achieve the stated response time.
Eliminating the pullup resistor not only reduces
power dissipation, but also saves board space
and componentcost. Theoutputstageisalsofully
compatible with TTL requirements.
1
2
3
4
5
6
7
14
13
12
11
10
9
1OUT
2OUT
3OUT
4OUT
GND
4IN+
4IN–
3IN+
3IN–
V
DD
2IN–
2IN+
1IN–
1IN+
8
FK PACKAGE
(TOP VIEW)
Texas Instruments LinCMOS process offers
superior analog performance to standard CMOS
processes. Along with the standard CMOS
advantages of low power without sacrificing
speed, high input impedance, and low bias
currents, the LinCMOS process offers extremely
stable input offset voltages with large differential
input voltages. This characteristic makes it
possible to build reliable CMOS comparators.
3
2 1 20 19
GND
NC
V
18
17
16
15
14
4
5
6
7
8
DD
NC
4IN+
NC
2IN–
NC
4IN–
2IN+
9 10 11 12 13
The TLC3704C is characterized for operation
over the commercial temperature range of 0°C to
70°C. The TLC3704I is characterized for
operation over the extended industrial tempera-
ture range of – 40°C to 85°C. The TLC3704M is
characterized for operation over the full military
temperature range of – 55°C to 125°C. The
TLC3704Q is characterized for operation from –
40°C to 125°C.
NC – No internal connection
symbol (each comparator)
IN+
IN–
OUT
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
LinCMOS is a trademark of Texas Instruments Incorporated.
Copyright 2002, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
AVAILABLE OPTIONS
PACKAGE
V
max
IO
T
A
SMALL OUTLINE
(D)
CERAMIC
(FK)
CERAMIC DIP
(J)
PLASTIC DIP
(N)
TSSOP
(PW)
at 25°C
0°C to 70°C
– 40°C to 85°C
– 55°C to 125°C
– 40°C to 125°C
5 mV
5 mV
5 mV
5 mV
TLC3704CD
—
—
TLC3704CN
TLC3704CPW
TLC3704ID
—
TLC3704MFK
—
—
TLC3704IN
TLC3704IPW
—
—
TLC3704MJ
TLC3704QJ
—
—
—
—
The D and PW packages are available taped and reeled. Add R suffix to the device type (e.g., TLC3704CDR).
functional block diagram (each comparator)
V
DD
IN+
Differential
Input
Circuits
OUT
IN–
GND
†
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 V to 18 V
DD
Differential input voltage, V (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 18 V
ID
Input voltage range, V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 to V
I
DD
DD
Output voltage range, V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.3 to V
O
Input current, I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 mA
I
Output current, I (each output) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 20 mA
O
Total supply current into V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 mA
DD
Total current out of GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 mA
Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table
Operating free-air temperature range, T : TLC3704C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70°C
A
TLC3704I . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 85°C
TLC3704M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 55°C to 125°C
TLC3704Q . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 40°C to 125°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C
Case temperature for 60 seconds: FK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds: D or N package . . . . . . . . . . . . . . . . 260°C
Lead temperature 1,6 mm (1/16 inch) from case for 60 seconds: J package . . . . . . . . . . . . . . . . . . . . . 300°C
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to network ground.
2. Differential voltages are at IN+ with respect to IN–.
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
DISSIPATION RATING TABLE
T
≤ 25°C
DERATING FACTOR
T
= 70°C
T
= 85°C
T = 125°C
A
POWER RATING
A
A
A
PACKAGE
POWER RATING
ABOVE T = 25°C
POWER RATING
POWER RATING
A
D
FK
J
N
PW
950 mW
1375 mW
1375 mW
1150 mW
675 mW
7.6 mW/°C
11.0 mW/°C
11.0 mW/°C
9.2 mW/°C
5.4 mW/°C
608 mW
880 mW
880 mW
736 mW
432 mW
494 mW
715 mW
715 mW
598 mW
351 mW
N/A
275 mW
275 mW
N/A
N/A
recommended operating conditions
TLC3704C
MIN NOM
UNIT
MAX
Supply voltage, V
DD
3
5
16
V
V
Common-mode input voltage, V
IC
– 0.2
V
DD
– 1.5
High-level output current, I
– 20
20
mA
mA
°C
OH
OL
Low-level output current, I
Operating free-air temperature, T
0
70
A
electrical characteristics at specified operating free-air temperature, V
(unless otherwise noted)
= 5 V
DD
TLC3704C
TYP
†
PARAMETER
Input offset voltage
Input offset current
Input bias current
T
UNIT
TEST CONDITIONS
A
MIN
MAX
5
V
V
= 5 V to 10 V,
25°C
0°C to 70°C
25°C
1.2
DD
V
IO
mV
= V
min, See Note 3
6.5
IC
ICR
1
5
pA
nA
pA
nA
I
IO
V
IC
= 2.5 V
70°C
0.3
0.6
25°C
I
IB
V
IC
= 2.5 V
70°C
0 to
25°C
V
– 1
DD
V
ICR
Common-mode input voltage range
V
0 to
0°C to 70°C
V
– 1.5
DD
25°C
70°C
84
84
84
85
85
85
4.7
CMRR Common-mode rejection ratio
V
V
= V
min
ICR
dB
dB
IC
0°C
25°C
k
Supply-voltage rejection ratio
= 5 V to 10 V
70°C
SVR
DD
0°C
25°C
4.5
4.3
V
V
High-level output voltage
V
V
= 1 V,
I
I
= –4 mA
V
OH
ID
OH
70°C
25°C
210
35
300
375
80
Low-level output voltage
= –1 V,
= 4 mA
mV
µA
OL
ID
OH
70°C
25°C
I
Supply current (all four comparators)
Outputs low,
No load
DD
0°C to 70°C
100
†
All characteristics are measured with zero common-mode voltage unless otherwise noted.
NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.
3
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
recommended operating conditions
TLC3704I
MIN NOM
UNIT
MAX
Supply voltage, V
DD
3
5
16
V
V
Common-mode input voltage, V
IC
– 0.2
V
DD
– 1.5
High-level output current, I
– 20
20
mA
mA
°C
OH
Low-level output current, I
OL
Operating free-air temperature, T
– 40
85
A
electrical characteristics at specified operating free-air temperature, V
otherwise noted)
= 5 V, V = 0 (unless
IC
DD
TLC3704I
UNIT
PARAMETER
Input offset voltage
Input offset current
Input bias current
T
A
TEST CONDITIONS
MIN
TYP
MAX
V
V
= 5 V to 10 V,
25°C
–40°C to 85°C
25°C
1.2
5
7
DD
V
IO
mV
= V
min, See Note 3
IC
ICR
1
5
pA
nA
pA
nA
I
IO
V
IC
= 2.5 V
85°C
1
2
25°C
I
IB
V
IC
= 2.5 V
85°C
0 to
25°C
V
– 1
DD
V
ICR
Common-mode input voltage range
V
0 to
–40°C to 85°C
V
– 1.5
DD
25°C
85°C
84
84
83
85
85
83
4.7
CMRR Common-mode rejection ratio
V
V
= V
min
ICR
dB
dB
IC
–40°C
25°C
k
Supply-voltage rejection ratio
= 5 V to 10 V
85°C
SVR
DD
–40°C
25°C
4.5
4.3
V
V
High-level output voltage
Low-level output voltage
V
V
= 1 V,
I
I
= –4 mA
V
OH
ID
OH
85°C
25°C
210
35
300
400
80
= –1 V,
= 4 mA
mV
µA
OL
ID
OH
85°C
25°C
I
Supply current (all four comparators) Outputs low,
No load
DD
–40°C to 85°C
125
NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
recommended operating conditions
TLC3704M
MIN NOM
UNIT
MAX
Supply voltage, V
DD
4
0
5
16
V
V
Common-mode input voltage, V
IC
V
DD
– 1.5
High-level output current, I
– 20
20
mA
mA
°C
OH
Low-level output current, I
OL
Operating free-air temperature, T
– 55
125
A
electrical characteristics at specified operating free-air temperature, V
otherwise noted)
= 5 V, V = 0 (unless
IC
DD
TLC3704M
UNIT
PARAMETER
Input offset voltage
Input offset current
Input bias current
T
A
TEST CONDITIONS
MIN
TYP
MAX
V
V
= 5 V to 10 V,
25°C
–55°C to 125°C
25°C
1.2
5
DD
V
IO
mV
= V
min, See Note 3
10
IC
ICR
1
5
pA
nA
pA
nA
I
IO
V
IC
= 2.5 V
125°C
15
30
25°C
I
IB
V
IC
= 2.5 V
125°C
0 to
25°C
V
– 1
DD
V
ICR
Common-mode input voltage range
V
0 to
–55°C to 125°C
V
– 1.5
DD
25°C
125°C
84
83
82
85
85
82
4.7
CMRR Common-mode rejection ratio
V
V
= V
min
ICR
dB
dB
IC
–55°C
25°C
k
Supply-voltage rejection ratio
= 5 V to 10 V
125°C
SVR
DD
–55°C
25°C
4.5
4.2
V
V
High-level output voltage
Low-level output voltage
V
V
= 1 V,
I
I
= –4 mA
V
OH
ID
OH
125°C
25°C
210
35
300
500
80
= –1 V,
= 4 mA
mV
µA
OL
ID
OH
125°C
25°C
I
Supply current (all four comparators) Outputs low,
No load
DD
–55°C to 125°C
175
NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.
5
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
recommended operating conditions
TLC3704Q
MIN NOM
UNIT
MAX
Supply voltage, V
DD
3
5
16
V
V
Common-mode input voltage, V
IC
–0.2
V
DD
– 1.5
High-level output current, I
– 20
20
mA
mA
°C
OH
Low-level output current, I
OL
Operating free-air temperature, T
– 40
125
A
electrical characteristics at specified operating free-air temperature, V
otherwise noted)
= 5 V, V = 0 (unless
IC
DD
TLC3704Q
UNIT
PARAMETER
Input offset voltage
Input offset current
Input bias current
T
A
TEST CONDITIONS
MIN
TYP
MAX
V
V
= 5 V to 10 V,
25°C
–40°C to 125°C
25°C
1.2
5
7
DD
V
IO
mV
= V
min, See Note 3
IC
ICR
1
5
pA
nA
pA
nA
I
IO
V
IC
= 2.5 V
125°C
15
30
25°C
I
IB
V
IC
= 2.5 V
125°C
25°C
0 to V
– 1
DD
– 1.5
Common-mode input voltage
range
V
V
ICR
–40°C to 125°C 0 to V
25°C
DD
84
83
83
85
85
83
4.7
CMRR Common-mode rejection ratio
V
V
= V
min
ICR
125°C
dB
IC
–40°C
25°C
k
Supply-voltage rejection ratio
= 5 V to 10 V
125°C
dB
SVR
DD
–40°C
25°C
125°C
4.5
4.2
V
V
High-level output voltage
Low-level output voltage
V
V
= 1 V,
I
I
= –4 mA
V
OH
ID
OH
25°C
210
35
300
500
80
= –1 V,
= 4 mA
mV
µA
OL
ID
OH
125°C
25°C
Supply current (all four
comparators)
I
Outputs low,
No load
DD
–40°C to 125°C
175
NOTE 3: The offset voltage limits given are the maximum values required to drive the output up to 4.5 V or down to 0.3 V.
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
switching characteristics, V
= 5 V, T = 25°C
A
DD
TLC3704C, TLC3704I
TLC3704M, TLC3704Q
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
4.5
2.7
1.9
1.4
1.1
1.1
4
MAX
Overdrive = 2 mV
Overdrive = 5 mV
f = 10 kHz,
= 50 pF
Overdrive = 10 mV
Overdrive = 20 mV
Overdrive = 40 mV
†
C
t
PLH
Propagation delay time, low-to-high-level output
µs
L
V = 1.4-V step at IN+
I
Overdrive = 2 mV
Overdrive = 5 mV
Overdrive = 10 mV
Overdrive = 20 mV
Overdrive = 40 mV
2.3
1.5
0.95
0.65
0.15
f = 10 kHz,
= 50 pF
†
C
t
PHL
Propagation delay time, high-to-low-level output
µs
L
V = 1.4-V step at IN+
I
f = 10 kHz,
t
t
Fall time
Overdrive = 50 mV
Overdrive = 50 mV
50
ns
ns
f
C
= 50 pF
L
f = 10 kHz,
= 50 pF
Rise time
125
r
C
L
†
Simultaneous switching of inputs causes degradation in output response.
7
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PRINCIPLES OF OPERATION
LinCMOS process
The LinCMOS process is a linear polysilicon-gate CMOS process. Primarily designed for single-supply
applications, LinCMOS products facilitate the design of a wide range of high-performance analog functions from
operational amplifiers to complex mixed-mode converters.
This short guide is intended to answer the most frequently asked questions related to the quality and reliability
of LinCMOS products. Direct further questions to the nearest TI field sales office.
electrostatic discharge
CMOS circuits are prone to gate oxide breakdown when exposed to high voltages even if the exposure is only
for very short periods of time. Electrostatic discharge (ESD) is one of the most common causes of damage to
CMOS devices. It can occur when a device is handled without proper consideration for environmental
electrostatic charges, e.g., during board assembly. If a circuit in which one amplifier from a dual op amp is being
used and the unused pins are left open, high voltages tends to develop. If there is no provision for ESD
protection, these voltages may eventually punch through the gate oxide and cause the device to fail. To prevent
voltage buildup, each pin is protected by internal circuitry.
Standard ESD-protection circuits safely shunt the ESD current by providing a mechanism whereby one or more
transistors break down at voltages higher than the normal operating voltages but lower than the breakdown
voltage of the input gate. This type of protection scheme is limited by leakage currents which flow through the
shunting transistors during normal operation after an ESD voltage has occurred. Although these currents are
small, on the order of tens of nanoamps, CMOS amplifiers are often specified to draw input currents as low as
tens of picoamps.
To overcome this limitation, TI design engineers developed the patented ESD-protection circuit shown in
Figure 1. This circuit can withstand several successive 2-kV ESD pulses, while reducing or eliminating leakage
currents that may be drawn through the input pins. A more detailed discussion of the operation of the TI
ESD-protection circuit is presented on the next page.
All input and output pins on LinCMOS and Advanced LinCMOS products have associated ESD-protection
circuitry that undergoes qualification testing to withstand 2000 V discharged from a 100-pF capacitor through
a 1500-Ω resistor (human body model) and 200 V from a 100-pF capacitor with no current-limiting resistor
(charged device model). These tests simulate both operator and machine handling of devices during normal
test and assembly operations.
V
DD
R1
Input
To Protected Circuit
R2
Q1
Q2
D1
D2
D3
GND
Figure 1. LinCMOS ESD-Protection Schematic
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PRINCIPLES OF OPERATION
input protection circuit operation
Texas Instruments patented protection circuitry allows for both positive- and negative-going ESD transients.
These transients are characterized by extremely fast rise times and usually low energies, and can occur both
when the device has all pins open and when it is installed in a circuit.
positive ESD transients
Initial positive charged energy is shunted through Q1 to V . Q1 turns on when the voltage at the input rises
SS
BE
above the voltage on the V
pin by a value equal to the V of Q1. The base current increases through R2
DD
with input current as Q1 saturates. The base current through R2 forces the voltage at the drain and gate of Q2
to exceed its threshold level (V 22 to 26 V) and turn Q2 on. The shunted input current through Q1 to V is
T
SS
now shunted through the n-channel enhancement-type MOSFET Q2 to V . If the voltage on the input pin
SS
continues to rise, the breakdown voltage of the zener diode D3 is exceeded, and all remaining energy is
dissipated in R1 and D3. The breakdown voltage of D3 is designed to be 24 to 27 V, which is well below the gate-
oxide voltage of the circuit to be protected.
negative ESD transients
The negative charged ESD transients are shunted directly through D1. Additional energy is dissipated in R1
and D2 as D2 becomes forward biased. The voltage seen by the protected circuit is – 0.3 V to –1 V (the forward
voltage of D1 and D2).
circuit-design considerations
LinCMOS products are being used in actual circuit environments that have input voltages that exceed the
recommended common-mode input voltage range and activate the input protection circuit. Even under normal
operation, these conditions occur during circuit power up or power down, and in many cases, when the device
is being used for a signal conditioning function. The input voltages can exceed V
only if the inputs are current limited. The recommended current limit shown on most product data sheets is
and not damage the device
ICR
±5 mA. Figures 2 and 3 show typical characteristics for input voltage versus input current.
Normal operation and correct output state can be expected even when the input voltage exceeds the positive
supply voltage. Again, the input current should be externally limited even though internal positive current limiting
is achieved in the input protection circuit by the action of Q1. When Q1 is on, it saturates and limits the current
to approximately 5-mA collector current by design. When saturated, Q1 base current increases with input
current. This base current is forced into the V
producing the current limiting effects shown in Figure 2. This internal limiting lasts only as long as the input
pin and into the device I
or the V
supply through R2
DD
DD
DD
voltage is below the V of Q2.
T
When the input voltage exceeds the negative supply voltage, normal operation is affected and output voltage
states may not be correct. Also, the isolation between channels of multiple devices (duals and quads) can be
severely affected. External current limiting must be used since this current is directly shunted by D1 and D2 and
no internal limiting is achieved. If normal output voltage states are required, an external input voltage clamp is
required (see Figure 4).
9
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PRINCIPLES OF OPERATION
circuit-design considerations (continued)
INPUT CURRENT
vs
INPUT VOLTAGE
INPUT CURRENT
vs
INPUT VOLTAGE
8
7
10
9
T
A
= 25° C
T
A
= 25° C
8
7
6
5
6
5
4
3
2
1
0
4
3
2
1
0
V
DD
V
DD
+ 4
V
+ 8
V
+ 12
DD
V
DD
– 0.3
V
DD
– 0.5
V
– 0.7
V
DD
– 0.9
DD
DD
V – Input Voltage – V
I
V – Input Voltage – V
I
Figure 2
Figure 3
V
DD
R
I
Positive Voltage Input Current Limit :
V
I
+
1/2
TLC3704
VI VDD 0.3 V
RI
5 mA
–
V
ref
Negative Voltage Input Current Limit :
VI VDD
(
0.3 V)
RI
5 mA
See Note A
NOTE A: If the correct input state is required when the negative input exceeds GND, a Schottky clamp is required.
Figure 4. Typical Input Current-Limiting Configuration for a LinCMOS Comparator
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PARAMETER MEASUREMENT INFORMATION
The TLC3704 contains a digital output stage which, if held in the linear region of the transfer curve, can cause
damage to the device. Conventional operational amplifier/comparator testing incorporates the use of a servo
loop which is designed to force the device output to a level within this linear region. Since the servo-loop method
of testing cannot be used, we offer the following alternatives for measuring parameters such as input offset
voltage, common-mode rejection, etc.
Toverifythattheinputoffsetvoltagefallswithinthelimitsspecified, thelimitvalueisappliedtotheinputasshown
in Figure 5(a). With the noninverting input positive with respect to the inverting input, the output should be high.
With the input polarity reversed, the output should be low.
A similar test can be made to verify the input offset voltage at the common-mode extremes. The supply voltages
can be slewed as shown in Figure 5(b) for the V
greater accuracy.
test, rather than changing the input voltages, to provide
ICR
5 V
1 V
+
+
–
–
Applied V
Limit
Applied V
Limit
IO
IO
V
O
V
O
– 4 V
(a) V WITH V = 0 V
IO IC
(b) V WITH V = 4 V
IO IC
Figure 5. Method for Verifying That Input Offset Voltage Is Within Specified Limits
A close approximation of the input offset voltage can be obtained by using a binary search method to vary the
differential input voltage while monitoring the output state. When the applied input voltage differential is equal,
but opposite in polarity, to the input offset voltage, the output changes states.
Figure 6 illustrates a practical circuit for direct dc measurement of input offset voltage that does not bias the
comparator in the linear region. The circuit consists of a switching mode servo loop in which IC1a generates
a triangular waveform of approximately 20-mV amplitude. IC1b acts as a buffer, with C2 and R4 removing any
residual d.c. offset. The signal is then applied to the inverting input of the comparator under test, while the
noninverting input is driven by the output of the integrator formed by IC1c through the voltage divider formed
by R8 and R9. The loop reaches a stable operating point when the output of the comparator under test has a
dutycycleofexactly50%, whichcanonlyoccurwhentheincomingtrianglewaveisslicedsymmetricallyorwhen
the voltage at the noninverting input exactly equals the input offset voltage.
Voltage divider R8 and R9 provides an increase in the input offset voltage by a factor of 100 to make
measurement easier. The values of R5, R7, R8, and R9 can significantly influence the accuracy of the reading;
therefore, it is suggested that their tolerance level be one percent or lower.
Measuring the extremely low values of input current requires isolation from all other sources of leakage current
and compensation for the leakage of the test socket and board. With a good picoammeter, the socket and board
leakage can be measured with no device in the socket. Subsequently, this open socket leakage value can be
subtracted from the measurement obtained with a device in the socket to obtain the actual input current of the
device.
11
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PARAMETER MEASUREMENT INFORMATION
V
DD
C3
0.68 µF
R5
1.8 kΩ 1%
IC1a
1/4 TLC274CN
C2
1 µF
Buffer
IC1c
1/4 TLC274CN
+
R6
1 MΩ
–
DUT
–
–
V
IO
(X100)
R4
47 kΩ
+
+
R7
1.8 kΩ 1%
Integrator
R1
240 kΩ
C4
0.1 µF
IC1b
1/4 TLC274CN
–
C1
0.1 µF
+
Triangle
Generator
R8
10 kΩ 1%
R9
100 Ω 1%
R2
10 kΩ
R3
100 Ω
Figure 6. Circuit for Input Offset Voltage Measurement
Response time is defined as the interval between the application of an input step function and the instant when
the output reaches 50% of its maximum value. Response time for the low-to-high-level output is measured from
the leading edge of the input pulse, while response time for the high-to-low-level output is measured from the
trailing edge of the input pulse. Response time measurement at low input signal levels can be greatly affected
by the input offset voltage. The offset voltage should be balanced by the adjustment at the inverting input as
shown in Figure 7, so that the circuit is just at the transition point. A low signal, for example 105-mV or 5-mV
overdrive, causes the output to change state.
12
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
PARAMETER MEASUREMENT INFORMATION
V
DD
Pulse
Generator
1 µF
50 Ω
+
1 V
DUT
10 Ω
–
10-Turn
C
L
Potentiometer
(see Note A)
1 kΩ
0.1 µF
– 1 V
TEST CIRCUIT
Overdrive
Overdrive
Input
100 mV
Input
100 mV
90%
50%
10%
90%
50%
10%
Low-to-High
Level Output
High-to-Low
Level Output
t
t
f
r
t
t
PHL
PLH
VOLTAGE WAVEFORMS
NOTE A: C includes probe and jig capacitance.
L
Figure 7. Response, Rise, and Fall Times Circuit and Voltage Waveforms
13
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
Input offset voltage
Input bias current
Distribution
8
9
IO
I
IB
vs Free-air temperature
vs Free-air temperature
vs Free-air temperature
CMRR Common-mode rejection ratio
10
11
k
Supply-voltage rejection ratio
SVR
vs Free-air temperature
vs High-level output current
12
13
V
V
High-level output current
OH
vs Low-level output current
vs Free-air temperature
14
15
Low-level output voltage
OL
t
Output transition time
vs Load capacitance
16
17
18
19
20
21
t
Supply current response to an output voltage transition
Low-to-high-level output response for various input overdrives
High-to-low-level output response for various input overdrives
Low-to-high-level output response time
t
t
vs Supply voltage
vs Supply voltage
PLH
High-to-low-level output response time
PHL
vs Frequency
vs Supply voltage
vs Free-air temperature
22
23
24
I
Supply current
DD
INPUT BIAS CURRENT
vs
FREE-AIR TEMPERATURE
DISTRIBUTION OF INPUT
†
†
OFFSET VOLTAGE
10
200
180
160
140
V
V
= 5 V
V
V
= 5 V
= 2.5 V
DD
= 2.5 V
DD
IC
IC
= 25° C
T
A
698 Units Tested
1
0.1
From 4 Wafer Lots
120
100
80
60
40
20
0.01
0.001
0
25
50
75
100
125
–5 –4 –3 –2 –1
0
1
2
3
4
5
T
A
– Free-Air Temperature – °C
V
IO
– Input Offset Voltage – mV
Figure 8
Figure 9
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
14
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
†
TYPICAL CHARACTERISTICS
COMMON-MODE REJECTION RATIO
SUPPLY VOLTAGE REJECTION RATIO
vs
vs
FREE-AIR TEMPERATURE
FREE-AIR TEMPERATURE
90
88
86
84
82
80
78
76
90
88
86
84
82
V
DD
= 5 V
V
DD
= 5 V to 10 V
80
78
76
74
72
70
74
72
70
–75 –50 –25
0
25
50
75
100 125
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
T
A
– Free-Air Temperature – °C
Figure 10
Figure 11
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
V
5
4.95
4.9
DD
V
I
= 5 V
= – 4 mA
DD
OH
–0.25
V
DD
= 16 V
10 V
–0.5
4.85
4.8
–0.75
4.75
–1
5 V
4.7
–1.25
4.65
4 V
–1.5
4.6
4.55
4.5
3 V
–1.75
–2
T
A
= 25°C
0
–2.5 –5 –7.5 –10 –12.5 –15 –17.5 –20
–75 –50 –25
0
25
50
75
100
125
I
– High-Level Output Current – mA
T
A
– Free-Air Temperature – °C
OH
Figure 12
Figure 13
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
15
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
†
TYPICAL CHARACTERISTICS
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
1.5
400
350
300
250
200
150
100
T
A
= 25°C
3 V
V
I
= 5 V
= 4 mA
DD
OL
4 V
1.25
1
5 V
0.75
10 V
0.5
0.25
V
DD
= 16 V
50
0
0
0
2
4
6
8
10 12 14 16 18
20
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
I
– Low-Level Output Current – mA
OL
Figure 14
Figure 15
OUTPUT TRANSITION TIME
vs
SUPPLY CURRENT RESPONSE
TO AN OUTPUT VOLTAGE TRANSITION
LOAD CAPACITANCE
250
225
200
V
C
= 5 V
= 50 pF
DD
L
V
T
A
= 5 V
DD
= 25°C
f = 10 kHz
10
Rise Time
175
150
125
100
75
5
0
5
0
Fall Time
50
25
0
0
200
400
600
800
1000
t – Time
C
– Load Capacitance – pF
L
Figure 16
Figure 17
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
16
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
TYPICAL CHARACTERISTICS
HIGH-TO-LOW-LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
LOW-TO-HIGH-LEVEL OUTPUT RESPONSE
FOR VARIOUS INPUT OVERDRIVES
5
5
40 mV
20 mV
10 mV
5 mV
40 mV
20 mV
10 mV
5 mV
2 mV
2 mV
0
100
0
0
100
0
V
= 5 V
= 25° C
= 50 pF
DD
T
A
C
L
V
= 5 V
= 25° C
= 50 pF
DD
T
A
C
L
0
1
2
3
4
5
0
1
2
3
4
5
t
– High-to-Low-Level Output
Response Time – µs
t
– Low-to-High-Level Output
Response Time – µs
PHL
PLH
Figure 18
Figure 19
LOW-TO-HIGH-LEVEL
HIGH-TO-LOW-LEVEL
OUTPUT RESPONSE TIME
vs
OUTPUT RESPONSE TIME
vs
SUPPLY VOLTAGE
SUPPLY VOLTAGE
6
5
6
5
C
T
= 50 pF
= 25°C
L
A
C
= 50 pF
= 25°C
L
T
A
Overdrive = 2 mV
Overdrive = 2 mV
4
3
2
1
0
4
3
5 mV
5 mV
10 mV
2
10 mV
20 mV
20 mV
1
0
40 mV
6
40 mV
6
0
2
4
8
10
12
14
16
0
2
4
8
10
12
14
16
V
DD
– Supply Voltage – V
V
DD
– Supply Voltage – V
Figure 20
Figure 21
17
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
†
TYPICAL CHARACTERISTICS
AVERAGE SUPPLY CURRENT
(PER COMPARATOR)
vs
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
FREQUENCY
10000
1000
80
70
T
= – 55°C
Outputs Low
No Loads
A
T
C
= 25°C
= 50 pF
A
L
T
A
= – 40°C
V
DD
= 16 V
60
50
40
30
20
10
0
T
A
= 25°C
10 V
5 V
T
A
= 125°C
100
10
4 V
T
= 85°C
A
3 V
0
2
4
6
8
10
12
14
16
0.01
0.1
1
10
100
V
DD
– Supply Voltage – V
f – Frequency – kHz
Figure 22
Figure 23
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
30
25
20
15
V
= 5 V
DD
No Load
Outputs Low
Outputs High
10
5
0
–75 –50 –25
0
25
50
75
100 125
T
A
– Free-Air Temperature – °C
Figure 24
†
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
18
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
APPLICATION INFORMATION
The inputs should always remain within the supply rails in order to avoid forward biasing the diodes in the electrostatic
discharge (ESD) protection structure. If either input exceeds this range, the device is not damaged as long as the
input is limited to less than 5 mA. To maintain the expected output state, the inputs must remain within the
common-mode range. For example, at 25°C with V
ensure proper device operation. To ensure reliable operation, the supply should be decoupled with a capacitor
= 5 V, both inputs must remain between – 0.2 V and 4 V to
DD
(0.1 µF) that is positioned as close to the device as possible.
Output and supply current limitations should be watched carefully since the TLC3704 does not provide current
protection. For example, each output can source or sink a maximum of 20 mA; however, the total current to ground
canonlybeanabsolutemaximumof60mA. Thisprohibitssinking20mAfromeachofthefouroutputssimultaneously
since the total current to ground would be 80 mA.
The TLC3704 has internal ESD-protection circuits that prevents functional failures at voltages up to 2000 V as tested
under MIL-STD-883C, Method 3015.2; however, care should be exercised in handling these devices as exposure
to ESD may result in the degradation of the device parametric performance.
Table of Applications
FIGURE
Pulse-width-modulated motor speed controller
Enhanced supply supervisor
25
26
27
28
Two-phase nonoverlapping clock generator
Micropower switching regulator
19
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
APPLICATION INFORMATION
12 V
SN75603
Half-H Driver
DIR
EN
5 V
1/2 TLC3704
See
Note A
+
100 kΩ
+
10 kΩ
–
5 V
Motor
10 kΩ
10 kΩ
C1
–
1/2 TLC3704
0.01 µF
(see Note B)
12 V
SN75604
Half-H Driver
DIR
EN
5 V
10 kΩ
Motor Speed Control
Potentiometer
5 V
Direction
Control
S1
SPDT
NOTES: A. The recommended minimum capacitance is 10 µF to eliminate common ground switching noise.
B. Adjust C1 for change in oscillator frequency
Figure 25. Pulse-Width-Modulated Motor Speed Controller
20
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
APPLICATION INFORMATION
5 V
5 V
12 V
V
SENSE
RESET
GND
CC
3.3 kΩ
10 kΩ
1/2 TLC3704
12-V
Sense
+
To µP
Reset
TL7705A
RESIN
REF
1 kΩ
–
C
T
2.5 V
1 µF
C
T
(see Note B)
1/2 TLC3704
+
To µP Interrupt
Early Power Fail
R1
V
(UNREG)
–
(see Note A)
Monitors 5 VDC Rail
Monitors 12 VDC Rail
Early Power Fail Warning
R2
(R1 +R2)
NOTES: A.
V(UNREG)
2.5
R2
B. The value of C determines the time delay of reset.
T
Figure 26. Enhanced Supply Supervisor
21
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
APPLICATION INFORMATION
12 V
R1
12 V
100 kΩ
(see Note B)
12 V
1/2 TLC3704
–
OUT1
OUT2
R2
5 kΩ
+
1/2 TLC3704
(see Note C)
–
100 kΩ
+
1/2 TLC3704
–
22 kΩ
C1
0.01 µF
(see Note A)
+
100 kΩ
100 kΩ
R3
100 kΩ
(see Note B)
12 V
OUT1
OUT2
NOTES: A. Adjust C1 for a change in oscillator frequency where:
1/f = 1.85(100 kΩ)C1
B. Adjust R1 and R3 to change duty cycle
C. Adjust R2 to change deadtime
Figure 27. Two-Phase Nonoverlapping Clock Generator
22
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
APPLICATION INFORMATION
V
I
6 V to 16 V
I
0.01 mA to 0.25 mA
L
(R1
R2)
V
2.5
O
R2
1/2 TLC3704
SK9504
(see Note C)
V
I
1/2 TLC3704
+
100 kΩ
G
S
V
–
I
100 kΩ
+
V
I
–
47 µF
Tantalum
D
100 kΩ
+
C1
IN5818
180 µF
(see Note A)
100 kΩ
R = 6 Ω
L = 1 mH
(see Note D)
R1
V
O
100 kΩ
TLC271
(see Note B)
V
I
R
L
470 µF
+
R2
100 kΩ
–
C2
100 pF
100 kΩ
270 kΩ
V
I
LM385
2.5 V
NOTES: A. Adjust C1 for a change in oscillator frequency
B. TLC271 – Tie pin 8 to pin 7 for low bias operation
C. SK9504 – VDS = 40 V
IDS = 1 Awill
D. To achieve microampere current drive, the inductance of the circuit must be increased.
Figure 28. Micropower Switching Regulator
23
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
MECHANICAL DATA
D (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
8 PINS SHOWN
0.020 (0,51)
0.014 (0,35)
0.050 (1,27)
8
0.010 (0,25)
5
0.244 (6,20)
0.228 (5,80)
0.008 (0,20) NOM
0.157 (4,00)
0.150 (3,81)
Gage Plane
1
4
0.010 (0,25)
0°– 8°
A
0.044 (1,12)
0.016 (0,40)
Seating Plane
0.010 (0,25)
0.069 (1,75) MAX
0.004 (0,10)
0.004 (0,10)
PINS **
8
14
16
DIM
A MAX
0.197
(5,00)
0.344
(8,75)
0.394
(10,00)
0.189
(4,80)
0.337
(8,55)
0.386
(9,80)
A MIN
4040047/E 09/01
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion, not to exceed 0.006 (0,15).
D. Falls within JEDEC MS-012
24
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
MECHANICAL DATA
FK (S-CQCC-N**)
LEADLESS CERAMIC CHIP CARRIER
28 TERMINALS SHOWN
A
B
NO. OF
TERMINALS
**
18 17 16 15 14 13 12
MIN
MAX
MIN
MAX
0.342
(8,69)
0.358
(9,09)
0.307
(7,80)
0.358
(9,09)
19
20
11
10
9
20
28
44
52
68
84
0.442
(11,23)
0.458
(11,63)
0.406
(10,31)
0.458
(11,63)
21
B SQ
22
0.640
(16,26)
0.660
(16,76)
0.495
(12,58)
0.560
(14,22)
8
A SQ
23
0.740
(18,78)
0.761
(19,32)
0.495
(12,58)
0.560
(14,22)
7
24
25
6
0.938
(23,83)
0.962
(24,43)
0.850
(21,6)
0.858
(21,8)
5
1.141
(28,99)
1.165
(29,59)
1.047
(26,6)
1.063
(27,0)
26 27 28
1
2
3
4
0.080 (2,03)
0.064 (1,63)
0.020 (0,51)
0.010 (0,25)
0.020 (0,51)
0.010 (0,25)
0.055 (1,40)
0.045 (1,14)
0.045 (1,14)
0.035 (0,89)
0.045 (1,14)
0.035 (0,89)
0.028 (0,71)
0.022 (0,54)
0.050 (1,27)
4040140/C 11/95
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package can be hermetically sealed with a metal lid.
D. The terminals are gold-plated.
E. Falls within JEDEC MS-004
25
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
MECHANICAL DATA
J (R-GDIP-T**)
CERAMIC DUAL-IN-LINE
14 LEADS SHOWN
PINS **
14
16
20
DIM
0.310
(7,87)
0.310
(7,87)
0.310
(7,87)
A MAX
B
0.290
(7,37)
0.290
(7,37)
0.290
(7,37)
A MIN
B MAX
B MIN
C MAX
C MIN
14
8
0.785
0.785
0.975
(19,94) (19,94) (24,77)
C
0.755
0.755
0.930
(19,18) (19,18) (23,62)
0.300
(7,62)
0.300
(7,62)
0.300
(7,62)
1
7
0.065 (1,65)
0.045 (1,14)
0.245
(6,22)
0.245
(6,22)
0.245
(6,22)
0.100 (2,54)
0.070 (1,78)
0.020 (0,51) MIN
A
0.200 (5,08) MAX
Seating Plane
0.130 (3,30) MIN
0.023 (0,58)
0.015 (0,38)
0°–15°
0.014 (0,36)
0.008 (0,20)
0.100 (2,54)
4040083/E 03/99
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. This package is hermetically sealed with a ceramic lid using glass frit.
D. Index point is provided on cap for terminal identification.
E. Falls within MIL STD 1835 GDIP1-T14, GDIP1-T16, and GDIP1-T20
26
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
MECHANICAL DATA
N (R-PDIP-T**)
PLASTIC DUAL-IN-LINE PACKAGE
16 PINS SHOWN
PINS **
14
16
18
20
DIM
0.775
(19,69)
0.775
(19,69)
0.920
(23,37)
0.975
(24,77)
A MAX
A
16
9
0.745
(18,92)
0.745
(18,92)
0.850
(21,59)
0.940
(23,88)
A MIN
0.260 (6,60)
0.240 (6,10)
1
8
0.070 (1,78) MAX
0.325 (8,26)
0.300 (7,62)
0.035 (0,89) MAX
0.020 (0,51) MIN
0.015 (0,38)
Gauge Plane
0.200 (5,08) MAX
Seating Plane
0.010 (0,25) NOM
0.125 (3,18) MIN
0.100 (2,54)
0.010 (0,25)
0.430 (10,92) MAX
0.021 (0,53)
0.015 (0,38)
M
14/18 PIN ONLY
4040049/D 02/00
NOTES: A. All linear dimensions are in inches (millimeters).
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-001 (20-pin package is shorter than MS-001).
27
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
TLC3704, TLC3704Q
QUAD MICROPOWER LinCMOS VOLTAGE COMPARATORS
SLCS117B – NOVEMBER 1986 – REVISED JANUARY 2002
MECHANICAL DATA
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
M
0,10
0,65
14
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°–8°
A
0,75
0,50
Seating Plane
0,10
0,15
0,05
1,20 MAX
PINS **
8
14
16
20
24
28
DIM
3,10
2,90
5,10
4,90
5,10
4,90
6,60
6,40
7,90
7,70
9,80
9,60
A MAX
A MIN
4040064/F 01/97
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Body dimensions do not include mold flash or protrusion not to exceed 0,15.
D. Falls within JEDEC MO-153
28
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package Package
Pins Package Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3)
Qty
Type
LCCC
CDIP
SOIC
Drawing
5962-9096901M2A
5962-9096901MCA
TLC3704CD
ACTIVE
ACTIVE
ACTIVE
FK
J
20
14
14
1
1
None
None
POST-PLATE Level-NC-NC-NC
A42 SNPB Level-NC-NC-NC
D
50
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC3704CDR
TLC3704CN
ACTIVE
ACTIVE
ACTIVE
ACTIVE
SOIC
PDIP
SO
D
N
14
14
14
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC3704CNSR
NS
2000
90
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC3704CPW
TLC3704CPWLE
TLC3704CPWR
TLC3704ID
TSSOP
PW
PW
PW
D
14
14
14
14
None
None
None
CU NIPDAU Level-1-220C-UNLIM
OBSOLETE TSSOP
Call TI
Call TI
ACTIVE
ACTIVE
TSSOP
SOIC
2000
50
CU NIPDAU Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
TLC3704IDR
TLC3704IN
ACTIVE
ACTIVE
SOIC
PDIP
D
N
14
14
2500
25
Pb-Free
(RoHS)
CU NIPDAU Level-2-260C-1YEAR/
Level-1-220C-UNLIM
Pb-Free
(RoHS)
CU NIPDAU Level-NC-NC-NC
TLC3704IPW
TLC3704IPWR
TLC3704MD
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
ACTIVE
TSSOP
TSSOP
SOIC
PW
PW
D
14
14
14
14
20
14
14
90
2000
50
None
None
None
None
None
None
None
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
CU NIPDAU Level-1-220C-UNLIM
POST-PLATE Level-NC-NC-NC
TLC3704MDR
TLC3704MFKB
TLC3704MJ
SOIC
D
2500
1
LCCC
CDIP
FK
J
1
A42 SNPB
A42 SNPB
Level-NC-NC-NC
Level-NC-NC-NC
TLC3704MJB
CDIP
J
1
(1) The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - May not be currently available - please check http://www.ti.com/productcontent for the latest availability information and additional
product content details.
None: Not yet available Lead (Pb-Free).
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean "Pb-Free" and in addition, uses package materials that do not contain halogens,
including bromine (Br) or antimony (Sb) above 0.1% of total product weight.
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDECindustry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
22-Feb-2005
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
IMPORTANT NOTICE
Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,
enhancements, improvements, and other changes to its products and services at any time and to discontinue
any product or service without notice. Customers should obtain the latest relevant information before placing
orders and should verify that such information is current and complete. All products are sold subject to TI’s terms
and conditions of sale supplied at the time of order acknowledgment.
TI warrants performance of its hardware products to the specifications applicable at the time of sale in
accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI
deems necessary to support this warranty. Except where mandated by government requirements, testing of all
parameters of each product is not necessarily performed.
TI assumes no liability for applications assistance or customer product design. Customers are responsible for
their products and applications using TI components. To minimize the risks associated with customer products
and applications, customers should provide adequate design and operating safeguards.
TI does not warrant or represent that any license, either express or implied, is granted under any TI patent right,
copyright, mask work right, or other TI intellectual property right relating to any combination, machine, or process
in which TI products or services are used. Information published by TI regarding third-party products or services
does not constitute a license from TI to use such products or services or a warranty or endorsement thereof.
Use of such information may require a license from a third party under the patents or other intellectual property
of the third party, or a license from TI under the patents or other intellectual property of TI.
Reproduction of information in TI data books or data sheets is permissible only if reproduction is without
alteration and is accompanied by all associated warranties, conditions, limitations, and notices. Reproduction
of this information with alteration is an unfair and deceptive business practice. TI is not responsible or liable for
such altered documentation.
Resale of TI products or services with statements different from or beyond the parameters stated by TI for that
product or service voids all express and any implied warranties for the associated TI product or service and
is an unfair and deceptive business practice. TI is not responsible or liable for any such statements.
Following are URLs where you can obtain information on other Texas Instruments products and application
solutions:
Products
Applications
Audio
Amplifiers
amplifier.ti.com
www.ti.com/audio
Data Converters
dataconverter.ti.com
Automotive
www.ti.com/automotive
DSP
dsp.ti.com
Broadband
Digital Control
Military
www.ti.com/broadband
www.ti.com/digitalcontrol
www.ti.com/military
Interface
Logic
interface.ti.com
logic.ti.com
Power Mgmt
Microcontrollers
power.ti.com
Optical Networking
Security
www.ti.com/opticalnetwork
www.ti.com/security
www.ti.com/telephony
www.ti.com/video
microcontroller.ti.com
Telephony
Video & Imaging
Wireless
www.ti.com/wireless
Mailing Address:
Texas Instruments
Post Office Box 655303 Dallas, Texas 75265
Copyright 2005, Texas Instruments Incorporated
相关型号：
TLC3704IDRG4
Quad, Micropower, Push-Pull Outputs, LinCMOS™ Voltage Comparator 14-SOIC -40 to 85
TI
TLC3704INE4
QUAD COMPARATOR, 7000uV OFFSET-MAX, 2700ns RESPONSE TIME, PDIP14, ROHS COMPLIANT, PLASTIC, MS-001AA, DIP-14
TI
©2020 ICPDF网 联系我们和版权申明